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* [X86] Add 'znver2' and 'cascadelake' to the __builtin_cpu_is test.Craig Topper2019-02-261-0/+1
| | | | | | These are supported by at least libgcc trunk so we can include them now. llvm-svn: 354915
* [X86] AMD znver2 enablementGanesh Gopalasubramanian2019-02-261-0/+1
| | | | | | | | | | | | | | | | | This patch enables the following 1) AMD family 17h "znver2" tune flag (-march, -mcpu). 2) ISAs that are enabled for "znver2" architecture. 3) For the time being, it uses the znver1 scheduler model. 4) Tests are updated. 5) This patch is the clang counterpart to D58343 Reviewers: craig.topper Tags: #clang Differential Revision: https://reviews.llvm.org/D58344 llvm-svn: 354899
* [X86] Add support for more than 32 features for __builtin_cpu_isCraig Topper2018-10-201-0/+10
| | | | | | | | | | | | | | libgcc supports more than 32 features by adding a new 32-bit variable __cpu_features2. This adds the clang support for checking these feature bits. Patches for compiler-rt and llvm to support this are coming as well. Probably still need an additional patch for target multiversioning in clang. Differential Revision: https://reviews.llvm.org/D53458 llvm-svn: 344832
* [X86] Make sure 'knm' and 'cannonlake' are accepted by builtin_cpu_isCraig Topper2017-11-191-0/+2
| | | | llvm-svn: 318619
* [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc.Craig Topper2017-10-111-0/+1
| | | | | | The compiler-rt implementation already supported it, it just wasn't exposed. llvm-svn: 315517
* [X86] Implement __builtin_cpu_isCraig Topper2017-08-101-0/+32
| | | | | | | | This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc. Differential Revision: https://reviews.llvm.org/D35449 llvm-svn: 310657
* [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.Craig Topper2017-08-081-0/+3
| | | | | | They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO. llvm-svn: 310386
* Add all the avx512 flavors to __builtin_cpu_supports's list.Benjamin Kramer2016-05-201-0/+31
| | | | | | | | This is matching what trunk gcc is accepting. Also adds a missing ssse3 case. PR27779. The amount of duplication here is annoying, maybe it should be factored into a separate .def file? llvm-svn: 270224
* Handle target builtin options that are all required rather thanEric Christopher2015-10-271-0/+13
| | | | | | | | | | | | | | | | | only one of a group of possibilities. This changes the syntax in the builtin files to represent: , as the and operator | as the or operator The former syntax matches how the backend tablegen files represent multiple subtarget features being required. Updated the builtin and intrinsic headers accordingly for the new syntax. llvm-svn: 251388
* Mark this test as requiring and x86 registered target.Eric Christopher2015-10-161-0/+1
| | | | llvm-svn: 250475
* Add an error when calling a builtin that requires features that don'tEric Christopher2015-10-151-0/+30
match the feature set of the function that they're being called from. This ensures that we can effectively diagnose some[1] code that would instead ICE in the backend with a failure to select message. Example: __m128d foo(__m128d a, __m128d b) { return __builtin_ia32_addsubps(b, a); } compiled for normal x86_64 via: clang -target x86_64-linux-gnu -c would fail to compile in the back end because the normal subtarget features for x86_64 only include sse2 and the builtin requires sse3. [1] We're still not erroring on: __m128i bar(__m128i const *p) { return _mm_lddqu_si128(p); } where we should fail and error on an always_inline function being inlined into a function that doesn't support the subtarget features required. llvm-svn: 250473
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