| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
|
| |
llvm-svn: 271227
|
| |
|
|
|
|
| |
Differential Revision: http://reviews.llvm.org/D20617
llvm-svn: 271219
|
| |
|
|
|
|
|
|
| |
that will compile to a native unaligned store. Remove the builtins since they are no longer used.
Intrinsics will be removed from llvm in a future commit.
llvm-svn: 271214
|
| |
|
|
| |
llvm-svn: 270679
|
| |
|
|
|
|
|
|
| |
instrinsics. We were previously matching on other stores in the IR from this being an -O0 test.
We should probably look into making the storeu builtins just emit a normal store with an alignment of 1.
llvm-svn: 270664
|
| |
|
|
|
|
| |
sse-builtins.c now just covers SSE1 intrinsics
llvm-svn: 270083
|
| |
|
|
| |
llvm-svn: 269852
|
| |
|
|
|
|
| |
intrinsic they're testing.
llvm-svn: 269735
|
| |
|
|
|
|
| |
inline assembly to implement _mm_pause.
llvm-svn: 252712
|
| |
|
|
|
|
| |
couple intrinsics that were supposed to operate on MMX registers. Otherwise we end up operating on GPRs. Throw in a test for _mm_mul_su32 while I was there.
llvm-svn: 252711
|
| |
|
|
|
|
| |
Transferred SSSE3 instructions from sse-builtins.c
llvm-svn: 246948
|
| |
|
|
|
|
| |
Transferred SSE41 instructions from sse-builtins.c
llvm-svn: 246947
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Added missing SSE/AVX 'undefined' intrinsics (PR24040):
_mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128
_mm256_undefined_pd, _mm256_undefined_ps + _mm256_undefined_si256
_mm512_undefined, _mm512_undefined_ps, _mm512_undefined_pd + _mm512_undefined_epi32
Added builtin intrinsicss:
__builtin_ia32_undef128, __builtin_ia32_undef256 + __builtin_ia32_undef512
Differential Revision: http://reviews.llvm.org/D12052
llvm-svn: 246083
|
| |
|
|
| |
llvm-svn: 245815
|
| |
|
|
| |
llvm-svn: 230795
|
| |
|
|
| |
llvm-svn: 229484
|
| |
|
|
|
|
| |
instead of intrinsics. This should allow the instrinsics to removed from the backend.
llvm-svn: 229474
|
| |
|
|
|
|
| |
that handles both.
llvm-svn: 229469
|
| |
|
|
|
|
| |
that had optimizations on. This caused the check patterns to not quite match.
llvm-svn: 229073
|
| |
|
|
|
|
| |
and _mm_srli_si128. This matches Intel documentation and gcc.
llvm-svn: 229066
|
| |
|
|
|
|
|
|
|
|
| |
intrinsic files.
This still lower to the same intrinsics as before.
This is preparation for bounds checking the immediate on the avx version of the builtin so we don't pass illegal immediates into the backend. Since SSE uses a smaller size immediate its not possible to bounds check when using a shared builtin. Rather than creating a clang specific builtin for the different immediate, I decided (after consulting with Chandler) that it was better to match gcc.
llvm-svn: 224879
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Instructions from __nodebug__ functions don't have file:line
information even when inlined into no-nodebug functions. As a result,
intrinsics (SSE and other) from <*intrin.h> clang headers _never_
have file:line information.
With this change, an instruction without !dbg metadata gets one from
the call instruction when inlined.
Fixes PR19001.
llvm-svn: 210459
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Summary:
Most of the clang header patch by Simon Pilgrim @ SCEE.
Also fixed (or added) clang tests for these intrinsics.
LLVM tests to make sure we get the blend instruction out of these
shufflevectors are at http://reviews.llvm.org/D3600
Reviewers: eli.friedman, craig.topper, rafael
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D3601
llvm-svn: 208664
|
| |
|
|
|
|
|
|
|
| |
Now, all extract & insert intrinsics should have the correct and operation
to ignore higher bits.
rdar://15250497
llvm-svn: 193267
|
| |
|
|
|
|
|
| |
This is in line with implementation of _mm_extract_pi16.
rdar://15250497
llvm-svn: 193187
|
| |
|
|
|
|
|
|
|
| |
While I'm here, also fix the alignment computation for the whole family of
intrinsics.
PR17298.
llvm-svn: 191243
|
| |
|
|
|
|
| |
tests fail.
llvm-svn: 188447
|
| |
|
|
|
|
|
| |
There intrinsics pass through the upper FP values from the input.
rdar://12558838
llvm-svn: 166743
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
goodness because it provides opportunites to cleanup things. For example,
uint64_t t1(__m128i vA)
{
uint64_t Alo;
_mm_storel_epi64((__m128i*)&Alo, vA);
return Alo;
}
was generating
movq %xmm0, -8(%rbp)
movq -8(%rbp), %rax
and now generates
movd %xmm0, %rax
rdar://11282581
llvm-svn: 155924
|
| |
|
|
|
|
| |
parentheses around uses of vector macro arguments.
llvm-svn: 153732
|
| |
|
|
| |
llvm-svn: 153726
|
| |
|
|
|
|
|
|
| |
posix-unlike hosts.
Without -ffreestanding, clang tries to seek /usr/include/stdlib.h in host filesystem, even on Windows hosts.
llvm-svn: 139899
|
|
|
alignment (which probably has little effect in practice, but better to get it right). Make the load in _mm_loadh_pi and _mm_loadl_pi a single LLVM IR instruction to make optimizing easier for CodeGen.
rdar://10054986
llvm-svn: 139874
|