| Commit message (Collapse) | Author | Age | Files | Lines |
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int2mask/mask2int intrinsics.
Differential Revision: https://reviews.llvm.org/D26021
llvm-svn: 286229
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shufflevectors and selects.
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.
llvm-svn: 285667
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shufflevectors and selects.
Unfortunately, the backend currently doesn't fold masks into the instructions correctly when they come from these shufflevectors. I'll work on that in a future commit.
llvm-svn: 285540
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native IR like we do for 128/256-bit, but with the addition of masking.
llvm-svn: 284956
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llvm-svn: 284936
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Differential Revision: http://reviews.llvm.org/D21021
llvm-svn: 283314
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when rounding mode isn't used.
llvm-svn: 283073
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intrinsics. This is preparation for a follow up commit that will check validity of rounding mode argument.
llvm-svn: 283053
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The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include
guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted
environment since it expects stdlib.h to be available - which is not the case
in these internal clang codegen tests).
This patch removes this hack and instead passes -ffreestanding to clang cc1.
Differential Revision: https://reviews.llvm.org/D24825
llvm-svn: 282581
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Differential Revision:https: //reviews.llvm.org/D24961
llvm-svn: 282488
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that would properly compile to valid assembly.
llvm-svn: 282137
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llvm-svn: 280597
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llvm-svn: 280596
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fix Bug 28842 https://llvm.org/bugs/show_bug.cgi?id=28842
Differential Revision: https://reviews.llvm.org/D22212
llvm-svn: 277955
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possible problems in headers.
llvm-svn: 277696
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64-bit GPRs are available.
Usages of these intrinsics in a 32-bit build results in assertions in the backend.
llvm-svn: 276249
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the builtins.
llvm-svn: 275049
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llvm-svn: 275012
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llvm-svn: 274544
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add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic
Differential Revision: http://reviews.llvm.org/D21973
llvm-svn: 274542
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when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z.
llvm-svn: 274525
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llvm-svn: 274523
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llvm-svn: 274502
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llvm-svn: 274492
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generic IR
llvm companion patch imminent
llvm-svn: 274442
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The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043.
llvm-svn: 274044
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llvm-svn: 273533
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llvm-svn: 273378
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llvm-svn: 272787
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Differential Revision: http://reviews.llvm.org/D20626
llvm-svn: 272658
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CR: Michael Zuckerman
llvm-svn: 272549
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__builtin_nontemporal_store in headers
We can now use __builtin_nontemporal_store instead of target specific builtins for naturally aligned nontemporal stores which avoids the need for handling in CGBuiltin.cpp
The scalar integer nontemporal (unaligned) store builtins will have to wait as __builtin_nontemporal_store currently assumes natural alignment and doesn't accept the 'packed struct' trick that we use for normal unaligned load/stores.
The nontemporal loads require further backend support before we can safely convert them to __builtin_nontemporal_load
Differential Revision: http://reviews.llvm.org/D21272
llvm-svn: 272540
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__builtin_shufflevector and __builtin_ia32_select.
llvm-svn: 272467
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This will allow us to remove the x86 instrinics from the backend.
Differential Revision: http://reviews.llvm.org/D21060
llvm-svn: 272141
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Differential Revision: http://reviews.llvm.org/D20866
llvm-svn: 271835
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_mm512_setzero_epi32
Differential Revision: http://reviews.llvm.org/D20871
llvm-svn: 271832
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Differential Revision: http://reviews.llvm.org/D20861
llvm-svn: 271499
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And remove trailing spaces in intrinsic f test
Differential Revision: http://reviews.llvm.org/D20810
llvm-svn: 271398
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instruction set to clang
Differential Revision: http://reviews.llvm.org/D20812
llvm-svn: 271373
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Differential Revision: http://reviews.llvm.org/D20815
llvm-svn: 271368
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Differential Revision: http://reviews.llvm.org/D20790
llvm-svn: 271265
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instead of the x86 specific ones.
This will allow the x86 intrinsics to be removed from the backend.
llvm-svn: 271253
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intrinsics.
This will allow us to remove the x86 instrinics from the backend.
llvm-svn: 271246
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Differential Revision: http://reviews.llvm.org/D20618
llvm-svn: 271205
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llvm-svn: 271134
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llvm-svn: 270851
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Differential Revision: http://reviews.llvm.org/D20562
llvm-svn: 270825
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llvm-svn: 270704
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Differential Revision: http://reviews.llvm.org/D20523
llvm-svn: 270699
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Differential Revision: http://reviews.llvm.org/D20514
llvm-svn: 270401
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