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* [X86] Implement old kunpck intrinsics using vector ops on vXi1 instead of ↵Craig Topper2018-01-141-12/+11
| | | | | | | | | | | | | | | | | | | integer shift/and/or Summary: kunpck intrinsics were removed in favor of native IR a few months ago. The implementation lowers them as by operation on the integer types passed to the intrinsic and then just shifting, masking, and oring them together. A special X86 DAG combine was added to recognize this patter and turn it into a concat_vector operation. I think it makes more sense to keep the IR implementation closer to vector operations on vXi1. Given that we expect these builtins to be used around other builtins that operate on k-registers which we try to represent in IR with vXi1. InstCombine should be able to get rid of the bitcasts between integers and vXi1 leaving only the vector operations. Reviewers: RKSimon, spatel, zvi, jina.nahias Reviewed By: RKSimon Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D42016 llvm-svn: 322461
* [X86] Replace cvt*2mask intrinsics with native IR using 'icmp slt X, ↵Craig Topper2018-01-081-2/+4
| | | | | | zeroinitializer. llvm-svn: 322038
* [x86][AVX512] Lowering kunpack intrinsics to LLVM IRJina Nahias2017-12-051-6/+16
| | | | | | | | | This patch, together with a matching llvm patch (https://reviews.llvm.org/D39720), implements the lowering of X86 kunpack intrinsics to IR. Differential Revision: https://reviews.llvm.org/D39719 Change-Id: Id5d3cb394ad33b98be79a6783d1d15569e2b798d llvm-svn: 319777
* [X86] test/testn intrinsics lowering to IR. clang sideUriel Korach2017-11-131-8/+20
| | | | | | | | | Change Header files of the intrinsics for lowering test and testn intrinsics to IR code. Removed test and testn builtins from clang Differential Revision: https://reviews.llvm.org/D38737 llvm-svn: 318035
* Lowering Mask Set1 intrinsics to LLVM IRJina Nahias2017-09-191-4/+194
| | | | | | | | This patch, together with a matching llvm patch (https://reviews.llvm.org/D37669), implements the lowering of X86 mask set1 intrinsics to IR. Differential Revision: https://reviews.llvm.org/D37668 llvm-svn: 313624
* [X86] [PATCH] [intrinsics] Lowering X86 ABS intrinsics to IR. (clang)Uriel Korach2017-09-131-6/+22
| | | | | | | | This patch, together with a matching llvm patch (https://reviews.llvm.org/D37693), implements the lowering of X86 ABS intrinsics to IR. Differential Revision: https://reviews.llvm.org/D37694 llvm-svn: 313133
* [X86] Lower _mm[256|512]_[mask[z]]_avg_epu[8|16] intrinsics to native llvm IRYael Tsafrir2017-09-121-6/+48
| | | | | | Differential Revision: https://reviews.llvm.org/D37562 llvm-svn: 313011
* Fix problem with test. Michael Zuckerman2017-04-041-4/+4
| | | | llvm-svn: 299442
* [X86][Clang] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into ↵Michael Zuckerman2017-04-041-2/+4
| | | | | | | | | | | | generic intrinsics. This patch is a part two of two reviews, one for the clang and the other for LLVM. In this patch, I covered the clang side, by introducing the intrinsic to the front end. This is done by creating a generic replacement. Differential Revision: https://reviews.llvm.org/D31394a llvm-svn: 299431
* [AVX-512] Fix test cases that were using the builtins directly without ↵Craig Topper2017-03-171-3/+3
| | | | | | typecasts instead of the intrinsic header. llvm-svn: 298041
* [x86] these aren't the undefs you're looking for (PR32176)Sanjay Patel2017-03-121-6/+6
| | | | | | | | | | | | | x86 has undef SSE/AVX intrinsics that should represent a bogus register operand. This is not the same as LLVM's undef value which can take on multiple bit patterns. There are better solutions / follow-ups to this discussed here: https://bugs.llvm.org/show_bug.cgi?id=32176 ...but this should prevent miscompiles with a one-line code change. Differential Revision: https://reviews.llvm.org/D30834 llvm-svn: 297588
* [AVX-512] Replace 512-bit masked packss/packus builtins and replace with new ↵Craig Topper2017-02-161-12/+20
| | | | | | | | unmasked builtins. These new unmasked builtins will enable us to easily support optimizing these builtins in InstCombine in the backend. llvm-svn: 295291
* [AVX-512] Remove masking from 512-bit pshufb builtin. The backend now has a ↵Craig Topper2016-12-101-3/+5
| | | | | | | | version without masking so wrap it with select. This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking. llvm-svn: 289345
* [AVX-512] Replace masked 16-bit element variable shift builtins with new ↵Craig Topper2016-11-181-9/+15
| | | | | | unmasked versions and selects. llvm-svn: 287313
* [AVX-512] Convert the rest of the masked shift by immediate and by single ↵Craig Topper2016-11-121-18/+30
| | | | | | | | element builtins over to the newly added unmasked builtins and a select. This should also fix PR30691 since the new builtins are handled like the legacy builtins in the backend. llvm-svn: 286714
* [AVX-512] Replace 64-bit element and 512-bit vector pmin/pmax builtins with ↵Craig Topper2016-10-241-24/+64
| | | | | | native IR like we do for 128/256-bit, but with the addition of masking. llvm-svn: 284956
* [AVX-512] Replace 512-bit pmovzx/sx builtins with native IR.Craig Topper2016-10-231-6/+10
| | | | llvm-svn: 284936
* [X86] Remove the mm_malloc.h include guard hack from the X86 builtins testsElad Cohen2016-09-281-4/+2
| | | | | | | | | | | | The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted environment since it expects stdlib.h to be available - which is not the case in these internal clang codegen tests). This patch removes this hack and instead passes -ffreestanding to clang cc1. Differential Revision: https://reviews.llvm.org/D24825 llvm-svn: 282581
* [AVX-512] Remove masked integer mullo builtins and replace with native IR.Craig Topper2016-09-031-2/+4
| | | | llvm-svn: 280597
* [AVX-512] Remove masked integer add/sub builtins and replace with native IR.Craig Topper2016-09-031-8/+16
| | | | llvm-svn: 280596
* After PR28761 use -Wall with -Werror in builtins tests to identifyEric Christopher2016-08-041-2/+2
| | | | | | possible problems in headers. llvm-svn: 277696
* [X86][AVX512] Converted the VBROADCAST intrinsics to generic IRSimon Pilgrim2016-07-051-13/+16
| | | | llvm-svn: 274544
* [Clang][BuiltIn][AVX512] adding ↵Michael Zuckerman2016-07-051-0/+20
| | | | | | | | _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics Differential Revision: http://reviews.llvm.org/D21729 llvm-svn: 274532
* Update the expected masked load/store intrinsics names in testsArtur Pilipenko2016-06-281-6/+6
| | | | | | The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043. llvm-svn: 274044
* [AVX512] Replace masked unpack builtins with shufflevector and selects.Craig Topper2016-06-231-12/+20
| | | | llvm-svn: 273533
* [AVX512] Replace masked integer cmp and ucmp builtins with native IR.Craig Topper2016-06-221-56/+80
| | | | llvm-svn: 273378
* [AVX512] Use native IR for mask pcmpeq/pcmpgt intrinsics.Craig Topper2016-06-151-8/+12
| | | | llvm-svn: 272787
* [AVX512] Implement 512-bit and masked shufflelo and shufflehi intrinsics ↵Craig Topper2016-06-111-6/+10
| | | | | | directly with __builtin_shufflevector and __builtin_ia32_select. Also improve the formatting of the AVX2 version. llvm-svn: 272452
* [AVX512] Add _mm512_bsrli_epi128 and _mm512_bslli_epi128 intrinsics.Craig Topper2016-06-111-0/+11
| | | | llvm-svn: 272451
* [AVX512] Emit select instruction instead of using x86 specific instrinsics.Igor Breger2016-06-081-6/+6
| | | | | | | | This will allow us to remove the x86 instrinics from the backend. Differential Revision: http://reviews.llvm.org/D21060 llvm-svn: 272141
* [AVX512] Convert masked palignr builtins directly to native IR similar to ↵Craig Topper2016-06-061-3/+5
| | | | | | the other palignr builtins, but with a select to handle masking. llvm-svn: 271873
* [AVX512] Convert masked load builtins to generic masked load intrinsics ↵Craig Topper2016-05-311-4/+4
| | | | | | | | instead of the x86 specific ones. This will allow the x86 intrinsics to be removed from the backend. llvm-svn: 271253
* [AVX512] Emit generic masked store instrinsics instead of using x86 specific ↵Craig Topper2016-05-311-2/+2
| | | | | | | | intrinsics. This will allow us to remove the x86 instrinics from the backend. llvm-svn: 271246
* [Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512} ↵Michael Zuckerman2016-05-031-0/+7
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19766 llvm-svn: 268385
* [clang][AVX512][Builtin] Adding intrinsics for the SAD instruction set.Michael Zuckerman2016-04-281-0/+23
| | | | | | Differential Revision: http://reviews.llvm.org/D19591 llvm-svn: 267942
* [Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr ↵Michael Zuckerman2016-04-281-0/+20
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19588 llvm-svn: 267876
* [Clang][AVX512][BuiltIn] Adding support to intrinsics of VPERMD and VPERMW ↵Michael Zuckerman2016-04-251-0/+17
| | | | | | | | instruction set Differential Revision: http://reviews.llvm.org/D19195 llvm-svn: 267380
* [Clang][AVX512][Builtin] Adding support for VBROADCAST and ↵Michael Zuckerman2016-04-131-0/+47
| | | | | | | | | VPBROADCASTB/W/D/Q instruction set Differential Revision: http://reviews.llvm.org/D19012 llvm-svn: 266195
* [Clang][AVX512][Builtin] Adding supporting to intrinsics of ↵Michael Zuckerman2016-04-131-0/+19
| | | | | | | | cvt{b|d|q}2mask{128|256|512} and cvtmask2{b|d|q}{128|256|512} instruction set. Differential Revision: http://reviews.llvm.org/D19009 llvm-svn: 266188
* [Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) ↵Michael Zuckerman2016-04-111-0/+47
| | | | | | | | builtin to clang Differential Revision: http://reviews.llvm.org/D18924 llvm-svn: 265928
* [Clang][AVX512][BuiltIn] Adding avx512 ( store ) builtin to clangMichael Zuckerman2016-04-101-1/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D18925 llvm-svn: 265895
* [CLANG][avx512][BUILTIN] Adding fixupimm{pd|ps|sd|ss}Michael Zuckerman2016-03-281-0/+36
| | | | | | | | | getexp{sd|ss} getmant{sd|ss} kunpck{di|si} loada{pd|ps} loaddqu{di|hi|qi|si} max{sd|ss} min{sd|ss} kmov16 builtins to clang Differential Revision: http://reviews.llvm.org/D18215 llvm-svn: 264574
* [CLANG][AVX512][BUILTIN] Adding vpmultishiftqb{128|256|512}Michael Zuckerman2016-03-071-0/+12
| | | | | | Differential Revision: http://reviews.llvm.org/D17914 llvm-svn: 262817
* [CLANG][AVX512][BUILTIN] movdqu{qi|hi} {128|256|512}Michael Zuckerman2016-03-031-0/+22
| | | | | | Differential Revision: http://reviews.llvm.org/D17814 llvm-svn: 262609
* [Clang][AVX512][BUILTIN] Adding PSRL{W|WI}{128|256|512}Michael Zuckerman2016-03-031-0/+37
| | | | | | Differential Revision: http://reviews.llvm.org/D17754 llvm-svn: 262593
* [CLANG] [AVX512] [BUILTIN] Adding PSRA{W|WI}{128|256|512}.Michael Zuckerman2016-03-021-0/+37
| | | | | | Differential Revision: http://reviews.llvm.org/D17706 llvm-svn: 262481
* [CLANG] [AVX512] [BUILTIN] Adding PSRAVMichael Zuckerman2016-03-021-0/+18
| | | | | | Differential Revision: http://reviews.llvm.org/D17699 llvm-svn: 262471
* [CLANG][AVX512][BUILTIN] Adding PSRLV builtin Michael Zuckerman2016-03-011-0/+18
| | | | | | Differential Revision: http://reviews.llvm.org/D17718 llvm-svn: 262326
* [CLANG] [AVX512] [BUILTIN] Adding PSLL{V|W|Wi}{128|256|512} builtinMichael Zuckerman2016-02-281-0/+54
| | | | | | Differential Revision: http://reviews.llvm.org/D17685 llvm-svn: 262177
* [CLANG] [AVX512] [BUILTIN] Adding PSHUF{L|H}W{128|256|512} builtin to clang .Michael Zuckerman2016-02-241-0/+38
| | | | | | Differential Revision: http://reviews.llvm.org/D17539 llvm-svn: 261755
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