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* [X86] Add back _mask, _maskz, and _mask3 builtins for some 512-bit ↵Craig Topper2018-06-073-589/+560
| | | | | | | | | | | | | | | | | | | | | | | fmadd/fmsub/fmaddsub/fmsubadd builtins. Summary: We recently switch to using a selects in the intrinsics header files for FMA instructions. But the 512-bit versions support flavors with rounding mode which must be an Integer Constant Expression. This has forced those intrinsics to be implemented as macros. As it stands now the mask and mask3 intrinsics evaluate one of their macro arguments twice. If that argument itself is another intrinsic macro, we can end up over expanding macros. Or if its something we can CSE later it would show up multiple times when it shouldn't. I tried adding __extension__ around the macro and making it an expression statement and declaring a local variable. But whatever name you choose for the local variable can never be used as the name of an input to the macro in user code. If that happens you would end up with the same name on the LHS and RHS of an assignment after expansion. We might be safe if we use __ in front of the variable names because those names are reserved and user code shouldn't use that, but I wasn't sure I wanted to make that claim. The other option which I've chosen here, is to add back _mask, _maskz, and _mask3 flavors of the builtin which we will expand in CGBuiltin.cpp to replicate the argument as needed and insert any fneg needed on the third operand to make a subtract. The _maskz isn't truly necessary if we have an unmasked version or if we use the masked version with a -1 mask and wrap a select around it. But I've chosen to make things more uniform. I separated out the scalar builtin handling to avoid too many things going on in EmitX86FMAExpr. It was different enough due to the extract and insert that the minor duplication of the CreateCall was probably worth it. Reviewers: tkrupa, RKSimon, spatel, GBuella Reviewed By: tkrupa Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47724 llvm-svn: 334159
* [ODRHash] Adjust info stored for FunctionTemplateDecl.Richard Trieu2018-06-071-1/+1
| | | | | | | Avoid storing information for definitions since those can be out-of-line and vary between modules even when the declarations are the same. llvm-svn: 334151
* [Driver] Stop passing -fseh-exceptions for x86_64-windows-msvcShoaib Meenai2018-06-061-2/+0
| | | | | | | | | | | -fseh-exceptions is only meaningful for MinGW targets, and that driver already has logic to pass either -fdwarf-exceptions or -fseh-exceptions as appropriate. -fseh-exceptions is just a no-op for MSVC triples, and passing it to cc1 causes unnecessary confusion. Differential Revision: https://reviews.llvm.org/D47850 llvm-svn: 334145
* [CUDA] Check initializers of instantiated template variables.Artem Belevich2018-06-063-52/+58
| | | | | | | | | We were already performing checks on non-template variables, but the checks on templated ones were missing. Differential Revision: https://reviews.llvm.org/D45231 llvm-svn: 334143
* [HIP] Fix unbundlingYaxun Liu2018-06-061-4/+13
| | | | | | | | | | | | | | | | | | | | HIP uses clang-offload-bundler to bundle intermediate files for host and different gpu archs together. When a file is unbundled, clang-offload-bundler should be called only once, and the objects for host and different gpu archs should be passed to the next jobs. This is because Driver maintains CachedResults which maps triple-arch string to output files for each job. This patch fixes a bug in Driver::BuildJobsForActionNoCache which uses incorrect key for CachedResults for HIP which causes clang-offload-bundler being called mutiple times and incorrect output files being used. It only affects HIP. Differential Revision: https://reviews.llvm.org/D47555 llvm-svn: 334128
* [MS][ARM64]: Promote _setjmp to_setjmpex as there is no _setjmp in the ARM64 ↵Reid Kleckner2018-06-061-49/+55
| | | | | | | | | | | | libvcruntime.lib Factor out the common setjmp call emission code. Based on a patch by Chris January Differential Revision: https://reviews.llvm.org/D47784 llvm-svn: 334112
* [CUDA] Replace 'nv_weak' attributes in CUDA headers with 'weak'.Artem Belevich2018-06-061-0/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D47804 llvm-svn: 334108
* PR37680: fix faulty assertion condition.Richard Smith2018-06-061-0/+1
| | | | | | | When looking up a template name, we can find an overload set containing a function template and an unresolved non-type using declaration. llvm-svn: 334106
* [Driver] Add flag "--dependent-lib=..." when enabling asan or ubsan on PS4.Pierre Gousseau2018-06-063-2/+15
| | | | | | | | | | NFC for targets other than PS4. Simplify users' workflow when enabling asan or ubsan and calling the linker separately. Differential Revision: https://reviews.llvm.org/D47375 llvm-svn: 334096
* [Frontend] Honor UserFilesAreVolatile flag getting file buffer in ASTUnitIvan Donchevskii2018-06-062-8/+9
| | | | | | | | | Do not memory map the main file if the flag UserFilesAreVolatile is set to true in ASTUnit when calling FileSystem::getBufferForFile. Differential Revision: https://reviews.llvm.org/D47460 llvm-svn: 334070
* [Analyzer] Fix Z3ConstraintManager crash (PR37646)Vlad Tsyrklevich2018-06-061-2/+4
| | | | | | | | | | | | | | | | Summary: Fix another Z3ConstraintManager crash, use fixAPSInt() to extend a boolean APSInt. Reviewers: george.karpenkov, NoQ, ddcc Reviewed By: george.karpenkov Subscribers: xazax.hun, szepet, a.sidorin, cfe-commits Differential Revision: https://reviews.llvm.org/D47617 llvm-svn: 334065
* [Sema] Fix parsing of anonymous union in language linkage specificationJan Korous2018-06-061-3/+5
| | | | | | | | | | | | | | C++17 [dcl.link]p4: A linkage specification does not establish a scope. C++17 [class.union.anon]p2: Namespace level anonymous unions shall be declared static. Differential Revision: https://reviews.llvm.org/D45884 rdar://problem/37545925 llvm-svn: 334062
* Fix std::tuple errorsReid Kleckner2018-06-061-12/+12
| | | | llvm-svn: 334060
* Implement bittest intrinsics generically for non-x86 platformsReid Kleckner2018-06-061-26/+142
| | | | | | | | | | I tested these locally on an x86 machine by disabling the inline asm codepath and confirming that it does the same bitflips as we do with the inline asm. Addresses code review feedback. llvm-svn: 334059
* [X86] Add builtins for vector element insert and extract for different 128 ↵Craig Topper2018-06-065-97/+96
| | | | | | | | | | | | | | and 256 bit vector types. Use them to implement the extract and insert intrinsics. Previously we were just using extended vector operations in the header file. This unfortunately allowed non-constant indices to be used with the intrinsics. This is incompatible with gcc, icc, and MSVC. It also introduces a different performance characteristic because non-constant index gets lowered to a vector store and an element sized load. By adding the builtins we can check for the index to be a constant and ensure its in range of the vector element count. User code still has the option to use extended vector operations themselves if they need non-constant indexing. llvm-svn: 334057
* [X86] Implement __builtin_ia32_vec_ext_v2si correctly even though we only ↵Craig Topper2018-06-051-1/+1
| | | | | | | | use it with an index of 0. This builtin takes an index as its second operand, but the codegen hardcodes an index of 0 and doesn't use the operand. The only use of the builtin in the header file passes 0 to the operand so this works for that usage. But its more correct to use the real operand. llvm-svn: 334054
* [X86] Make __builtin_ia32_vec_ext_v2si require ICE for its index argument. ↵Craig Topper2018-06-051-0/+7
| | | | | | | | Add warnings for out of range indices for __builtin_ia32_vec_ext_v2si, __builtin_ia32_vec_ext_v4hi, and __builtin_ia32_vec_set_v4hi. These should take a constant value for an index and that constant should be a valid element number. llvm-svn: 334051
* [CUDA][HIP] Do not emit type info when compiling for deviceYaxun Liu2018-06-051-1/+1
| | | | | | | | | | | | | CUDA/HIP does not support RTTI on device side, therefore there is no point of emitting type info when compiling for device. Emitting type info for device not only clutters the IR with useless global variables, but also causes undefined symbol at linking since vtable for cxxabiv1::class_type_info has external linkage. Differential Revision: https://reviews.llvm.org/D47694 llvm-svn: 334021
* Detect an incompatible VLA pointer assignmentJeremy Morse2018-06-051-2/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For pointer assignments of VLA types, Clang currently detects when array dimensions _lower_ than a variable dimension differ, and reports a warning. However it does not do the same when the _higher_ dimensions differ, a case that GCC does catch. These two pointer types int (*foo)[1][bar][3]; int (*baz)[1][2][3]; are compatible with each another, and the program is well formed if bar == 2, a matter that is the programmers problem. However the following: int (*qux)[2][2][3]; would not be compatible with either, because the upper dimension differs in size. Clang reports baz is incompatible with qux, but not that foo is incompatible with qux because it doesn't check those higher dimensions. Fix this by comparing array sizes on higher dimensions: if both are constants but unequal then report incompatibility; if either dimension is variable then we can't know either way. Differential Revision: https://reviews.llvm.org/D47628 llvm-svn: 333989
* [X86] Mark all the builtins and intrinsics that require MMX and an SSE ↵Craig Topper2018-06-053-45/+51
| | | | | | | | feature as requiring both mmx and the sse feature. Previously we only checked the sse feature, but this means that if you passed -mno-mmx, the builtins/intrinsics wouldn't be disabled in the frontend and would instead fail backend isel. llvm-svn: 333980
* [Driver][Fuchsia] Pass LTO flags to linkerPetr Hosek2018-06-051-0/+6
| | | | | | | | | Even though we use lld by default for Fuchsia, we use Gold plugin arguments like all other drivers as lld supports Gold plugin options. Differential Revision: https://reviews.llvm.org/D47668 llvm-svn: 333979
* Reimplement the bittest intrinsic family as builtins with inline asmReid Kleckner2018-06-052-100/+56
| | | | | | | | | | | We need to implement _interlockedbittestandset as a builtin for windows.h, so we might as well do the whole family. It reduces code duplication anyway. Fixes PR33188, a long standing bug in our bittest implementation encountered by Chakra. llvm-svn: 333978
* Revert r333791 "Cap "voluntary" vector alignment at 16 for all Darwin ↵Reid Kleckner2018-06-045-58/+68
| | | | | | | | | | | | | | platforms." Adding __attribute__((aligned(32))) to __m256 breaks the implementation of _mm256_loadu_ps on Windows. On Windows, alignment attributes have higher precedence than packing attributes. We also might want to carefully consider the consequences of changing our vector typedefs, since many users copy them and invent their own new, non-Intel specific vector type names. llvm-svn: 333958
* Update for an LLVM header file moveDavid Blaikie2018-06-041-1/+1
| | | | llvm-svn: 333955
* [analyzer] Re-enable constructors when lifetime extension through fields occurs.Artem Dergachev2018-06-042-20/+6
| | | | | | | | | | | | | | | | Temporary object constructor inlining was disabled in r326240 for code like const int &x = A().x; because automatic destructor for the lifetime-extended object A() was not working correctly in CFG. CFG was fixed in r333941, so inlining can be re-enabled. CFG for lifetime extension through aggregates still needs to be fixed. Differential Revision: https://reviews.llvm.org/D44239 llvm-svn: 333946
* [X86] Avoid passing _mm_undefined* to builtin_shufflevector if we are able ↵Craig Topper2018-06-044-22/+11
| | | | | | | | to pass the first input a second time. This is more consistent with other usages of builtin_shufflevector. Later optimization passes or codegen will detect the duplicate vector and replace it with undef. Using _mm_undefined just puts a zeroinitializer that still needs to be optimized out later. llvm-svn: 333944
* [CFG] Fix automatic destructors when a member is bound to a reference.Artem Dergachev2018-06-041-33/+29
| | | | | | | | | | | | | | | | | | | In code like const int &x = A().x; automatic destructor for the object A() lifetime-extended by reference 'x' was not present in the clang CFG due to ad-hoc pattern-matching in getReferenceInitTemporaryType(). Re-use skipRValueSubobjectAdjustments() again to find the lifetime-extended object in the AST and emit the correct destructor. Lifetime extension through aggregates with references still needs to be covered. Differential Revision: https://reviews.llvm.org/D44238 llvm-svn: 333941
* Remove llvm::Triple argument from get***Personality() functions. NFC.Heejin Ahn2018-06-041-17/+18
| | | | | | | | | | | | | | Summary: Because `llvm::Triple` can be derived from `TargetInfo`, it is simpler to take only `TargetInfo` argument. Reviewers: sbc100 Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47620 llvm-svn: 333938
* This diff includes changes for supporting the following types.Leonard Chan2018-06-0421-5/+211
| | | | | | | | | | | | | | | | | | | | | | | | | // Primary fixed point types signed short _Accum s_short_accum; signed _Accum s_accum; signed long _Accum s_long_accum; unsigned short _Accum u_short_accum; unsigned _Accum u_accum; unsigned long _Accum u_long_accum; // Aliased fixed point types short _Accum short_accum; _Accum accum; long _Accum long_accum; This diff only allows for declaration of the fixed point types. Assignment and other operations done on fixed point types according to http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf will be added in future patches. The saturated versions of these types and the equivalent _Fract types will also be added in future patches. The tests included are for asserting that we can declare these types. Fixed the test that was failing by not checking for dso_local on some targets. Differential Revision: https://reviews.llvm.org/D46084 llvm-svn: 333923
* [analyzer] False positive refutation with Z3Mikhail R. Gadelha2018-06-043-1/+56
| | | | | | | | | | | | | | Summary: This is a prototype of a bug reporter visitor that invalidates bug reports by re-checking constraints of certain states on the bug path using the Z3 constraint manager backend. The functionality is available under the `crosscheck-with-z3` analyzer config flag. Reviewers: george.karpenkov, NoQ, dcoughlin, rnkovacs Reviewed By: george.karpenkov Subscribers: rnkovacs, NoQ, george.karpenkov, dcoughlin, xbolva00, ddcc, mikhail.ramalho, MTC, fhahn, whisperity, baloghadamsoftware, szepet, a.sidorin, gsd, dkrupp, xazax.hun, cfe-commits Differential Revision: https://reviews.llvm.org/D45517 llvm-svn: 333903
* Created a tiny SMT interface and make Z3ConstraintManager implement itMikhail R. Gadelha2018-06-041-3/+58
| | | | | | | | | | | | | | | | | | | Summary: This patch implements a simple SMTConstraintManager API, and requires the implementation of two methods for now: `addRangeConstraints` and `isModelFeasible`. Update Z3ConstraintManager to inherit it and implement required methods. I also moved the method to dump the SMT formula from D45517 to this patch. This patch was created based on the reviews from D47640. Reviewers: george.karpenkov, NoQ, ddcc, dcoughlin Reviewed By: george.karpenkov Differential Revision: https://reviews.llvm.org/D47689 llvm-svn: 333899
* Reland "Move #include manipulation code to new lib/Tooling/Inclusions."Eric Liu2018-06-047-6/+17
| | | | | | | | This reverts commit r333534 (i.e. reland r332720) after fixing module build. Differential Revision: https://reviews.llvm.org/D47068 llvm-svn: 333874
* [X86] Fix a couple places that were using macro arguments twice when of the ↵Craig Topper2018-06-041-2/+4
| | | | | | | | usages could just be undefined. One of the arguments was being used when the passthru argument is unused due to the mask being all 1s. But in that case the actual value doesn't matter so we should use undef instead to avoid expanding the macro argument unnecessarily. llvm-svn: 333865
* Moved RangedConstraintManager header to the StaticAnalyser include dirMikhail R. Gadelha2018-06-043-216/+2
| | | | | | | | | | | | | | | Summary: Moved `RangedConstraintManager` header from `lib/StaticAnalyzer/Core/` to `clang/StaticAnalyzer/Core/PathSensitive/`. No changes to the code. Reviewers: NoQ, george.karpenkov, dcoughlin Reviewed By: george.karpenkov Subscribers: NoQ, george.karpenkov, dcoughlin, ddcc Differential Revision: https://reviews.llvm.org/D47640 llvm-svn: 333862
* [X86] Remove superfluous escaped new lines from intrinsic files.Craig Topper2018-06-031-4/+4
| | | | llvm-svn: 333858
* [X86] Explicitly make the arguments to __slwpcb intrinsic 'void'.Craig Topper2018-06-031-1/+1
| | | | | | This is the correct way to say it takes no arguments in C. llvm-svn: 333855
* [X86] Replace __builtin_ia32_vbroadcastf128_pd256 and ↵Craig Topper2018-06-032-28/+6
| | | | | | __builtin_ia32_vbroadcastf128_ps256 with an unaligned load intrinsics and a __builtin_shufflevector call. llvm-svn: 333853
* [X86] Pass ArrayRef instead of SmallVectorImpl& to the X86 builtin helper ↵Craig Topper2018-06-031-10/+10
| | | | | | functions. NFC llvm-svn: 333851
* Revert r333848 "[X86] Pass ArrayRef instead of SmallVectorImpl& to the X86 ↵Craig Topper2018-06-031-8/+8
| | | | | | | | builtin helper functions. NFC" Looks like I missed some changes to make this work. llvm-svn: 333850
* [X86] Pass ArrayRef instead of SmallVectorImpl& to the X86 builtin helper ↵Craig Topper2018-06-031-8/+8
| | | | | | functions. NFC llvm-svn: 333848
* [X86] When emitting masked loads/stores don't check for all ones mask.Craig Topper2018-06-031-10/+0
| | | | | | | | This seems like a premature optimization. It's unlikely a user would pass something the frontend can tell is all ones to the masked load/store intrinsics. We do this optimization for emitting select for masking because we have builtin calls in header files that pass an all ones mask in. Though at this point we may not longer have any builtins that emit some IR and a select. We may only have the select builtins so maybe we can remove that optimization too. llvm-svn: 333847
* [NEON] Support VLD1xN intrinsics in AArch32 mode (Clang part)Ivan A. Kosarev2018-06-021-30/+27
| | | | | | | | | We currently support them only in AArch64. The NEON Reference, however, says they are 'ARMv7, ARMv8' intrinsics. Differential Revision: https://reviews.llvm.org/D47121 llvm-svn: 333829
* Revert "This diff includes changes for supporting the following types."Leonard Chan2018-06-0221-211/+5
| | | | | | | This reverts commit r333814, which fails for a test checking the bit width on ubuntu. llvm-svn: 333815
* This diff includes changes for supporting the following types.Leonard Chan2018-06-0221-5/+211
| | | | | | | | | | | | | | | | | | | | | | | | | | | ``` // Primary fixed point types signed short _Accum s_short_accum; signed _Accum s_accum; signed long _Accum s_long_accum; unsigned short _Accum u_short_accum; unsigned _Accum u_accum; unsigned long _Accum u_long_accum; // Aliased fixed point types short _Accum short_accum; _Accum accum; long _Accum long_accum; ``` This diff only allows for declaration of the fixed point types. Assignment and other operations done on fixed point types according to http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf will be added in future patches. The saturated versions of these types and the equivalent `_Fract` types will also be added in future patches. The tests included are for asserting that we can declare these types. Differential Revision: https://reviews.llvm.org/D46084 llvm-svn: 333814
* Cap "voluntary" vector alignment at 16 for all Darwin platforms.John McCall2018-06-015-68/+58
| | | | | | | | | | | | | | | | | | | | | This fixes two major problems: - We were not capping vector alignment as desired on 32-bit ARM. - We were using different alignments based on the AVX settings on Intel, so we did not have a consistent ABI. This is an ABI break, but we think we can get away with it because vectors tend to be used mostly in inline code (which is why not having a consistent ABI has not proven disastrous on Intel). Intel's AVX types are specified as having 32-byte / 64-byte alignment, so align them explicitly instead of relying on the base ABI rule. Note that this sort of attribute is stripped from template arguments in template substitution, so there's a possibility that code templated over vectors will produce inadequately-aligned objects. The right long-term solution for this is for alignment attributes to be interpreted as true qualifiers and thus preserved in the canonical type. llvm-svn: 333791
* [X86] Rewrite avx512vbmi unmasked and maskz macro intrinsics to be wrappers ↵Craig Topper2018-06-012-36/+180
| | | | | | | | | | around their __builtin function with appropriate arguments rather than just passing arguments to the masked intrinsic. This is more consistent with all of our other avx512 macro intrinsics. It also fixes a bad cast where an argument was casted to mmask8 when it should have been a mmask16. llvm-svn: 333778
* [OpenMP] Fix typo in NVPTX linker, NFC.Jonas Hahnfeld2018-06-011-1/+1
| | | | | | | Clang calls "nvlink" for linking multiple object files with OpenMP target functions, so correct this information when printing errors. llvm-svn: 333757
* Fix unused variable warning from r333718 Erich Keane2018-06-011-1/+1
| | | | llvm-svn: 333752
* [OpenCL, OpenMP] Fix crash when OpenMP used in OpenCL fileErich Keane2018-06-011-3/+4
| | | | | | | | | | | | | | | | | | | | | | | Compiler crashes when omp simd is used in an OpenCL file: clang -c -fopenmp omp_simd.cl __kernel void test(global int *data, int size) { #pragma omp simd for (int i = 0; i < size; ++i) { } } The problem seems to be the check added to verify block pointers have initializers. An OMPCapturedExprDecl is created to capture ‘size’ but there is no TypeSourceInfo. The change just uses getType() directly. Patch-By: mikerice Differential Revision: https://reviews.llvm.org/D46667 llvm-svn: 333746
* [X86] Remove leftover semicolons at end of macrosMartin Storsjo2018-06-015-13/+13
| | | | | | | This was missed in a few places in SVN r333613, causing compilation errors if these macros are used e.g. as parameter to a function. llvm-svn: 333734
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