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* [ARM] Pass subtarget feature "+strict-align".Akira Hatanaka2015-07-281-21/+36
| | | | | | | | | | | | | | This commit changes the driver to save subtarget feature "+strict-align" to the IR instead of using backend option "arm-strict-align". This is needed for LTO. Also, move the logic in ARM backend that was deciding whether strict alignment should be forced to the front-end. rdar://problem/21529937 http://reviews.llvm.org/D11472 llvm-svn: 243489
* Add -femulated-tls flag to select the emulated TLS model.Chih-Hung Hsieh2015-07-281-0/+6
| | | | | | | | | This will be used for old targets like Android that do not support ELF TLS models. Differential Revision: http://reviews.llvm.org/D10524 llvm-svn: 243441
* Use TargetParser to parse -mhwdiv command line option in Driver.Alexandros Lamprineas2015-07-281-13/+2
| | | | | | Change-Id: I2ebc40f77af75ec6b43ce8364d6d5a1d29988bd6 Phabricator: http://reviews.llvm.org/D11501 llvm-svn: 243398
* [ARM] Implement -Wa,-mfpu and friends for assemblersRenato Golin2015-07-271-62/+115
| | | | | | | | | | | This patch allows Clang to pass on -Wa,-mfpu, -Wa,-mhwdiv and -Wa,-mcpu to the integrated assembler (via target-features), but -march is still not being passed, but validated. In case the command line has both -mxxx and -Wa,-mxxx, we warn that the naked one will not be used in assembler mode. llvm-svn: 243353
* [ARM] Changes to Arch/CPU handling to help with -Wa,-mfpu etc. (nfc)Renato Golin2015-07-271-36/+75
| | | | | | | | | | | | To be able to handle -Wa, options in the assembler (ClangAs), we need to make the handling of options based on the value of the options, not direct Arguments from the list, since the list is immutable. No functional change in this patch, but this allows validating of -Wa,-mfpu and friends in the same way we validate -mfpu and friends, *just* for the assembler. llvm-svn: 243352
* [AArch64] Unconditionally pass subtarget feature reserve-x18 on Darwin.Akira Hatanaka2015-07-271-3/+5
| | | | | | | After r243308, the front-end is responsible for checking the target OS and passing reserve-x18 if the target is Darwin. llvm-svn: 243310
* Rename {Hexagon,NaCl}_TC to {Hexagon,NaCl}ToolChain respectively. NFCDouglas Katzman2015-07-271-23/+24
| | | | | | | | | Also rename XCore (the toolchain) to XCoreToolChain since XCore is also a namespace for its tools. Differential Revision: http://reviews.llvm.org/D10609 llvm-svn: 243279
* Setting ARM dynamic linker name from commandlineRenato Golin2015-07-271-2/+4
| | | | | | | | | | Currently trigger to select hard-float linker is only based of -gnueabihf appearing in target triplet, but we should also select it when hardfloat is requested via cmdline. Patch by Khem Raj. llvm-svn: 243262
* [clang-cl] Handle -O correctlyDavid Majnemer2015-07-271-4/+18
| | | | | | | | | | | | | | | We had multiple bugs here: - We didn't support multiple optimization options in one argument. e.g. -O2y- - We didn't correctly expand -O[12dx] to their respective options. - We treated -O1 as clang -O1 instead of clang -Os. - We treated -Ox as clang -O3 instead of clang -O2. In fact, cl's -Ox option is *less* powerful than cl's -O2 option despite -Ox described as "Full Optimization". This fixes PR24003. llvm-svn: 243261
* [clang-cl] Add fallback support for /ZlDavid Majnemer2015-07-251-0/+1
| | | | llvm-svn: 243207
* [AArch64] Pass subtarget feature "+reserve-x18" instead of passing backendAkira Hatanaka2015-07-251-5/+3
| | | | | | | | | | | | | | option "-aarch64-reserve-x18". This change is needed since backend options do not make it to the backend when doing LTO and are not capable of changing the behavior of code-gen passes on a per-function basis. rdar://problem/21529937 Differential Revision: http://reviews.llvm.org/D11462 llvm-svn: 243185
* [clang-cl] Implement support for the /Zl flagDavid Majnemer2015-07-241-8/+15
| | | | | | | | | The flag allows users to specify that they do not want the object file to have any implicit /defaultlib directives. This fixes PR24236. llvm-svn: 243097
* [Compiler-RT] Remove dependency on libgcc_s/ehRenato Golin2015-07-231-7/+0
| | | | | | | | | | | | | | Currently, for --rtlib=compiler-rt on GNU systems, we're assuming that one has libgcc_s and libgcc_eh as low-level libraries, which when used in conjunction with -lunwind or -lc++abi, breaks that assumption. My original fix was wrong, and this patch reverts it to prepare for a new flag to choose the unwinder/C++ libraries. For the time being, people can use "-lgcc_s -lgcc_eh" or "-lunwind -lc++abi" or any combination they need explicitly. llvm-svn: 243025
* [mingw] Add support for -rtlib option and -stdlib option to the mingw driverReid Kleckner2015-07-221-15/+12
| | | | | | | | | | Now clang should be able to use compiler-rt and libc++ on mingw. Based on a patch by Martell Malone. Differential Revision: http://reviews.llvm.org/D11237 llvm-svn: 242905
* Pass -I options to integrates and external assemblersRenato Golin2015-07-221-0/+4
| | | | | | | | Fixes PR21000. Patch by Artem Belevich. llvm-svn: 242904
* [ARM] Pass subtarget feature "+reserve-r9" instead of passing backendAkira Hatanaka2015-07-211-7/+6
| | | | | | | | | | | | | | | | | | option "-arm-reserve-r9". This recommits r242736, which had to be reverted because the llvm-side change that was committed in r242737 caused the number of subtarget features to go over the limit of 64. This change is needed since backend options do not make it to the backend when doing LTO and are not capable of changing the behavior of code-gen passes on a per-function basis. rdar://problem/21529937 Differential Revision: http://reviews.llvm.org/D11319 llvm-svn: 242755
* Revert r242736.Akira Hatanaka2015-07-201-6/+7
| | | | | | | | | r242737 caused builds to fail with the following error message, so I'm reverting the clang side change too: error:Too many subtarget features! Bump MAX_SUBTARGET_FEATURES. llvm-svn: 242741
* [ARM] Pass subtarget feature "+reserve-r9" instead of passing backendAkira Hatanaka2015-07-201-7/+6
| | | | | | | | | | | | | | option "-arm-reserve-r9". This change is needed since backend options do not make it to the backend when doing LTO and are not capable of changing the behavior of code-gen passes on a per-function basis. rdar://problem/21529937 Differential Revision: http://reviews.llvm.org/D11319 llvm-svn: 242736
* Fixed style issues pointed out by Justin Bogner.Artem Belevich2015-07-201-4/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D11273 llvm-svn: 242698
* Allow case-insensitive values for -mtune for AArch64 target in line with GCC.Gabor Ballabas2015-07-201-4/+5
| | | | | | | | | GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -mtune option for the AArch64 target. Differential Revision: http://reviews.llvm.org/D10563 llvm-svn: 242663
* Driver/ToolChain/AMDGPU: Attempt to fix buildbots after r242601Tom Stellard2015-07-181-1/+1
| | | | llvm-svn: 242602
* Driver: Add AMDGPU toolchainTom Stellard2015-07-181-0/+20
| | | | | | | | | | | | | | Summary: This is a minimal toolchain, which sets the integrated assembler as default, and uses lld for linking. Reviewers: arsenm, mcrosier Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D10700 llvm-svn: 242601
* Fix -save-temp when using objc-arc, sanitizer and profilingSteven Wu2015-07-171-7/+4
| | | | | | | | | | | | Currently, -save-temp will cause ObjCARC optimization to be dropped, sanitizer pass to run early in the pipeline, and profiling instrumentation to run twice. Fix the issue by properly disable all passes in the optimization pipeline when generating bitcode output and parse some of the Language Options even when the input is bitcode so the passes can be setup correctly. llvm-svn: 242565
* [Mips] Set mips64r6 as default CPU for MIPS64 AndroidPetar Jovanovic2015-07-171-0/+4
| | | | | | | | Change default CPU for MIPS64 Android. Now it is mips64r6. Differential Revision: http://reviews.llvm.org/D11294 llvm-svn: 242522
* Driver: Determine file names for crash reports more reliablyJustin Bogner2015-07-171-47/+48
| | | | | | | | Guessing which file name to replace based on the -main-file-name argument to -cc1 is flawed. Instead, keep track of which arguments are inputs to each command. llvm-svn: 242504
* [ARM] Pass subtarget feature "+no-movt" instead of passing backend optionAkira Hatanaka2015-07-161-4/+4
| | | | | | | | | | | | | | "-arm-use-movt=0". This change is needed since backend options do not make it to the backend when doing LTO and are not capable of changing the behavior of code-gen passes on a per-function basis. rdar://problem/21529937 Differential Revision: http://reviews.llvm.org/D11025 llvm-svn: 242368
* [clang-cl] Disable C++ exceptions a different wayReid Kleckner2015-07-141-7/+3
| | | | | | | | | | Rather than making -fexceptions a core option that enables C++ EH in clang-cl, users can use the '-Xclang -fexceptions -Xclang -fcxx-exceptions' flag set. We weren't going to expose -fexceptions in clang-cl in the long run, so this way we don't add and then remove a flag. llvm-svn: 242176
* Add support for -fuse-ld= in the mingw toolchain driver.Yaron Keren2015-07-141-2/+10
| | | | | | | | | | | | We will still default to ld until such a time lld become a stable release. lld supports arm NT under the machine name "thumb2pe". http://reviews.llvm.org/D11088 Patch by Martell Malone Reviewed by Reid Kleckner llvm-svn: 242121
* [cuda] Driver changes to compile and stitch together host and device-side ↵Artem Belevich2015-07-131-8/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | CUDA code. NOTE: reverts r242077 to reinstate r242058, r242065, 242067 and includes fix for OS X test failures. - Changed driver pipeline to compile host and device side of CUDA files and incorporate results of device-side compilation into host object file. - Added a test for cuda pipeline creation in clang driver. New clang options: --cuda-host-only - Do host-side compilation only. --cuda-device-only - Do device-side compilation only. --cuda-gpu-arch=<ARCH> - specify GPU architecture for device-side compilation. E.g. sm_35, sm_30. Default is sm_20. May be used more than once in which case one device-compilation will be done per unique specified GPU architecture. Differential Revision: http://reviews.llvm.org/D9509 llvm-svn: 242085
* [OpenMP] Add TLS-based implementation for threadprivate directive.Samuel Antao2015-07-131-0/+10
| | | | llvm-svn: 242080
* This reverts commit r242058, r242065, r242067.Rafael Espindola2015-07-131-28/+8
| | | | | | | | | | The tests were failing on OS X. Revert "[cuda] Driver changes to compile and stitch together host and device-side CUDA code." Revert "Fixed regex to properly match '64' in the test case." Revert "clang/test/Driver/cuda-options.cu REQUIRES clang-driver, at least." llvm-svn: 242077
* [cuda] Driver changes to compile and stitch together host and device-side ↵Artem Belevich2015-07-131-8/+28
| | | | | | | | | | | | | | | | | | | | | | | CUDA code. - Changed driver pipeline to compile host and device side of CUDA files and incorporate results of device-side compilation into host object file. - Added a test for cuda pipeline creation in clang driver. New clang options: --cuda-host-only - Do host-side compilation only. --cuda-device-only - Do device-side compilation only. --cuda-gpu-arch=<ARCH> - specify GPU architecture for device-side compilation. E.g. sm_35, sm_30. Default is sm_20. May be used more than once in which case one device-compilation will be done per unique specified GPU architecture. Differential Revision: http://reviews.llvm.org/D9509 llvm-svn: 242058
* Disable C++ EH by default for clang-cl and MSVC environmentsReid Kleckner2015-07-101-16/+21
| | | | | | | | | We don't need any more bug reports from users telling us that MSVC-style C++ exceptions are broken. Developers and adventurous users can still test the existing functionality by passing along -fexceptions to either clang or clang-cl. llvm-svn: 241952
* Refactor PPC ABI handling to accept and silently ignore -mabi=altivec.Eric Christopher2015-07-101-3/+8
| | | | | | | | | All of the ABIs we support are altivec style anyhow and so the option doesn't make much sense with the modern ABIs. We could make this a more noisy ignore, but it would break builds for projects that just pass it along by default because of historical reasons. llvm-svn: 241925
* Factor PGO and coverage flag processing out of Clang::ConstructJobDiego Novillo2015-07-101-78/+85
| | | | | | | | | | The function is massively large and GCC is emitting stack overflow errors when building it (stack, as counted by the compiler, grows to more than 16Kb). The new flag processing logic added in r241825 took it over the limit. llvm-svn: 241918
* Re-use a single SmallString instance to reduce the stack frame sizeDaniel Jasper2015-07-101-19/+18
| | | | | | | In certain builds (msan), this can otherwise exceed the stack frame limit set for certain environments. llvm-svn: 241894
* Add GCC-compatible flags -fprofile-generate and -fprofile-use.Diego Novillo2015-07-091-17/+40
| | | | | | | | | | | | | | | | | | This patch adds support for specifying where the profile is emitted in a way similar to GCC. These flags are used to specify directories instead of filenames. When -fprofile-generate=DIR is used, the compiler will generate code to write to <DIR>/default.profraw. The patch also adds a couple of extensions: LLVM_PROFILE_FILE can still be used to override the directory and file name to use and -fprofile-use accepts both directories and filenames. To simplify the set of flags used in the backend, all the flags get canonicalized to -fprofile-instr-{generate,use} when passed to the backend. The decision to use a default name for the profile is done in the driver. llvm-svn: 241825
* [MIPS] Add support for direct-to-nacl in ClangPetar Jovanovic2015-07-081-0/+16
| | | | | | | | | | | For Mips direct-to-nacl, the goal is to be close to le32 front-end and use Mips32EL backend. This patch defines new NaClMips32ELTargetInfo and modifies it slightly to be close to le32. It also adds necessary parts, inline with ARM and X86. Differential Revision: http://reviews.llvm.org/D10739 llvm-svn: 241678
* Add a comment to explain how the decision to pass feature "+long-calls" is made.Akira Hatanaka2015-07-071-0/+3
| | | | llvm-svn: 241568
* [ARM] Pass subtarget feature "+long-calls" instead of passing backend optionAkira Hatanaka2015-07-071-16/+10
| | | | | | | | | | | | | "-arm-long-calls". This change allows using -mlong-calls/-mno-long-calls for LTO and enabling or disabling long call on a per-function basis. rdar://problem/21529937 Differential Revision: http://reviews.llvm.org/D9414 llvm-svn: 241565
* Support -pthread in mingw toolchain.Yaron Keren2015-07-061-4/+2
| | | | | | "-pthread" appends -lpthread after the object files list passed to the linker. llvm-svn: 241485
* Resubmit "Pass down the -flto option to the -cc1 job" (r239481)Teresa Johnson2015-07-061-0/+4
| | | | | | | | | | | | | | | | | | The patch is the same except for the addition of a new test for the issue that required reverting the dependent llvm commit. --Original Commit Message-- Pass down the -flto option to the -cc1 job, and from there into the CodeGenOptions and onto the PassManagerBuilder. This enables gating the new EliminateAvailableExternally module pass on whether we are preparing for LTO. If we are preparing for LTO (e.g. a -flto -c compile), the new pass is not included as we want to preserve available externally functions for possible link time inlining. llvm-svn: 241467
* Support mingw-w64 and mingw.org toolchains at any install location.Yaron Keren2015-07-021-0/+206
| | | | | | | | | | | | | No more hardcoded paths: clang will use -sysroot as gcc root location if provided. Otherwise, it will search for gcc on the path. If not found it will use the driver installed location. http://reviews.llvm.org/D5268 Patch by Ruben Van Boxem, Martell Malone, Yaron Keren. Reviewed by Reid Kleckner. llvm-svn: 241241
* Make getArchNameForCompilerRTLib return the right thing on 32-bit Windows. ↵Peter Collingbourne2015-07-021-0/+4
| | | | | | Fixes the tests there. llvm-svn: 241228
* Driver: add support for linking the UBSan runtime library on Windows.Peter Collingbourne2015-07-021-7/+3
| | | | | | | | | | | | | | On Windows the user may invoke the linker directly, so we might not have an opportunity to add runtime library flags to the linker command line. Instead, instruct the code generator to embed linker directive in the object file that cause the required runtime libraries to be linked. We might also want to do something similar for ASan, but it seems to have its own special complexities which may make this infeasible. Differential Revision: http://reviews.llvm.org/D10862 llvm-svn: 241225
* [clang-cl] Use /arch: to set the base target CPUReid Kleckner2015-06-301-0/+22
| | | | | | | | | | | | The main effect of this change is that /arch:IA32 will use i386 as the CPU, while clang-cl will continue to default to pentium4 (aka SSE2 plus the usual other features). /arch:AVX and /arch:AVX2 will also now enable the other features available in sandybridge and haswell respectively, which is consistent with MSDN. llvm-svn: 241077
* More range-based for loops. NFCDouglas Katzman2015-06-291-7/+5
| | | | llvm-svn: 240984
* Comment fixes. NFC.Douglas Katzman2015-06-291-2/+2
| | | | | | | | | - Hexagon options were physically next to to ones that had a preceding comment saying "Double dash options", which they aren't. - The 'ld' tool classes are named Linker, not Link. llvm-svn: 240980
* clang-format some of the files in lib/Driver. NFCDouglas Katzman2015-06-261-715/+638
| | | | | | | | | Nothing was hand edited afterward except a few literal strings and comments that were poorly broken. Differential Revision: http://reviews.llvm.org/D10689 llvm-svn: 240791
* Use more range-based for loopsDouglas Katzman2015-06-251-6/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D10738 llvm-svn: 240674
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