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* Restructure the propagation of -fPIC/-fPIE.Rafael Espindola2016-06-231-4/+2
| | | | | | | | | | | | | The PIC and PIE levels are not independent. In fact, if PIE is defined it is always the same as PIC. This is clear in the driver where ParsePICArgs returns a PIC level and a IsPIE boolean. Unfortunately that is currently lost and we pass two redundant levels down the pipeline. This patch keeps a bool and a PIC level all the way down to codegen. llvm-svn: 273566
* Add support for /Ob1 and -finline-hint-functions flagsHans Wennborg2016-06-221-0/+1
| | | | | | | | | | | | | | | | Add support for /Ob1 (and equivalent -finline-hint-functions), which enable inlining only for functions marked inline, either explicitly (via inline keyword, for example), or implicitly (function definition in class body, for example). This works by enabling inlining pass, and adding noinline attribute to every function not marked inline. Patch by Rudy Pons <rudy.pons@ilod.org>! Differential Revision: http://reviews.llvm.org/D20647 llvm-svn: 273440
* Add a ENABLE_X86_RELAX_RELOCATIONS cmake option.Rafael Espindola2016-06-201-1/+1
| | | | | | This corresponds to binutils' --enable-x86-relax-relocations. llvm-svn: 273224
* [X86] Add -mno-iamcu option.Andrey Turetskiy2016-06-201-4/+6
| | | | | | | | | | Add -mno-iamcu option to: 1) Countervail -miamcu option easily 2) Be compatible with GCC which supports this option Differential Revision: http://reviews.llvm.org/D21469 llvm-svn: 273147
* Driver: introduce and use `-isystem-after` for cross-windowsSaleem Abdulrasool2016-06-171-0/+7
| | | | | | | | | | | | | | This mirrors the many other -i*after options to insert a new system search directory at the end of the search path. This makes it possible to actually inject a search path after the resource dir. This option is similar in spirit to the /imsvc option in the clang-cl driver. This is needed to properly use the driver for Windows targets where the clang headers wrap some of the system headers. This concept is actually useful on other targets (e.g. Linux) and would be really easy to support on the core toolchain. llvm-svn: 273016
* Compilation for Intel MCU (Part 3/3)Andrey Turetskiy2016-06-161-14/+33
| | | | | | | | | | | | | This is the last patch required to support compilation for Intel MCU target (e.g. Intel(R) Quark(TM) micro controller D 2000). When IAMCU triple is used: * Use IAMCU linker output format * Link with IAMCU crt objects * Link with IAMCU libraries Differential Revision: http://reviews.llvm.org/D20675 llvm-svn: 272885
* Compilation for Intel MCU (Part 2/3)Andrey Turetskiy2016-06-161-3/+14
| | | | | | | | | | | | This is the second patch required to support compilation for Intel MCU target (e.g. Intel(R) Quark(TM) micro controller D 2000). When IAMCU triple is used: * Recognize and use IAMCU GCC toolchain * Set up include paths * Forbid C++ Differential Revision: http://reviews.llvm.org/D19274 llvm-svn: 272883
* Add support to clang-cl driver for /GS switchEtienne Bergeron2016-06-151-0/+13
| | | | | | | | | | | | | | | | | | | Summary: This patch is adding command-line support for the MSVC buffer security check. The buffer security check is turned on with the '/GS' compiler switch. https://msdn.microsoft.com/en-us/library/8dbf701c.aspx The MSVC buffer security check in implemented here: http://reviews.llvm.org/D20346 Reviewers: hans, rnk Subscribers: chrisha, cfe-commits, rnk, hans, thakis Differential Revision: http://reviews.llvm.org/D20347 llvm-svn: 272832
* [CUDA][OpenMP] Create generic offload toolchainsSamuel Antao2016-06-131-4/+4
| | | | | | | | | | | | | | | | | | | Summary: This patch introduces the concept of offloading tool chain and offloading kind. Each tool chain may have associated an offloading kind that marks it as used in a given programming model that requires offloading. It also adds the logic to iterate on the tool chains based on the kind. Currently, only CUDA is supported, but in general a programming model (an offloading kind) may have associated multiple tool chains that require supporting offloading. This patch does not add tests - its goal is to keep the existing functionality. This patch is the first of a series of three that attempts to make the current support of CUDA more generic and easier to extend to other programming models, namely OpenMP. It tries to capture the suggestions/improvements/concerns on the initial proposal in http://lists.llvm.org/pipermail/cfe-dev/2016-February/047547.html. It only tackles the more consensual part of the proposal, i.e.does not address the problem of intermediate files bundling yet. Reviewers: ABataev, jlebar, echristo, hfinkel, tra Subscribers: guansong, Hahnfeld, andreybokhanko, tcramer, mkuron, cfe-commits, arpith-jacob, carlo.bertolli, caomhin Differential Revision: http://reviews.llvm.org/D18170 llvm-svn: 272571
* Driver: make it easier to select the SjLj EH modelSaleem Abdulrasool2016-06-101-1/+2
| | | | | | | | | | | GCC still permits enabling the SjLj EH model. This is something which can be done on various targets. Hoist the -fsjlj-exceptions option into the driver and pass it through. This allows one to opt into the alternative EH model while retaining the default to be the target's default. Resolves PR27749! llvm-svn: 272424
* This patch fixes target linker emulation for ARM 32 big endian.Strahinja Petrovic2016-06-101-1/+1
| | | | llvm-svn: 272402
* [mips] The default ABI depends on the CPU not the Arch on MTI and IMG vendor ↵Daniel Sanders2016-06-061-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | triples. Summary: 32-bit CPU's default to O32. 64-bit CPU's default to N64. The default CPU (mips32r2/mips64r2) still depends on the arch so there's no functional change when the CPU isn't specified but commands like: clang -target mips-mti-linux-gnu -mips64r2 will now default to a 64-bit ABI like our gcc toolchains do* instead of asserting in the backend**. Other vendors (including Triple::UnknownVendor) still derive the default ABI from the arch. * Although not the same one as our gcc toolchains, clang has historically defaulted to N64 where gcc defaults to N32. ** Mixing O32 and a 64-bit CPU causing assertions is a long-standing bug. Reviewers: atanasyan Subscribers: sdardis, cfe-commits Differential Revision: http://reviews.llvm.org/D21016 llvm-svn: 271884
* Add PIE magic for NetBSD. Add tests for the correct flags forJoerg Sonnenberger2016-06-041-9/+10
| | | | | | non-shared, PIE and shared output mode. llvm-svn: 271801
* RAS extensions are part of ARMv8.2.Sjoerd Meijer2016-06-031-0/+2
| | | | | | | | | | This patch enables +ras +noras to AArch64 in clang. Patch by: Roger Ferrer Ibanez and Oliver Stannard Differential Revision: http://reviews.llvm.org/D20283 llvm-svn: 271672
* This adds target support and tests for Cortex-A73Sjoerd Meijer2016-06-021-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D20864 llvm-svn: 271507
* Handle -Wa,--mrelax-relocations=[no|yes].Rafael Espindola2016-05-291-0/+10
| | | | llvm-svn: 271162
* [Driver] Fix driver support for color diagnosticsBruno Cardoso Lopes2016-05-271-28/+12
| | | | | | | | | | | | | | | | Diagnostics that happen during driver time do not have color output support unless -fcolor-diagonostic is explicitly passed into the driver. This is not a problem for cc1 since dianostic arguments are properly handled and color is enabled by default if the terminal supports it. Make the driver behave like CC1. There are tests that already check for these flags, but for the color itself there's no sensible way to test it. Differential Revision: http://reviews.llvm.org/D20404 rdar://problem/26290980 llvm-svn: 271042
* [mips] Compact branch policy setting.Simon Dardis2016-05-271-0/+21
| | | | | | | | | | | | | | This patch adds the commandline option -mcompact-branches={never,optimal,always), which controls how LLVM generates compact branches for MIPSR6 targets. By default, the compact branch policy is 'optimal' where LLVM will generate the most appropriate branch for any situation. The 'never' and 'always' policy will disable or always generate compact branches wherever possible respectfully. Reviewers: dsanders, vkalintiris, atanasyan Differential Revision: http://reviews.llvm.org/D20729 llvm-svn: 271000
* [mips] Kill 'support' for untested EABI.Daniel Sanders2016-05-271-1/+1
| | | | | | | | | | | | | | | | | Summary: There are no llvm backend tests* for EABI and no EABI buildbots. There were only three clang tests, all of which checked that -mabi=eabi was passed to the assembler. *There is a single backend test that specifies EABI but it actually tests MIPS16. Reviewers: atanasyan Subscribers: emaste, sdardis, atanasyan, cfe-commits Differential Revision: http://reviews.llvm.org/D20679 llvm-svn: 270998
* Turn copies into references as suggested by clang-tidy's ↵Benjamin Kramer2016-05-271-1/+1
| | | | | | performance-unnecessary-copy-initialization. llvm-svn: 270994
* [OPENMP] Fixed processing of '-fopenmp-version=' option and test.Alexey Bataev2016-05-271-1/+1
| | | | llvm-svn: 270962
* [AMDGPU] Remove individual debugger options + update featuresKonstantin Zhuravlyov2016-05-261-1/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D20336 llvm-svn: 270895
* [OPENMP] Add option '-fopenmp-version=[31|40|45]' allowing choosingAlexey Bataev2016-05-261-1/+3
| | | | | | | | | | OpenMP version. If '-fopenmp' option is provided '-fopenmp-version=' allows to control, which version of OpenMP must be supported. Currently it affects only the value of _OPENMP define. llvm-svn: 270838
* Revert "[AArch64] Using new TargetParser in Clang"Renato Golin2016-05-251-15/+39
| | | | | | | | This reverts commit r270688 and r270689. The issue is not a random order, but a different order for some targets and others (prob. Linux vs Darwin). Reverting until we have a better fix. llvm-svn: 270691
* [AArch64] Using new TargetParser in ClangRenato Golin2016-05-251-39/+15
| | | | | | | | | | Using AArch64TargetParser in clang to avoid repetitive string parsing. Use TargetParser to do ARCH/CPU/ArchExt parsing instead of local implementation. Patch by Jojo Ma. llvm-svn: 270688
* [Driver] Add support for -finline-functions and /Ob2 flagsHans Wennborg2016-05-241-2/+3
| | | | | | | | | | | | | | | | | | -finline-functions and /Ob2 are currently ignored by Clang. The only way to enable inlining is to use the global O flags, which also enable other options, or to emit LLVM bitcode using Clang, then running opt by hand with the inline pass. This patch allows to simply use the -finline-functions flag (same as GCC) or /Ob2 in clang-cl mode to enable inlining without other optimizations. This is the first patch of a serie to improve support for the /Ob flags. Patch by Rudy Pons <rudy.pons@ilod.org>! Differential Revision: http://reviews.llvm.org/D20576 llvm-svn: 270609
* [Sparc] Add software float option -msoft-floatJacob Baungard Hansen2016-05-241-15/+59
| | | | | | | | | | | | | | | Summary: Following patch D19265 which enable software floating point support in the Sparc backend, this patch enables the option to be enabled in the front-end using the -msoft-float option. The user should ensure a library (such as the builtins from Compiler-RT) that includes the software floating point routines is provided. Reviewers: jyknight, lero_chris Subscribers: jyknight, cfe-commits Differential Revision: http://reviews.llvm.org/D20419 llvm-svn: 270538
* Test commitJacob Baungard Hansen2016-05-231-0/+1
| | | | llvm-svn: 270435
* Driver: sink getLinuxDynamicLoader into the ToolchainSaleem Abdulrasool2016-05-221-70/+1
| | | | | | | | The parameter already requires the toolchain, sink the method into the class. This also enables the use of the distro detection logic which will be needed to support Exherbo's multiarch approach. llvm-svn: 270352
* Driver: simplify getDynameLinkerSaleem Abdulrasool2016-05-221-47/+49
| | | | | | | | Convert the cascading if/else to a switch. This makes it easier to follow the logic. Minor difference is that we no longer default to x86_64 but rather to the architecture specified by the architecture. llvm-svn: 270351
* Update for llvm change.Rafael Espindola2016-05-181-2/+0
| | | | llvm-svn: 269989
* [Mips] Finetuning MIPS32 Android default variantsPetar Jovanovic2016-05-181-3/+18
| | | | | | | | | MIPS32 Android defaults to FPXX ("-fpxx"). MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg"). Differential Revision: http://reviews.llvm.org/D20345 llvm-svn: 269914
* Support for MSVS default calling convention options (/Gd, /Gz, /Gv,Alexey Bataev2016-05-181-1/+10
| | | | | | | | | /Gr), by Alexander Makarov Patch for bug #27711 Differential Revision: http://reviews.llvm.org/D20171 llvm-svn: 269891
* [Mips] Set mips32 as default CPU for MIPS32 AndroidPetar Jovanovic2016-05-171-1/+3
| | | | | | | | Change default CPU for MIPS32 Android. Now it is mips32 (rev1). Differential Revision: http://reviews.llvm.org/D20313 llvm-svn: 269754
* [PS4] Change the names of some "environmental" things to what ourPaul Robinson2016-05-161-4/+4
| | | | | | | | licensees actually see in the toolchain we deliver to them. This will reduce the set of local patches we have to maintain. The triple is not changing. (The term ORBIS is an internal code name for PS4.) llvm-svn: 269671
* Get default -fms-compatibility-version from cl.exe's versionAdrian McCarthy2016-05-131-4/+10
| | | | | | | | | | | | | | -fms-compatibility-version was defaulting to 18 (VS 2013), which is a pain if your environment is pointing to version 19 (VS 2015) libraries. If cl.exe can be found, this patch uses its version number as the default instead. It re-uses the existing code to find the Visual Studio binaries folder and WinAPI methods to check its version. You can still explicitly specify a compatibility version on the command line. If you don't have cl.exe, this should be a no-op and you'll get the old default of 18. This affected the tests, which assumed that if you didn't specific a version, that it would default to 18, but this won't be true for all machines. So a couple test cases had to be eliminated and a couple others had to be tweaked to allow for various outputs. Addresses: https://llvm.org/bugs/show_bug.cgi?id=27215 Differential Revision: http://reviews.llvm.org/D20136 llvm-svn: 269515
* Simplify getLinuxDynamicLinker() by using a common variable for the triple. NFC.Vasileios Kalintiris2016-05-131-13/+12
| | | | llvm-svn: 269412
* [mips] Consult triple's vendor field before using musl's interpreter.Vasileios Kalintiris2016-05-131-1/+3
| | | | | | This should affect only the mips-mti-linux toolchain. llvm-svn: 269411
* [ubsan] Add -fsanitize-undefined-strip-path-components=NFilipe Cabecinhas2016-05-121-0/+4
| | | | | | | | | | | | | | | | | | | Summary: This option allows the user to control how much of the file name is emitted by UBSan. Tuning this option allows one to save space in the resulting binary, which is helpful for restricted execution environments. With a positive N, UBSan skips the first N path components. With a negative N, UBSan only keeps the last N path components. Reviewers: rsmith Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D19666 llvm-svn: 269309
* [Driver] Squash misleading indentation warning.Marcin Koscielnicki2016-05-121-6/+6
| | | | llvm-svn: 269279
* Embed bitcode in object file (clang cc1 part)Steven Wu2016-05-111-3/+9
| | | | | | | | | | | | | | | | | | | Summary: Teach clang to embed bitcode inside bitcode. When -fembed-bitcode cc1 option is used, clang will embed both the input bitcode and cc1 commandline into the bitcode in special sections before compiling to the object file. Using -fembed-bitcode-marker will only introduce a marker in both sections. Depends on D17390 Reviewers: rsmith Subscribers: yaron.keren, vsk, cfe-commits Differential Revision: http://reviews.llvm.org/D17392 llvm-svn: 269202
* [Power9] Enable -mcpu=pwr9 (-mcpu=power9) in the front endNemanja Ivanovic2016-05-091-0/+2
| | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D19684 It simply adds the handling for the option and the corresponding macros. llvm-svn: 268951
* AMDGPU: Use lld as the linker againTom Stellard2016-05-051-0/+2
| | | | | | | | | | | | | | Summary: Now that LLVM is emitting version 2 of the AMD code object, we can start using lld again for linking instead of our custom tool. Reviewers: arsenm, kzhuravl Subscribers: rafael, cfe-commits Differential Revision: http://reviews.llvm.org/D19952 llvm-svn: 268648
* [SystemZ] Add -mbackchain option.Marcin Koscielnicki2016-05-041-0/+10
| | | | | | | | | This option, like the corresponding gcc option, is SystemZ-specific and enables storing frame backchain links, as specified in the ABI. Differential Revision: http://reviews.llvm.org/D19891 llvm-svn: 268575
* Revert "[Driver] Quote clang full version in dwarf producer when invoking cc1as"Bruno Cardoso Lopes2016-05-021-2/+1
| | | | | | | | | | | | | | This reverts commit r264813 / 6484b95d634f53dd929c75265ef3c4decf397584. While using it in the shell is fine, this a problem when cc1as is invoked directly by the driver because single quoting the clang full version makes cc1as write out the version with the quotes in the final binary. If the user wants to copy-n-pastable output, it could use either -### or CC_PRINT_OPTIONS=1 clang -v ... llvm-svn: 268297
* Re-apply r267784, r267824 and r267830.Peter Collingbourne2016-04-281-26/+13
| | | | | | I have updated the compiler-rt tests. llvm-svn: 267903
* Revert r267784, r267824 and r267830.Benjamin Kramer2016-04-281-13/+26
| | | | | | | | | | It makes compiler-rt tests fail if the gold plugin is enabled. Revert "Rework interface for bitset-using features to use a notion of LTO visibility." Revert "Driver: only produce CFI -fvisibility= error when compiling." Revert "clang/test/CodeGenCXX/cfi-blacklist.cpp: Exclude ms targets. They would be non-cfi." llvm-svn: 267871
* Rework interface for bitset-using features to use a notion of LTO visibility.Peter Collingbourne2016-04-271-26/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Bitsets, and the compiler features they rely on (vtable opt, CFI), only have visibility within the LTO'd part of the linkage unit. Therefore, only enable these features for classes with hidden LTO visibility. This notion is based on object file visibility or (on Windows) dllimport/dllexport attributes. We provide the [[clang::lto_visibility_public]] attribute to override the compiler's LTO visibility inference in cases where the class is defined in the non-LTO'd part of the linkage unit, or where the ABI supports calling classes derived from abstract base classes with hidden visibility in other linkage units (e.g. COM on Windows). If the cross-DSO CFI mode is enabled, bitset checks are emitted even for classes with public LTO visibility, as that mode uses a separate mechanism to cause bitsets to be exported. This mechanism replaces the whole-program-vtables blacklist, so remove the -fwhole-program-vtables-blacklist flag. Because __declspec(uuid()) now implies [[clang::lto_visibility_public]], the support for the special attr:uuid blacklist entry is removed. Differential Revision: http://reviews.llvm.org/D18635 llvm-svn: 267784
* [esan] EfficiencySanitizer driver flagsDerek Bruening2016-04-211-0/+2
| | | | | | | | | | | | | | | | Summary: Adds a framework to enable the instrumentation pass for the new EfficiencySanitizer ("esan") family of tools. Adds a flag for esan's cache fragmentation tool via -fsanitize=efficiency-cache-frag. Adds appropriate tests for the new flag. Reviewers: eugenis, vitalybuka, aizatsky, filcab Subscribers: filcab, kubabrecka, llvm-commits, zhaoqin, kcc Differential Revision: http://reviews.llvm.org/D19169 llvm-svn: 267059
* Compilation for Intel MCU (Part 1/3)Andrey Turetskiy2016-04-211-0/+7
| | | | | | | | | | | Add -miamcu option which: * Sets IAMCU triple * Sets IAMCU ABI * Enforces static compilation Differential Revision: http://reviews.llvm.org/D18398 llvm-svn: 266972
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