| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
| |
This is a reapplication of r161914 now that the scoping issue has been resolved
in r161966.
llvm-svn: 161967
|
|
|
|
| |
llvm-svn: 161931
|
|
|
|
| |
llvm-svn: 161914
|
|
|
|
|
|
| |
calls. // rdar://8315199
llvm-svn: 161891
|
|
|
|
|
|
|
|
|
| |
The backend has to legalize i64 types by splitting them into two 32-bit pieces,
which leads to poor quality code. If we produce code for these intrinsics that
uses one-element vector types, which can live in Neon vector registers without
getting split up, then the generated code is much better. Radar 11998303.
llvm-svn: 161879
|
|
|
|
|
|
| |
rdar://9877866
llvm-svn: 161790
|
|
|
|
|
|
| |
evaluated into a CXXTypeid member function. No functionality change.
llvm-svn: 161779
|
|
|
|
| |
llvm-svn: 161744
|
|
|
|
| |
llvm-svn: 161702
|
|
|
|
|
|
| |
regression on test/CodeGenObjC/2008-10-3-EhValue.m on non-Darwin targets.
llvm-svn: 161700
|
|
|
|
|
|
|
| |
rdar://9877866
PR://13350
llvm-svn: 161694
|
|
|
|
| |
llvm-svn: 161659
|
|
|
|
| |
llvm-svn: 161642
|
|
|
|
|
|
| |
from before r159168. PR13562.
llvm-svn: 161554
|
|
|
|
| |
llvm-svn: 161546
|
|
|
|
|
|
| |
only machine specific clobbers are modeled.
llvm-svn: 161524
|
|
|
|
|
|
| |
member of reference type in an anonymous struct. PR13154.
llvm-svn: 161473
|
|
|
|
|
|
|
| |
objc_release for performance for these most often
called APIs. // rdar://12040837
llvm-svn: 161448
|
|
|
|
|
|
|
|
| |
just let the alignment be zero.
PR13531
llvm-svn: 161379
|
|
|
|
| |
llvm-svn: 161369
|
|
|
|
|
|
|
|
| |
that we attach the lost qualifiers.
Fixes rdar://11882155
llvm-svn: 161368
|
|
|
|
|
|
| |
intrinsic.
llvm-svn: 161310
|
|
|
|
| |
llvm-svn: 161303
|
|
|
|
| |
llvm-svn: 161287
|
|
|
|
| |
llvm-svn: 161286
|
|
|
|
| |
llvm-svn: 161148
|
|
|
|
|
|
|
|
|
|
|
| |
don't explode if the offset we get is zero. This can happen if
you have an empty virtual base class.
While I'm at it, remove an unnecessary block from the IR-generation
of the null-check, mark the eventual GEP as inbounds, and generally
prettify.
llvm-svn: 161100
|
|
|
|
| |
llvm-svn: 161044
|
|
|
|
|
|
|
|
| |
on object pointers and whether pointer arithmetic on object pointers
is supported. Make ObjFW interpret subscripts as pseudo-objects.
Based on a patch by Jonathan Schleifer.
llvm-svn: 161028
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
attribute. It is a variation of the x86_64 ABI:
* A struct returned indirectly uses the first register argument to pass the
pointer.
* Floats, Doubles and structs containing only one of them are not passed in
registers.
* Other structs are split into registers if they fit on the remaining ones.
Otherwise they are passed in memory.
* When a struct doesn't fit it still consumes the registers.
llvm-svn: 161022
|
|
|
|
|
|
| |
this-adjustment thunk in ARC++.
llvm-svn: 161014
|
|
|
|
| |
llvm-svn: 160851
|
|
|
|
|
|
| |
No need to abuse default arguments.
llvm-svn: 160684
|
|
|
|
|
|
|
| |
variables that have static storage duration, it removes debug info on the
emitted initializer function but not all debug info about this variable.
llvm-svn: 160659
|
|
|
|
| |
llvm-svn: 160652
|
|
|
|
| |
llvm-svn: 160648
|
|
|
|
|
|
| |
APSInt::isSameValue() when comparing different sized APSInt's.
llvm-svn: 160641
|
|
|
|
| |
llvm-svn: 160622
|
|
|
|
|
|
|
| |
Under AAPCS, long double is the same as double, which means it should be
allowed as part of a homogeneous aggregate.
llvm-svn: 160586
|
|
|
|
| |
llvm-svn: 160580
|
|
|
|
|
|
|
|
| |
previous ResetObjCLayout calls since this is now handled in Sema.
Part of rdar://11842763
llvm-svn: 160527
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
intrinsics. The second instruction(s) to be handled are the vector versions
of count set bits (ctpop).
The changes here are to clang so that it generates a target independent
vector ctpop when it sees an ARM dependent vector bits set count. The changes
in llvm are to match the target independent vector ctpop and in
VMCore/AutoUpgrade.cpp to update any existing bc files containing ARM
dependent vector pop counts with target-independent ctpops. There are also
changes to an existing test case in llvm for ARM vector count instructions and
to a test for the bitcode upgrade.
<rdar://problem/11892519>
There is deliberately no test for the change to clang, as so far as I know, no
consensus has been reached regarding how to test neon instructions in clang;
q.v. <rdar://problem/8762292>
llvm-svn: 160409
|
|
|
|
| |
llvm-svn: 160388
|
|
|
|
|
|
| |
to forward to the correct function.
llvm-svn: 160373
|
|
|
|
| |
llvm-svn: 160353
|
|
|
|
|
|
|
| |
This function has two versions. The first one is used for a register operand.
The second one is used for an immediate number.
llvm-svn: 160308
|
|
|
|
| |
llvm-svn: 160238
|
|
|
|
| |
llvm-svn: 160220
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
intrinsics with target-indepdent intrinsics. The first instruction(s) to be
handled are the vector versions of count leading zeros (ctlz).
The changes here are to clang so that it generates a target independent
vector ctlz when it sees an ARM dependent vector ctlz. The changes in llvm
are to match the target independent vector ctlz and in VMCore/AutoUpgrade.cpp
to update any existing bc files containing ARM dependent vector ctlzs with
target-independent ctlzs. There are also changes to an existing test case in
llvm for ARM vector count instructions and a new test for the bitcode upgrade.
<rdar://problem/11831778>
There is deliberately no test for the change to clang, as so far as I know, no
consensus has been reached regarding how to test neon instructions in clang;
q.v. <rdar://problem/8762292>
llvm-svn: 160201
|
|
|
|
|
|
| |
PR12785
llvm-svn: 160121
|