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* Re-land r345676 "[Win64] Handle passing i128 by value"Reid Kleckner2018-10-311-11/+33
| | | | | | | Fix the unintended switch/case fallthrough to avoid changing long double behavior. llvm-svn: 345748
* Revert r345676 due to test failure.Richard Trieu2018-10-311-33/+11
| | | | | | This was causing CodeGen/mingw-long-double.c to start failing. llvm-svn: 345691
* [Win64] Handle passing i128 by valueReid Kleckner2018-10-301-11/+32
| | | | | | | | | | | | For arguments, pass it indirectly, since the ABI doc says pretty clearly that arguments larger than 8 bytes are passed indirectly. This makes va_list handling easier, anyway. When returning, GCC returns in XMM0, and we match them. Fixes PR39492. llvm-svn: 345676
* [AArch64] Support Windows stack probe command-line arguments.Eli Friedman2018-10-261-0/+11
| | | | | | | | | | | Adds support for -mno-stack-arg-probe and -mstack-probe-size. (Not really happy copy-pasting code, but that's what we do for all the other Windows targets.) Differential Revision: https://reviews.llvm.org/D53617 llvm-svn: 345354
* [AArch64] Branch Protection and Return Address Signing B Key SupportLuke Cheeseman2018-10-251-6/+14
| | | | | | | | | | | - Add support for -mbranch-protection=<type>[+<type>]* where - <type> ::= [standard, none, bti, pac-ret[+b-key,+leaf]*] - The protection emits relevant function attributes - sign-return-address=<scope> - sign-return-address-key=<key> - branch-protection llvm-svn: 345273
* [MinGW] Fix passing a sanitizer lib name as dependent libMartin Storsjo2018-10-101-1/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D52990 llvm-svn: 344125
* llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song2018-09-261-2/+2
| | | | | | | | | | | | | | Summary: The convenience wrapper in STLExtras is available since rL342102. Reviewers: rsmith, #clang, dblaikie Reviewed By: rsmith, #clang Subscribers: mgrang, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D52576 llvm-svn: 343147
* [CodeGen][ARM] Coerce FP16 vectors to integer vectors when neededMikhail Maltsev2018-09-121-32/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: On targets that do not support FP16 natively LLVM currently legalizes vectors of FP16 values by scalarizing them and promoting to FP32. This causes problems for the following code: void foo(int, ...); typedef __attribute__((neon_vector_type(4))) __fp16 float16x4_t; void bar(float16x4_t x) { foo(42, x); } According to the AAPCS (appendix A.2) float16x4_t is a containerized vector fundamental type, so 'foo' expects that the 4 16-bit FP values are packed into 2 32-bit registers, but instead bar promotes them to 4 single precision values. Since we already handle scalar FP16 values in the frontend by bitcasting them to/from integers, this patch adds similar handling for vector types and homogeneous FP16 vector aggregates. One existing test required some adjustments because we now generate more bitcasts (so the patch changes the test to target a machine with native FP16 support). Reviewers: eli.friedman, olista01, SjoerdMeijer, javed.absar, efriedma Reviewed By: javed.absar, efriedma Subscribers: efriedma, kristof.beyls, cfe-commits, chrib Differential Revision: https://reviews.llvm.org/D50507 llvm-svn: 342034
* [AArch64] - return address signingLuke Cheeseman2018-08-171-0/+17
| | | | | | | | | | | | | | - Add a command line options -msign-return-address to enable return address signing - Armv8.3a added instructions to sign the return address to help mitigate against ROP attacks - This patch adds command line options to generate function attributes that signal to the back whether return address signing instructions should be added Differential revision: https://reviews.llvm.org/D49793 llvm-svn: 340019
* Remove trailing spaceFangrui Song2018-07-301-12/+12
| | | | | | sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h} llvm-svn: 338291
* [ARM, AArch64]: Use unadjusted alignment when passing composites as argumentsMomchil Velikov2018-07-301-5/+14
| | | | | | | | | | | | | | | | | | The "Procedure Call Procedure Call Standard for the ARM® Architecture" (https://static.docs.arm.com/ihi0042/f/IHI0042F_aapcs.pdf), specifies that composite types are passed according to their "natural alignment", i.e. the alignment before alignment adjustment on the entire composite is applied. The same applies for AArch64 ABI. Clang, however, used the adjusted alignment. GCC already implements the ABI correctly. With this patch Clang becomes compatible with GCC and passes such arguments in accordance with AAPCS. Differential Revision: https://reviews.llvm.org/D46013 llvm-svn: 338279
* [mips64][clang] Provide the signext attribute for i32 return valuesStefan Maksimovic2018-07-301-2/+8
| | | | | | | | Additional info: see r338019. Differential Revision: https://reviews.llvm.org/D49289 llvm-svn: 338239
* [RISCV] Add support for interrupt attributeAna Pazos2018-07-261-0/+21
| | | | | | | | | | | | | | | | | | | Summary: Clang supports the GNU style ``__attribute__((interrupt))`` attribute on RISCV targets. Permissible values for this parameter are user, supervisor, and machine. If there is no parameter, then it defaults to machine. Reference: https://gcc.gnu.org/onlinedocs/gcc/RISC-V-Function-Attributes.html Based on initial patch by Zhaoshi Zheng. Reviewers: asb, aaron.ballman Reviewed By: asb, aaron.ballman Subscribers: rkruppe, the_o, aaron.ballman, MartinMosbeck, brucehoult, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, rogfer01, cfe-commits Differential Revision: https://reviews.llvm.org/D48412 llvm-svn: 338045
* [Power9] Update fp128 as a valid homogenous aggregate base typeLei Huang2018-07-051-4/+9
| | | | | | | | | Update clang to treat fp128 as a valid base type for homogeneous aggregate passing and returning. Differential Revision: https://reviews.llvm.org/D48044 llvm-svn: 336308
* [WebAssembly] Add no-prototype attribute to prototype-less C functionsSam Clegg2018-06-251-0/+9
| | | | | | | | | | The WebAssembly backend in particular benefits from being able to distinguish between varargs functions (...) and prototype-less C functions. Differential Revision: https://reviews.llvm.org/D48443 llvm-svn: 335510
* [CUDA][HIP] Set kernel calling convention before arrange functionYaxun Liu2018-06-121-3/+4
| | | | | | | | | | | | | Currently clang set kernel calling convention for CUDA/HIP after arranging function, which causes incorrect kernel function type since it depends on calling convention. This patch moves setting kernel convention before arranging function. Differential Revision: https://reviews.llvm.org/D47733 llvm-svn: 334457
* Support Swift calling convention for PPC64 targetsBob Wilson2018-05-251-2/+11
| | | | | | | This adds basic support for the Swift calling convention with PPC64 targets. Patch provided by Atul Sowani in bug report #37223 llvm-svn: 333316
* Remove \brief commands from doxygen comments.Adrian Prantl2018-05-091-6/+6
| | | | | | | | | | | | | | | | | | | This is similar to the LLVM change https://reviews.llvm.org/D46290. We've been running doxygen with the autobrief option for a couple of years now. This makes the \brief markers into our comments redundant. Since they are a visual distraction and we don't want to encourage more \brief markers in new code either, this patch removes them all. Patch produced by for i in $(git grep -l '\@brief'); do perl -pi -e 's/\@brief //g' $i & done for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done Differential Revision: https://reviews.llvm.org/D46320 llvm-svn: 331834
* [CUDA] Set LLVM calling convention for CUDA kernelYaxun Liu2018-04-201-0/+6
| | | | | | | | | | | | | | Some targets need special LLVM calling convention for CUDA kernel. This patch does that through a TargetCodeGenInfo hook. It only affects amdgcn target. Patch by Greg Rodgers. Revised and lit tests added by Yaxun Liu. Differential Revision: https://reviews.llvm.org/D45223 llvm-svn: 330447
* Fix __attribute__((force_align_arg_pointer)) misalignment bugErich Keane2018-04-191-20/+5
| | | | | | | | | | | | | | | | The force_align_arg_pointer attribute was using a hardcoded 16-byte alignment value which in combination with -mstack-alignment=32 (or larger) would produce a misaligned stack which could result in crashes when accessing stack buffers using aligned AVX load/store instructions. Fix the issue by using the "stackrealign" function attribute instead of using a hardcoded 16-byte alignment. Patch By: Gramner Differential Revision: https://reviews.llvm.org/D45812 llvm-svn: 330331
* Revert "Set calling convention for CUDA kernel"Artem Belevich2018-04-031-9/+0
| | | | | | | This reverts r328795 which introduced an issue with referencing __global__ function templates. More details in the original review D44747. llvm-svn: 329099
* Add helper to determine if a field is a zero-length bitfield.Richard Smith2018-04-021-2/+2
| | | | llvm-svn: 328999
* Set calling convention for CUDA kernelYaxun Liu2018-03-291-0/+9
| | | | | | | | | | | This patch sets target specific calling convention for CUDA kernels in IR. Patch by Greg Rodgers. Revised and lit test added by Yaxun Liu. Differential Revision: https://reviews.llvm.org/D44747 llvm-svn: 328795
* Disable emitting static extern C aliases for amdgcn target for CUDAYaxun Liu2018-03-291-0/+10
| | | | | | | | | Patch by Greg Rodgers. Revised and lit test added by Yaxun Liu. Differential Revision: https://reviews.llvm.org/D44987 llvm-svn: 328793
* [ObjC++] Make parameter passing and function return compatible with ObjCAkira Hatanaka2018-03-281-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ObjC and ObjC++ pass non-trivial structs in a way that is incompatible with each other. For example: typedef struct { id f0; __weak id f1; } S; // this code is compiled in c++. extern "C" { void foo(S s); } void caller() { // the caller passes the parameter indirectly and destructs it. foo(S()); } // this function is compiled in c. // 'a' is passed directly and is destructed in the callee. void foo(S a) { } This patch fixes the incompatibility by passing and returning structs with __strong or weak fields using the C ABI in C++ mode. __strong and __weak fields in a struct do not cause the struct to be destructed in the caller and __strong fields do not cause the struct to be passed indirectly. Also, this patch fixes the microsoft ABI bug mentioned here: https://reviews.llvm.org/D41039?id=128767#inline-364710 rdar://problem/38887866 Differential Revision: https://reviews.llvm.org/D44908 llvm-svn: 328731
* [clang] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang2018-03-271-2/+2
| | | | | | | | | | | r327219 added wrappers to std::sort which randomly shuffle the container before sorting. This will help in uncovering non-determinism caused due to undefined sorting order of objects having the same key. To make use of that infrastructure we need to invoke llvm::sort instead of std::sort. llvm-svn: 328636
* [AMDGPU] Update OpenCL to use 48 bytes of implicit arguments for AMDGPU (CLANG)Tony Tye2018-03-231-1/+1
| | | | | | | | Add two additional implicit arguments for OpenCL for the AMDGPU target using the AMDHSA runtime to support device enqueue. Differential Revision: https://reviews.llvm.org/D44696 llvm-svn: 328350
* [AMDGPU] Remove use of OpenCL triple environment and replace with function ↵Tony Tye2018-03-231-0/+5
| | | | | | | | | | | attribute for AMDGPU (CLANG) - Remove use of the opencl and amdopencl environment member of the target triple for the AMDGPU target. - Use a function attribute to communicate to the AMDGPU backend. Differential Revision: https://reviews.llvm.org/D43735 llvm-svn: 328347
* Delete BuiltinCC. NFC.Rafael Espindola2018-03-201-12/+0
| | | | | | It is always identical to RuntimeCC. llvm-svn: 328050
* [ObjC] Allow declaring __weak pointer fields in C structs in ARC.Akira Hatanaka2018-03-191-5/+22
| | | | | | | | | | | | | | | | | | | This patch uses the infrastructure added in r326307 for enabling non-trivial fields to be declared in C structs to allow __weak fields in C structs in ARC. This recommits r327206, which was reverted because it caused module-enabled builders to fail. I discovered that the CXXRecordDecl::CanPassInRegisters flag wasn't being set correctly in some cases after I moved it to RecordDecl. Thanks to Eric Liu for helping me investigate the bug. rdar://problem/33599681 https://reviews.llvm.org/D44095 llvm-svn: 327870
* Revert "[ObjC] Allow declaring __weak pointer fields in C structs inAkira Hatanaka2018-03-121-22/+5
| | | | | | | | | | | ARC." This reverts commit r327206 as there were test failures caused by this patch. http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20180312/221427.html llvm-svn: 327294
* [ObjC] Allow declaring __weak pointer fields in C structs in ARC.Akira Hatanaka2018-03-101-5/+22
| | | | | | | | | | | | This patch uses the infrastructure added in r326307 for enabling non-trivial fields to be declared in C structs to allow __weak fields in C structs in ARC. rdar://problem/33599681 Differential Revision: https://reviews.llvm.org/D44095 llvm-svn: 327206
* Support for the mno-stack-arg-probe flagHans Wennborg2018-02-231-10/+9
| | | | | | | | | | | | Adds support for this flag. There is also another piece for llvm (separate review). More info: https://bugs.llvm.org/show_bug.cgi?id=36221 By Ruslan Nikolaev! Differential Revision: https://reviews.llvm.org/D43108 llvm-svn: 325901
* [mips] Revert r325872Stefan Maksimovic2018-02-231-8/+0
| | | | | | | There are still outstanding issues with byVal arguments that prevent this from being committed. Revert for now. llvm-svn: 325899
* [mips] Reland r310704Stefan Maksimovic2018-02-231-0/+8
| | | | | | | | Recommit this change which was previously reverted for the 5.0.0 release since the failures identified were dealt with in r325782. llvm-svn: 325872
* Fix for #31362 - ms_abi is implemented incorrectly for values >=16 bytes.Alexander Ivchenko2018-02-081-1/+11
| | | | | | | | | | | | | | | | Summary: This patch is a fix for following issue: https://bugs.llvm.org/show_bug.cgi?id=31362 The problem was caused by front end lowering C calling conventions without taking into account calling conventions enforced by attribute. In this case win64cc was no correctly lowered on targets other than Windows. Reviewed By: rnk (Reid Kleckner) Differential Revision: https://reviews.llvm.org/D43016 Author: belickim <mateusz.belicki@intel.com> llvm-svn: 324594
* Don't pass ForDefinition_t in places it is redundant.Rafael Espindola2018-02-071-55/+35
| | | | | | | | | | | | | | I found this while looking at the ppc failures caused by the dso_local change. The issue was that the patch would produce the wrong answer for available_externally. Having ForDefinition_t available in places where the code can just check the linkage is a bit of a foot gun. This patch removes the ForDefiniton_t argument in places where the linkage is already know. llvm-svn: 324499
* [CodeGen][va_args] Correct Vector Struct va-arg 'in_reg' code genErich Keane2018-02-021-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | When trying to track down a different bug, we discovered that calling __builtin_va_arg on a vec3f type caused the SROA pass to issue a warning that there was an illegal access. Further research showed that the vec3f type is alloca'ed as size '12', but the _builtin_va_arg code on x86_64 was always loading this out of registers as {double, double}. Thus, the 2nd store into the vec3f was storing in bytes 12-15! This patch alters the original implementation which always assumed {double, double} to use the actual coerced type instead, so the LLVM-IR generated is a load/GEP/store of a <2 x float> and a float, rather than a double and a double. Tests were added for all combinations I could think of that would fit in 2 FP registers, and all work exactly as expected. Differential Revision: https://reviews.llvm.org/D42811 llvm-svn: 324098
* [ARM] Pass _Float16 as int or floatSjoerd Meijer2018-01-231-8/+10
| | | | | | | | | | | | Pass and return _Float16 as if it were an int or float for ARM, but with the top 16 bits unspecified, similarly like we already do for __fp16. We will implement proper half-precision function argument lowering in the ARM backend soon, but want to use this workaround in the mean time. Differential Revision: https://reviews.llvm.org/D42318 llvm-svn: 323185
* [RISCV] Implement RISCV ABI loweringAlex Bradbury2018-01-151-0/+181
| | | | | | | | | | | | | | | | | | | | RISCVABIInfo is implemented in terms of XLen, supporting both RV32 and RV64. Unfortunately we need to count argument registers in the frontend in order to determine when to emit signext and zeroext attributes. Integer scalars are extended according to their type up to 32-bits and then sign-extended to XLen when passed in registers, but are anyext when passed on the stack. This patch only implements the base integer (soft float) ABIs. For more information on the RISC-V ABI, see [the ABI doc](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md), my [golden model](https://github.com/lowRISC/riscv-calling-conv-model), and the [LLVM RISC-V calling convention patch](https://reviews.llvm.org/D39898#2d1595b4) (specifically the comment documenting frontend expectations). Differential Revision: https://reviews.llvm.org/D40023 llvm-svn: 322494
* Refactor handling of signext/zeroext in ABIArgInfoAlex Bradbury2018-01-121-51/+47
| | | | | | | | | | | | | | | | | | | | As @rjmccall suggested in D40023, we can get rid of ABIInfo::shouldSignExtUnsignedType (used to handle cases like the Mips calling convention where 32-bit integers are always sign extended regardless of the sign of the type) by adding a SignExt field to ABIArgInfo. In the common case, this new field is set automatically by ABIArgInfo::getExtend based on the sign of the type. For targets that want greater control, they can use ABIArgInfo::getSignExtend or ABIArgInfo::getZeroExtend when necessary. This change also cleans up logic in CGCall.cpp. There is no functional change intended in this patch, and all tests pass unchanged. As noted in D40023, Mips might want to sign-extend unsigned 32-bit integer return types. A future patch might modify MipsABIInfo::classifyReturnType to use MipsABIInfo::extendType. Differential Revision: https://reviews.llvm.org/D41999 llvm-svn: 322396
* Simplify the internal API for checking whether swiftcall passes a type ↵John McCall2018-01-071-12/+6
| | | | | | indirectly and expose that API externally. llvm-svn: 321957
* SystemZ Swift TargetInfo: swifterror support in the backend is brokenArnold Schwaighofer2017-11-071-1/+1
| | | | | | Return false for swifterror support until the backend is fixed. llvm-svn: 317589
* CodeGen: fix PPC Darwin variadicsSaleem Abdulrasool2017-10-251-1/+37
| | | | | | | | | Darwin uses char * for the variadic list type (va_list). We use the PPC SVR4 ABI for PPC, which uses a structure type for the va_list. When constructing the GEP, we would fail due to the incorrect handling for the va_list. Correct this to use the right type. llvm-svn: 316599
* [AMDGPU] Fix bug in enqueued block codegen due to an extra lineYaxun Liu2017-10-191-1/+0
| | | | llvm-svn: 316165
* Convert clang::LangAS to a strongly typed enumAlexander Richardson2017-10-151-19/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Convert clang::LangAS to a strongly typed enum Currently both clang AST address spaces and target specific address spaces are represented as unsigned which can lead to subtle errors if the wrong type is passed. It is especially confusing in the CodeGen files as it is not possible to see what kind of address space should be passed to a function without looking at the implementation. I originally made this change for our LLVM fork for the CHERI architecture where we make extensive use of address spaces to differentiate between capabilities and pointers. When merging the upstream changes I usually run into some test failures or runtime crashes because the wrong kind of address space is passed to a function. By converting the LangAS enum to a C++11 we can catch these errors at compile time. Additionally, it is now obvious from the function signature which kind of address space it expects. I found the following errors while writing this patch: - ItaniumRecordLayoutBuilder::LayoutField was passing a clang AST address space to TargetInfo::getPointer{Width,Align}() - TypePrinter::printAttributedAfter() prints the numeric value of the clang AST address space instead of the target address space. However, this code is not used so I kept the current behaviour - initializeForBlockHeader() in CGBlocks.cpp was passing LangAS::opencl_generic to TargetInfo::getPointer{Width,Align}() - CodeGenFunction::EmitBlockLiteral() was passing a AST address space to TargetInfo::getPointerWidth() - CGOpenMPRuntimeNVPTX::translateParameter() passed a target address space to Qualifiers::addAddressSpace() - CGOpenMPRuntimeNVPTX::getParameterAddress() was using llvm::Type::getPointerTo() with a AST address space - clang_getAddressSpace() returns either a LangAS or a target address space. As this is exposed to C I have kept the current behaviour and added a comment stating that it is probably not correct. Other than this the patch should not cause any functional changes. Reviewers: yaxunl, pcc, bader Reviewed By: yaxunl, bader Subscribers: jlebar, jholewinski, nhaehnle, Anastasia, cfe-commits Differential Revision: https://reviews.llvm.org/D38816 llvm-svn: 315871
* Fix build failure on android due to missing std::to_string()Yaxun Liu2017-10-141-1/+2
| | | | llvm-svn: 315805
* [OpenCL] Emit enqueued block as kernelYaxun Liu2017-10-141-0/+111
| | | | | | | | | | | | | | | | | In OpenCL the kernel function and non-kernel function has different calling conventions. For certain targets they have different argument ABIs. Also kernels have special function attributes and metadata for runtime to launch them. The blocks passed to enqueue_kernel is supposed to be executed as kernels. As such, the block invoke function should be emitted as kernel with proper calling convention and argument ABI. This patch emits enqueued block as kernel. If a block is both called directly and passed to enqueue_kernel, separate functions will be generated. Differential Revision: https://reviews.llvm.org/D38134 llvm-svn: 315804
* [ubsan] Function Sanitizer: Don't require writable text segmentsVedant Kumar2017-09-131-13/+6
| | | | | | | | | | | | | | | | | | This change will make it possible to use -fsanitize=function on Darwin and possibly on other platforms. It fixes an issue with the way RTTI is stored into function prologue data. On Darwin, addresses stored in prologue data can't require run-time fixups and must be PC-relative. Run-time fixups are undesirable because they necessitate writable text segments, which can lead to security issues. And absolute addresses are undesirable because they break PIE mode. The fix is to create a private global which points to the RTTI, and then to encode a PC-relative reference to the global into prologue data. Differential Revision: https://reviews.llvm.org/D37597 llvm-svn: 313096
* [CodeGen][x86_64] Enable 'force_align_arg_pointer' attribute at x86_64Erich Keane2017-08-301-0/+18
| | | | | | | | | | | | | This attribute is useful in OS development when we jump from 32 to 64 bit code and expect that 64bit function forces correct stack alignment. Related discussion: http://lists.llvm.org/pipermail/cfe-dev/2017-June/054358.html Patch By: anatol.pomozov (anatol.pomozov@gmail.com) Differential Revision:https://reviews.llvm.org/D36272 llvm-svn: 312173
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