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* [MS] Add support for __ud2 and __int2c MSVC intrinsicsReid Kleckner2017-03-061-0/+15
| | | | | | This was requested in PR31958 and elsewhere. llvm-svn: 297057
* [CodeGen] Don't reemit expressions for pass_object_size params.George Burgess IV2017-02-231-6/+13
| | | | | | | | | | | | | | This fixes an assertion failure in cases where we had expression statements that declared variables nested inside of pass_object_size args. Since we were emitting the same ExprStmt twice (once for the arg, once for the @llvm.objectsize call), we were getting issues with redefining locals. This also means that we can be more lax about when we emit @llvm.objectsize for pass_object_size args: since we're reusing the arg's value itself, we don't have to care so much about side-effects. llvm-svn: 295935
* AMDGPU: Add fmed3 half builtinMatt Arsenault2017-02-221-0/+1
| | | | llvm-svn: 295874
* Call the correct @llvm.objectsize.George Burgess IV2017-02-221-6/+7
| | | | | | | | | | | | | | | | | | The following code would crash clang: void foo(unsigned *const __attribute__((pass_object_size(0)))); void bar(unsigned *i) { foo(i); } This is because we were always selecting the version of `@llvm.objectsize` that takes an i8* in CodeGen. Passing an i32* as an i8* makes LLVM very unhappy. (Yes, I'm surprised that this remained uncaught for so long, too. :) ) As an added bonus, we'll now also use the appropriate address space when emitting @llvm.objectsize calls. llvm-svn: 295805
* [OpenCL] Correct ndrange_t implementationAnastasia Stulova2017-02-161-4/+13
| | | | | | | | | | | | | | | Removed ndrange_t as Clang builtin type and added as a struct type in the OpenCL header. Use type name to do the Sema checking in enqueue_kernel and modify IR generation accordingly. Review: D28058 Patch by Dmitry Borisenkov! llvm-svn: 295311
* [MS] Implement the __fastfail intrinsic as a builtinReid Kleckner2017-02-091-1/+38
| | | | | | | | | | __fastfail terminates the process immediately with a special system call. It does not run any process shutdown code or exception recovery logic. Fixes PR31854 llvm-svn: 294606
* AMDGPU: Add builtin for fmed3 intrinsicMatt Arsenault2017-01-311-1/+2
| | | | llvm-svn: 293600
* [OpenMP][NVPTX][CUDA] Adding support for printf for an NVPTX OpenMP device.Arpith Chacko Jacob2017-01-291-2/+2
| | | | | | | | | | | | | | | Support for CUDA printf is exploited to support printf for an NVPTX OpenMP device. To reflect the support of both programming models, the file CGCUDABuiltin.cpp has been renamed to CGGPUBuiltin.cpp, and the call EmitCUDADevicePrintfCallExpr has been renamed to EmitGPUDevicePrintfCallExpr. Reviewers: jlebar Differential Revision: https://reviews.llvm.org/D17890 llvm-svn: 293444
* [OpenCL] Add missing address spaces in IR generation of blocksAnastasia Stulova2017-01-271-20/+26
| | | | | | | | | | | | | | | | | | | | | | | | Modify ObjC blocks impl wrt address spaces as follows: - keep default private address space for blocks generated as local variables (with captures); - add global address space for global block literals (no captures); - make the block invoke function and enqueue_kernel prototype with the generic AS block pointer parameter to accommodate both private and global AS cases from above; - add block handling into default AS because it's implemented as a special pointer type (BlockPointer) in the frontend and therefore it is used as a pointer everywhere. This is also needed to accommodate both private and global AS blocks for the two cases above. - removes ObjC RT specific symbols (NSConcreteStackBlock and NSConcreteGlobalBlock) in the OpenCL mode. Review: https://reviews.llvm.org/D28814 llvm-svn: 293286
* P0426: Make the library implementation of constexpr char_traits a little easierRichard Smith2017-01-201-0/+4
| | | | | | | | | by providing a memchr builtin that returns char* instead of void*. Also add a __has_feature flag to indicate the presence of constexpr forms of the relevant <string> functions. llvm-svn: 292555
* [ARM] Use generic bitreverse intrinsic, rather than ARM specific rbit.Chad Rosier2017-01-101-3/+3
| | | | | | The backend already supports lowering this intrinsic to a rbit instruction. llvm-svn: 291582
* [AArch64] Use generic bitreverse intrinsic, rather than AArch64 specific.Chad Rosier2017-01-101-2/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D28400 llvm-svn: 291574
* Add vec_insert4b and vec_extract4b functions to altivec.hSean Fertile2017-01-051-0/+84
| | | | | | | | | Add builtins for the functions and custom codegen mapping the builtins to their corresponding intrinsics and handling the endian related swapping. https://reviews.llvm.org/D26546 llvm-svn: 291179
* CodeGen: force builtins to be localSaleem Abdulrasool2016-12-151-3/+3
| | | | | | | | Unfortunately _setjmp3 can be both import or local. The ASAN tests try to emulate the flags which makes this harder to detect. Rely on the linker creating or using thunks here instead. Should repair the ASAN windows bots. llvm-svn: 289783
* Update for clang after llvm::StringLiteral.Zachary Turner2016-12-131-1/+1
| | | | llvm-svn: 289553
* [clang] Version support for UBSan handlersFilipe Cabecinhas2016-12-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | This adds a way for us to version any UBSan handler by itself. The patch overrides D21289 for a better implementation (we're able to rev up a single handler). After this, then we can land a slight modification of D19667+D19668. We probably don't want to keep all the versions in compiler-rt (maybe we want to deprecate on one release and remove the old handler on the next one?), but with this patch we will loudly fail to compile when mixing incompatible handler calls, instead of silently compiling and then providing bad error messages. Reviewers: kcc, samsonov, rsmith, vsk Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D21695 llvm-svn: 289444
* [CodeGen][ARM] Make sure the value and type used to create a bitcastAkira Hatanaka2016-12-011-10/+20
| | | | | | | | | | | have the same size. This fixes an asset that is triggered when an address of a boolean variable is passed to __builtin_arm_ldrex or __builtin_arm_strex. rdar://problem/29269006 llvm-svn: 288404
* IRGen: Remove all uses of CreateDefaultAlignedLoad.Peter Collingbourne2016-11-281-9/+22
| | | | | | Differential Revision: https://reviews.llvm.org/D27157 llvm-svn: 288083
* [AMDGPU] Change frexp.exp builtin to return i16 for f16 inputKonstantin Zhuravlyov2016-11-181-3/+12
| | | | | | Differential Revision: https://reviews.llvm.org/D26863 llvm-svn: 287390
* vector load store with length (left justified) clang portionZaara Syeda2016-11-151-7/+32
| | | | llvm-svn: 286994
* [PowerPC] Implement BE VSX load/store builtins - clang portion.Tony Jiang2016-11-151-2/+18
| | | | | | | | | | | | This patch implements all the overloads for vec_xl_be and vec_xst_be. On BE, they behaves exactly the same with vec_xl and vec_xst, therefore they are simply implemented by defining a matching macro. On LE, they are implemented by defining new builtins and intrinsics. For int/float/long long/double, it is just a load (lxvw4x/lxvd2x) or store(stxvw4x/stxvd2x). For char/char/short, we also need some extra shuffling before or after call the builtins to get the desired BE order. For int128, simply call vec_xl or vec_xst. llvm-svn: 286971
* [OpenCL] Fix for integer parameters of enqueue_kernelAnastasia Stulova2016-11-141-23/+13
| | | | | | | | | | | | | | Make handling integer parameters more flexible: - For the number of events argument allow to pass larger integers than 32 bits as soon as compiler can prove that the range fits in 32 bits. If not, the diagnostic will be given. - Change type of the arguments specifying the sizes of the corresponding block arguments to be size_t. Review: https://reviews.llvm.org/D26509 llvm-svn: 286849
* [OpenCL] Change to clk_event parameter in enqueue_kernel.Anastasia Stulova2016-11-141-13/+9
| | | | | | | | | - Accept NULL pointer as a valid parameter value for clk_event. - Generate clk_event_t arguments of internal __enqueue_kernel_XXX function as pointers in generic address space. Review: https://reviews.llvm.org/D26507 llvm-svn: 286836
* [AMDGPU] Add f16 builtin functions (VI+)Konstantin Zhuravlyov2016-11-131-4/+12
| | | | | | Differential Revision: https://reviews.llvm.org/D26476 llvm-svn: 286741
* [X86] Merge (near) duplicate scalar non-temporal store code. NFCI.Simon Pilgrim2016-11-111-20/+10
| | | | llvm-svn: 286595
* [X86][AVX512][Clang] Add support for mask_{move|store|load}_s{s/d} and ↵Ayman Musa2016-11-081-0/+8
| | | | | | | | int2mask/mask2int intrinsics. Differential Revision: https://reviews.llvm.org/D26021 llvm-svn: 286229
* Use toCharUnitsFromBits instead of TargetInfo::getCharWidthDavid Majnemer2016-10-311-6/+8
| | | | llvm-svn: 285595
* Add support for __builtin_alloca_with_alignDavid Majnemer2016-10-311-0/+13
| | | | | | | | | | __builtin_alloca always uses __BIGGEST_ALIGNMENT__ for the alignment of the allocation. __builtin_alloca_with_align allows the programmer to specify the alignment of the allocation. This fixes PR30658. llvm-svn: 285544
* [CodeGen] Provide an appropriate alignment for dynamic allocasDavid Majnemer2016-10-271-1/+7
| | | | | | | | | | | | | | GCC documents __builtin_alloca as aligning the storage to at least __BIGGEST_ALIGNMENT__. MSVC documents essentially the same for the x64 ABI: https://msdn.microsoft.com/en-us/library/x9sx5da1.aspx The 32-bit ABI follows the same rule: it emits a call to _alloca_probe_16 Differential Revision: https://reviews.llvm.org/D24378 llvm-svn: 285316
* Refactor call emission to package the function pointer together withJohn McCall2016-10-261-10/+12
| | | | | | | | | | | abstract information about the callee. NFC. The goal here is to make it easier to recognize indirect calls and trigger additional logic in certain cases. That logic will come in a later patch; in the meantime, I felt that this was a significant improvement to the code. llvm-svn: 285258
* Add support for __builtin_os_log_format[_buffer_size]Mehdi Amini2016-10-241-1/+84
| | | | | | | | | | | | | | | | | This reverts commit r285007 and reapply r284990, with a fix for the opencl test that I broke. Original commit message follows: These new builtins support a mechanism for logging OS events, using a printf-like format string to specify the layout of data in a buffer. The _buffer_size version of the builtin can be used to determine the size of the buffer to allocate to hold the data, and then __builtin_os_log_format can write data into that buffer. This implements format checking to report mismatches between the format string and the data arguments. Most of this code was written by Chris Willmore. Differential Revision: https://reviews.llvm.org/D25888 llvm-svn: 285019
* Revert "Add support for __builtin_os_log_format[_buffer_size]"Mehdi Amini2016-10-241-84/+1
| | | | | | This reverts commit r284990, two opencl test are broken llvm-svn: 285007
* Add support for __builtin_os_log_format[_buffer_size]Mehdi Amini2016-10-241-1/+84
| | | | | | | | | | | | | | These new builtins support a mechanism for logging OS events, using a printf-like format string to specify the layout of data in a buffer. The _buffer_size version of the builtin can be used to determine the size of the buffer to allocate to hold the data, and then __builtin_os_log_format can write data into that buffer. This implements format checking to report mismatches between the format string and the data arguments. Most of this code was written by Chris Willmore. Differential Revision: https://reviews.llvm.org/D25888 llvm-svn: 284990
* [AVX-512] Replace 64-bit element and 512-bit vector pmin/pmax builtins with ↵Craig Topper2016-10-241-17/+44
| | | | | | native IR like we do for 128/256-bit, but with the addition of masking. llvm-svn: 284956
* [AVX-512] Remove masked 128/256-bit palignr builtins. We can just use a ↵Craig Topper2016-10-221-2/+0
| | | | | | select in the header file with the older unmasked versions instead. llvm-svn: 284920
* Implement __stosb intrinsic as a volatile memsetAlbert Gutowski2016-10-141-0/+5
| | | | | | | | | | | | Summary: We need `__stosb` to be an intrinsic, because SecureZeroMemory function uses it without including intrin.h. Implementing it as a volatile memset is not consistent with MSDN specification, but it gives us target-independent IR while keeping the most important properties of `__stosb`. Reviewers: rnk, hans, thakis, majnemer Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D25334 llvm-svn: 284253
* Add 64-bit MS _Interlocked functions as builtins againAlbert Gutowski2016-10-131-86/+151
| | | | | | | | | | | | Summary: Previously global 64-bit versions of _Interlocked functions broke buildbots on i386, so now I'm adding them as builtins for x86-64 and ARM only (should they be also on AArch64? I had problems with testing it for AArch64, so I left it) Reviewers: hans, majnemer, mstorsjo, rnk Subscribers: cfe-commits, aemerson Differential Revision: https://reviews.llvm.org/D25576 llvm-svn: 284172
* Implement MS _ReturnAddress and _AddressOfReturnAddress intrinsicsAlbert Gutowski2016-10-131-0/+8
| | | | | | | | | | Reviewers: rnk, thakis, majnemer, hans Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D25540 llvm-svn: 284131
* Implement MS _BitScan intrinsicsAlbert Gutowski2016-10-121-0/+74
| | | | | | | | | | | | Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin. Reviewers: hans, thakis, rnk, majnemer Subscribers: RKSimon, cfe-commits, aemerson Differential Revision: https://reviews.llvm.org/D25264 llvm-svn: 284060
* Revert "Change Builtins name to be stored as StringRef instead of raw ↵Mehdi Amini2016-10-111-2/+2
| | | | | | | | | | | | | | pointers (NFC)" This reverts commit r283802. It introduces temporarily static initializers, because StringRef ctor isn't (yet) constexpr for string literals. I plan to get there this week, but apparently GCC is so terrible with these static initializer right now (10 min+ extra codegen time was reported) that I'll hold on to this patch till the constexpr one is ready, and land these at the same time. llvm-svn: 283920
* Change Builtins name to be stored as StringRef instead of raw pointers (NFC)Mehdi Amini2016-10-101-2/+2
| | | | llvm-svn: 283802
* Implement MS read/write barriers and __faststorefence intrinsicAlbert Gutowski2016-10-101-0/+11
| | | | | | | | | | Reviewers: hans, rnk, majnemer Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D25442 llvm-svn: 283793
* Implement __emul, __emulu, _mul128 and _umul128 MS intrinsicsAlbert Gutowski2016-10-101-8/+21
| | | | | | | | | | Reviewers: rnk, thakis, majnemer, hans Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D25353 llvm-svn: 283785
* Separate builtins for x84-64 and i386; implement __mulh and __umulhAlbert Gutowski2016-10-041-0/+24
| | | | | | | | | | | | Summary: We need x86-64-specific builtins if we want to implement some of the MS intrinsics - winnt.h contains definitions of some functions for i386, but not for x86-64 (for example _InterlockedOr64), which means that we cannot treat them as builtins for both i386 and x86-64, because then we have definitions of builtin functions in winnt.h on i386. Reviewers: thakis, majnemer, hans, rnk Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D24598 llvm-svn: 283264
* [coroutines] Adding builtins for coroutine intrinsics and backendutil support.Gor Nishanov2016-10-031-0/+33
| | | | | | | | | | | | | Summary: With this commit simple coroutines can be created in plain C using coroutine builtins. Reviewers: rnk, EricWF, rsmith Subscribers: modocache, mgorny, mehdi_amini, beanz, cfe-commits Differential Revision: https://reviews.llvm.org/D24373 llvm-svn: 283155
* Use StringRef in Triple API (NFC)Mehdi Amini2016-10-011-4/+5
| | | | llvm-svn: 282996
* [MS] Implement __iso_volatile loads/stores as builtinsMartin Storsjo2016-09-301-0/+35
| | | | | | | | | | | | | | | | | | | | These are supposed to produce the same as normal volatile pointer loads/stores. When -volatile:ms is specified, normal volatile pointers are forced to have atomic semantics (as is the default on x86 in MSVC mode). In that case, these builtins should still produce non-atomic volatile loads/stores without acquire/release semantics, which the new test verifies. These are only available on ARM (and on AArch64, although clang doesn't support AArch64/Windows yet). This implements what is missing for PR30394, making it possible to compile C++ for ARM in MSVC mode with MSVC headers. Differential Revision: https://reviews.llvm.org/D24986 llvm-svn: 282900
* [CUDA] added __nvvm_atom_{sys|cta}_* builtins.Artem Belevich2016-09-281-1/+110
| | | | | | | | These builtins are available on sm_60+ GPU only. Differential Revision: https://reviews.llvm.org/D24944 llvm-svn: 282609
* [Power9] Builtins for ELF v.2 ABI conformance - front end portionNemanja Ivanovic2016-09-271-0/+19
| | | | | | | | | | This patch corresponds to review: https://reviews.llvm.org/D24397 It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with a number of altivec.h functions (refer to the code review for a list). llvm-svn: 282481
* [OpenCL] Augment pipe built-ins with pipe packet size and alignment.Alexey Bader2016-09-231-12/+30
| | | | | | | | | | Reviewers: Anastasia, vpykhtin Subscribers: dmitry, cfe-commits Differential Revision: https://reviews.llvm.org/D23992 llvm-svn: 282252
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