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path: root/clang/lib/CodeGen/CGBuiltin.cpp
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* [CodeGen] fix const-ness of cbrt and fmaSanjay Patel2017-11-131-9/+5
| | | | | | | | | | | cbrt() is always constant because it can't overflow or underflow. Therefore, it can't set errno. fma() is not always constant because it can overflow or underflow. Therefore, it can set errno. But we know that it never sets errno on GNU / MSVC, so make it constant in those environments. Differential Revision: https://reviews.llvm.org/D39641 llvm-svn: 318093
* Fix a bug with the use of __builtin_bzero in a conditional expression.John McCall2017-11-091-1/+1
| | | | | | Patch by Bharathi Seshadri! llvm-svn: 317776
* [NVPTX] Implement __nvvm_atom_add_gen_d builtin.Justin Lebar2017-11-071-0/+10
| | | | | | | | | | | | | | | Summary: This just seems to have been an oversight. We already supported the f64 atomic add with an explicit scope (e.g. "cta"), but not the scopeless version. Reviewers: tra Subscribers: jholewinski, sanjoy, cfe-commits, llvm-commits, hiraditya Differential Revision: https://reviews.llvm.org/D39638 llvm-svn: 317623
* [X86] Replace the mask cmpeq/cmple/cmplt/cmpgt/cmpge/cmpneq intrinsics with ↵Craig Topper2017-11-061-26/+0
| | | | | | | | macros that just pass the right comparison predicate value to the regular cmp intrinsic. Remove mask cmpeq/cmpgt builtins that are now unused. This shortens the intrinsic headers a little and allows us to get rid of the cmpeq and cmpgt handling from CGBuiltin.cpp. llvm-svn: 317506
* [CodeGen] map sqrt libcalls to llvm.sqrt when errno is not setSanjay Patel2017-10-311-16/+13
| | | | | | | | | | | | | | | | | The LLVM sqrt intrinsic definition changed with: D28797 ...so we don't have to use any relaxed FP settings other than errno handling. This patch sidesteps a question raised in PR27435: https://bugs.llvm.org/show_bug.cgi?id=27435 Is a programmer using __builtin_sqrt() invoking the compiler's intrinsic definition of sqrt or the mathlib definition of sqrt? But we have an answer now: the builtin should match the behavior of the libm function including errno handling. Differential Revision: https://reviews.llvm.org/D39204 llvm-svn: 317031
* [OpenCL] Emit enqueued block as kernelYaxun Liu2017-10-141-34/+54
| | | | | | | | | | | | | | | | | In OpenCL the kernel function and non-kernel function has different calling conventions. For certain targets they have different argument ABIs. Also kernels have special function attributes and metadata for runtime to launch them. The blocks passed to enqueue_kernel is supposed to be executed as kernels. As such, the block invoke function should be emitted as kernel with proper calling convention and argument ABI. This patch emits enqueued block as kernel. If a block is both called directly and passed to enqueue_kernel, separate functions will be generated. Differential Revision: https://reviews.llvm.org/D38134 llvm-svn: 315804
* [CUDA] Added __hmma_m16n16k16_* builtins to support mma instructions on sm_70Artem Belevich2017-10-121-0/+198
| | | | | | Differential Revision: https://reviews.llvm.org/D38742 llvm-svn: 315624
* [X86] Add support for 'amdfam17h' to __builtin_cpu_is to match gcc.Craig Topper2017-10-111-0/+2
| | | | | | The compiler-rt implementation already supported it, it just wasn't exposed. llvm-svn: 315517
* AMDGPU: Add read_exec_lo/hi builtinsMatt Arsenault2017-10-091-0/+9
| | | | llvm-svn: 315238
* Split X86::BI__builtin_cpu_init handling into own function[NFC]Erich Keane2017-10-061-7/+9
| | | | | | | | The Cpu Init functionality is required for the target attribute, so this patch simply splits it out into its own function, exactly like CpuIs and CpuSupports. llvm-svn: 315075
* Fix check strings in test case and use llvm::to_string instead ofAkira Hatanaka2017-10-061-3/+5
| | | | | | | | | std::to_string. These changes were needed to fix bots that started failing after r315045. llvm-svn: 315046
* [CodeGen] Emit a helper function for __builtin_os_log_format to reduceAkira Hatanaka2017-10-061-63/+175
| | | | | | | | | | | | | | | | | | | | | | | | | | | | code size. Currently clang expands a call to __builtin_os_log_format into a long sequence of instructions at the call site, causing code size to increase in some cases. This commit attempts to reduce code size by emitting a helper function that can be shared by calls to __builtin_os_log_format with similar formats and arguments. The helper function has linkonce_odr linkage to enable the linker to merge identical functions across translation units. Attribute 'noinline' is attached to the helper function at -Oz so that the inliner doesn't inline functions that can potentially be merged. This commit also fixes a bug where the generated IR writes past the end of the buffer when "%m" is the last specifier appearing in the format string passed to __builtin_os_log_format. Original patch by Duncan Exon Smith. rdar://problem/34065973 rdar://problem/34196543 Differential Revision: https://reviews.llvm.org/D38606 llvm-svn: 315045
* [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.Artem Belevich2017-09-261-0/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D38191 llvm-svn: 314223
* Revert "[NVPTX] added match.{any,all}.sync instructions, intrinsics & ↵Justin Lebar2017-09-251-15/+0
| | | | | | | | | | | | | | | builtins.", rL314135. Causing assertion failures on macos: > Assertion failed: (Num < NumOperands && "Invalid child # of SDNode!"), > function getOperand, file > /Users/buildslave/jenkins/workspace/clang-stage1-cmake-RA-incremental/llvm/include/llvm/CodeGen/SelectionDAGNodes.h, > line 835. http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/42739/testReport/LLVM/CodeGen_NVPTX/surf_read_cuda_ll/ llvm-svn: 314142
* [NVPTX] added match.{any,all}.sync instructions, intrinsics & builtins.Artem Belevich2017-09-251-0/+15
| | | | | | Differential Revision: https://reviews.llvm.org/D38191 llvm-svn: 314135
* [WebAssembly] Restore __builtin_wasm_rethrow builtinHeejin Ahn2017-09-161-0/+4
| | | | | | | | | | | | | | | | Summary: Restore the `__builtin_wasm_rethrow` builtin deleted in D37931. On second thought, it appears it can be used to implement `__cxa_rethrow`. Reviewers: dschuff, sunfish Reviewed By: dschuff Subscribers: jfb, sbc100, jgravelle-google Differential Revision: https://reviews.llvm.org/D37942 llvm-svn: 313430
* [X86] Use native shuffle vector for the perm2f128 intrinsicsCraig Topper2017-09-151-0/+39
| | | | | | | | | | This patch replaces the perm2f128 intrinsics with native shuffle vectors. This uses a pretty simple approach to allocate source 0 to the lower half input and source 1 to the upper half input. Then its just a matter of filling in the indices to use either the lower or upper half of that specific source. This can result in the same source being used by both operands. InstCombine or SelectionDAGBuilder should be able to clean that up. Differential Revision: https://reviews.llvm.org/D37892 llvm-svn: 313418
* Remove __builtin_wasm_rethrow builtinHeejin Ahn2017-09-151-4/+0
| | | | | | | | | | | | | | | | | Summary: Remove `__builtin_wasm_rethrow` builtin. I thought it was required to implement `__cxa_rethrow` function in libcxxabi, but it turned out it will be using `__builtin_wasm_throw` instead. Reviewers: dschuff, jgravelle-google Reviewed By: jgravelle-google Subscribers: jfb, sbc100, jgravelle-google Differential Revision: https://reviews.llvm.org/D37931 llvm-svn: 313402
* [X86] [PATCH] [intrinsics] Lowering X86 ABS intrinsics to IR. (clang)Uriel Korach2017-09-131-0/+26
| | | | | | | | This patch, together with a matching llvm patch (https://reviews.llvm.org/D37693), implements the lowering of X86 ABS intrinsics to IR. Differential Revision: https://reviews.llvm.org/D37694 llvm-svn: 313133
* [OpenCL] Add half load and store builtinsJan Vesely2017-09-071-0/+18
| | | | | | | | This enables load/stores of half type, without half being a legal type. Differential Revision: https://reviews.llvm.org/D37231 llvm-svn: 312742
* Commit changes missing from r312572Reid Kleckner2017-09-051-1/+1
| | | | llvm-svn: 312573
* [ms] Implement the __annotation intrinsicReid Kleckner2017-09-051-0/+23
| | | | llvm-svn: 312572
* [OpenCL] Do not use vararg in emitted functions for enqueue_kernelYaxun Liu2017-09-031-19/+40
| | | | | | | | | | Not all targets support vararg (e.g. amdgpu). Instead of using vararg in the emitted functions for enqueue_kernel, this patch creates a temporary array of size_t, stores the size arguments in the temporary array and passes it to the emitted functions for enqueue_kernel. Differential Revision: https://reviews.llvm.org/D36678 llvm-svn: 312441
* [CodeGen]Refactor CpuSupports/CPUIs Builtin Code Gen to better work with Erich Keane2017-09-011-114/+129
| | | | | | | | | | | | | | | | | | | | "target" implementation A small set of refactors that'll make it easier for me to implement 'target' support. First, extract the CPUSupports functionality into its own function. THis has the advantage of not wasting time in this builtin to deal with arguments. Second, pulls both CPUSupports and CPUIs implementation into a member-function, so that it can be called from the resolver generation that I'm working on. Third, creates an overload that takes simply the feature/cpu name (rather than extracting it from a callexpr), since that info isn't available later. Note that despite how the 'diff' looks, the EmitX86CPUSupports function simply takes the implementation out of the 'switch'. llvm-svn: 312355
* [X86] Add support for __builtin_cpu_initCraig Topper2017-08-281-3/+9
| | | | | | | | | | This adds builtin_cpu_init which will emit a call to cpu_indicator_init in libgcc or compiler-rt. This is needed to support builtin_cpu_supports/builtin_cpu_is in an ifunc resolver. Differential Revision: https://reviews.llvm.org/D36336 llvm-svn: 311874
* Extract IRGen's constant-emitter into its own helper class and clean upJohn McCall2017-08-151-5/+6
| | | | | | | | | | | | the interface. The ultimate goal here is to make it easier to do some more interesting things in constant emission, like emit constant initializers that have ignorable side-effects, or doing the majority of an initialization in-place and then patching up the last few things with calls. But for now this is mostly just a refactoring. llvm-svn: 310964
* [X86] Implement __builtin_cpu_isCraig Topper2017-08-101-0/+117
| | | | | | | | This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc. Differential Revision: https://reviews.llvm.org/D35449 llvm-svn: 310657
* [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.Craig Topper2017-08-081-2/+4
| | | | | | They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO. llvm-svn: 310386
* [OpenCL] Add missing subgroup builtinsJoey Gouly2017-08-011-0/+19
| | | | | | | This adds get_kernel_max_sub_group_size_for_ndrange and get_kernel_sub_group_count_for_ndrange. llvm-svn: 309678
* Fix incorrect assertion condition.Victor Leschuk2017-07-291-2/+2
| | | | llvm-svn: 309484
* [ubsan] Diagnose invalid uses of builtins (clang)Vedant Kumar2017-07-291-2/+22
| | | | | | | | | | | | | | | On some targets, passing zero to the clz() or ctz() builtins has undefined behavior. I ran into this issue while debugging UB in __hash_table from libcxx: the bug I was seeing manifested itself differently under -O0 vs -Os, due to a UB call to clz() (see: libcxx/r304617). This patch introduces a check which can detect UB calls to builtins. llvm.org/PR26979 Differential Revision: https://reviews.llvm.org/D34590 llvm-svn: 309459
* [AArch64] Add support for __builtin_ms_va_list on aarch64Martin Storsjo2017-07-171-25/+27
| | | | | | | | | | | Move builtins from the x86 specific scope into the global scope. Their use is still limited to x86_64 and aarch64 though. This allows wine on aarch64 to properly handle variadic functions. Differential Revision: https://reviews.llvm.org/D34475 llvm-svn: 308218
* [SystemZ] Add support for IBM z14 processor (1/3)Ulrich Weigand2017-07-171-3/+99
| | | | | | | | | | | This patch series adds support for the IBM z14 processor. This part includes: - Basic support for the new processor and its features. - Support for low-level builtins mapped to new LLVM intrinsics. Support for the -fzvector extension to vector float and the new high-level vector intrinsics is provided by separate patches. llvm-svn: 308197
* Enhance synchscope representation (clang)Konstantin Zhuravlyov2017-07-111-14/+13
| | | | | | | | Relevant changes required for r307722. Differential Revision: https://reviews.llvm.org/D33109 llvm-svn: 307723
* [X86] Move AVX512VPOPCNTDQ in __builtin_cpu_support's enum to match trunk gcc.Craig Topper2017-07-081-0/+2
| | | | | | | | There are two other features before it that we don't currently support in the the frontend or backend so I left placeholders to keep the encoding correct. I think the compiler-rt implementation of this feature is even further out of date. llvm-svn: 307456
* This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it showsSjoerd Meijer2017-07-061-177/+6
| | | | | | | | problems in testing, see comments in D34161 for some more details. A fix is in progres in D35011, but a revert seems better now as the fix will probably take some more time to land. llvm-svn: 307277
* [WebAssembly] Add throw/rethrow builtins for exception handlingHeejin Ahn2017-06-301-0/+10
| | | | | | | | | | | | | | | | | Summary: Add new builtins for throw/rethrow instructions. This follows exception handling handling proposal in https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md Reviewers: sunfish, dschuff Reviewed By: dschuff Subscribers: jfb, dschuff, sbc100, jgravelle-google Differential Revision: https://reviews.llvm.org/D34783 llvm-svn: 306775
* [AArch64] ADD ARMv.2-A FP16 vector intrinsicsAbderrazek Zaafrani2017-06-201-6/+177
| | | | | | Differential Revision: https://reviews.llvm.org/D34161 llvm-svn: 305820
* Expand vector oparation to as IR constants, PR28129.Dinar Temirbulatov2017-06-161-0/+21
| | | | llvm-svn: 305551
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-06-031-0/+3
| | | | llvm-svn: 304649
* Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics"Vedant Kumar2017-06-021-177/+6
| | | | | | | | | | | | This reverts commit r304493. It breaks all the Darwin bots: http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental_check/37168 Failure: Failing Tests (2): Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c Clang :: CodeGen/arm_neon_intrinsics.c llvm-svn: 304509
* [AArch64] Add ARMv8.2-A FP16 vefctor intrinsicsAbderrazek Zaafrani2017-06-011-6/+177
| | | | llvm-svn: 304493
* [X86] Adding avx512_vpopcntdq feature set and its intrinsicsOren Ben Simhon2017-05-251-31/+39
| | | | | | | | | | AVX512_VPOPCNTDQ is a new feature set that was published by Intel. The patch represents the Clang side of the addition of six intrinsics for two new machine instructions (vpopcntd and vpopcntq). It also includes the addition of the new feature set. Differential Revision: https://reviews.llvm.org/D33170 llvm-svn: 303857
* [PowerPC] Implement vec_xxsldwi builtin.Tony Jiang2017-05-241-0/+41
| | | | | | | | | | The vec_xxsldwi builtin is missing from altivec.h. This has been requested by developers working on libvpx for VP9 support for Google. The patch fixes PR: https://bugs.llvm.org/show_bug.cgi?id=32653 Differential Revision: https://reviews.llvm.org/D33236 llvm-svn: 303766
* [PowerPC] Implement vec_xxpermdi builtin.Tony Jiang2017-05-241-0/+33
| | | | | | | | | | The vec_xxpermdi builtin is missing from altivec.h. This has been requested by developers working on libvpx for VP9 support for Google. The patch fixes PR: https://bugs.llvm.org/show_bug.cgi?id=32653 Differential Revision: https://reviews.llvm.org/D33053 llvm-svn: 303760
* [CodeGen] Propagate LValueBaseInfo instead of AlignmentSourceKrzysztof Parzyszek2017-05-181-2/+1
| | | | | | | | | | | | | The functions creating LValues propagated information about alignment source. Extend the propagated data to also include information about possible unrestricted aliasing. A new class LValueBaseInfo will contain both AlignmentSource and MayAlias info. This patch should not introduce any functional changes. Differential Revision: https://reviews.llvm.org/D33284 llvm-svn: 303358
* Suppress all uses of LLVM_END_WITH_NULL. NFC.Serge Guelton2017-05-091-4/+4
| | | | | | | | | | Use variadic templates instead of relying on <cstdarg> + sentinel. This enforces better type checking and makes code more readable. Differential revision: https://reviews.llvm.org/D32550 llvm-svn: 302572
* [XRay] Add __xray_customeevent(...) as a clang-supported builtinDean Michael Berris2017-05-091-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: We define the `__xray_customeevent` builtin that gets translated to IR calls to the correct intrinsic. The default implementation of this is a no-op function. The codegen side of this follows the following logic: - When `-fxray-instrument` is not provided in the driver, we elide all calls to `__xray_customevent`. - When `-fxray-instrument` is enabled and a function is marked as "never instrumented", we elide all calls to `__xray_customevent` in that function; if either marked as "always instrumented" or subject to threshold-based instrumentation, we emit a call to the `llvm.xray.customevent` intrinsic from LLVM for each `__xray_customevent` occurrence in the function. This change depends on D27503 (to land in LLVM first). Reviewers: echristo, rsmith Subscribers: mehdi_amini, pelikan, lrl, cfe-commits Differential Revision: https://reviews.llvm.org/D30018 llvm-svn: 302492
* ANSIfy more. Still no behavior change.Nico Weber2017-05-051-1/+1
| | | | llvm-svn: 302259
* ANSIfy. No behavior change.Nico Weber2017-05-051-1/+1
| | | | llvm-svn: 302258
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