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* [OpenCL] Add to_{global|local|private} builtin functions.Yaxun Liu2016-05-201-0/+23
| | | | | | | | | | | | | | | | | | OpenCL builtin functions to_{global|local|private} accepts argument of pointer type to arbitrary pointee type, and return a pointer to the same pointee type in different addr space, i.e. global gentype *to_global(gentype *p); It is not desirable to declare it as global void *to_global(void *); in opencl header file since it misses diagnostics. This patch implements these builtin functions as Clang builtin functions. In the builtin def file they are defined to have signature void*(void*). When handling call expressions, their declarations are re-written to have correct parameter type and return type corresponding to the call argument. In codegen call to addr void *to_addr(void*) is generated with addrcasts or bitcasts to facilitate implementation in builtin library. Differential Revision: http://reviews.llvm.org/D19932 llvm-svn: 270261
* Add all the avx512 flavors to __builtin_cpu_supports's list.Benjamin Kramer2016-05-201-0/+21
| | | | | | | | This is matching what trunk gcc is accepting. Also adds a missing ssse3 case. PR27779. The amount of duplication here is annoying, maybe it should be factored into a separate .def file? llvm-svn: 270224
* [CUDA] Implement __ldg using intrinsics.Justin Lebar2016-05-191-0/+45
| | | | | | | | | | | | | | | | | | Summary: Previously it was implemented as inline asm in the CUDA headers. This change allows us to use the [addr+imm] addressing mode when executing ld.global.nc instructions. This translates into a 1.3x speedup on some benchmarks that call this instruction from within an unrolled loop. Reviewers: tra, rsmith Subscribers: jhen, cfe-commits, jholewinski Differential Revision: http://reviews.llvm.org/D19990 llvm-svn: 270150
* [WebAssembly] Rename memory_size intrinsic to current_memoryDerek Schuff2016-05-021-2/+2
| | | | | | This follows the recent change in the wasm spec. llvm-svn: 268256
* [AArch64] Fix D19098 fallout.Marcin Koscielnicki2016-04-191-5/+0
| | | | | | | | | | The intrinsic is now called llvm.thread.pointer, not llvm.aarch64.thread.pointer. Also, the code handling it in CGBuiltin.cpp is dead - it's already covered by GCCBuiltin. Remove it. Differential Revision: http://reviews.llvm.org/D19099 llvm-svn: 266817
* [ARM NEON] Define vfms_f32 on ARM, and all vfms using vfma.Ahmed Bougacha2016-04-191-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r259537 added vfma/vfms to armv7, but the builtin was only lowered on the AArch64 side. Instead of supporting it on ARM, get rid of it. The vfms builtin lowered to: %nb = fsub float -0.0, %b %r = @llvm.fma.f32(%a, %nb, %c) Instead, define the operation in terms of vfma, and swap the multiplicands. It now lowers to: %na = fsub float -0.0, %a %r = @llvm.fma.f32(%na, %b, %c) This matches the instruction more closely, and lets current LLVM generate the "natural" operand ordering: fmls.2s v0, v1, v2 instead of the crooked (but equivalent): fmls.2s v0, v2, v1 Except for theses changes, assembly is identical. LLVM accepts both commutations, and the LLVM tests in: test/CodeGen/AArch64/arm64-fmadd.ll test/CodeGen/AArch64/fp-dp3.ll test/CodeGen/AArch64/neon-fma.ll test/CodeGen/ARM/fusedMAC.ll already check either the new one only, or both. Also verified against the test-suite unittests. llvm-svn: 266807
* make __builtin_isfinite more efficient (PR27145)Sanjay Patel2016-04-071-19/+12
| | | | | | | | | | | | | | isinf (is infinite) and isfinite should be implemented with the same function except we change the comparison operator. See PR27145 for more details: https://llvm.org/bugs/show_bug.cgi?id=27145 Ref: forked off of the discussion in D18513. Differential Revision: http://reviews.llvm.org/D18648 llvm-svn: 265675
* NFC: make AtomicOrdering an enum classJF Bastien2016-04-061-55/+52
| | | | | | | | | | | | Summary: See LLVM change D18775 for details, this change depends on it. Reviewers: jyknight, reames Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D18776 llvm-svn: 265569
* AMDGPU: Add frexp_mant + frexp_exp builtinsMatt Arsenault2016-03-301-0/+8
| | | | llvm-svn: 264960
* Silencing warnings from MSVC 2015 Update 2. Both of these changes silence ↵Aaron Ballman2016-03-301-1/+1
| | | | | | "C4334 '<<': result of 32-bit shift implicitly converted to 64 bits (was 64-bit shift intended?)". NFC. llvm-svn: 264932
* Add missing __builtin_bitreverse8Matt Arsenault2016-03-231-0/+1
| | | | | | Also add documentation for bitreverse builtins llvm-svn: 264203
* [CUDA] Implement atomicInc and atomicDec builtinsJustin Lebar2016-03-221-0/+16
| | | | | | | | | | | | | | | These functions cannot be implemented as atomicrmw or cmpxchg instructions, so they are implemented as a call to the NVVM intrinsics @llvm.nvvm.atomic.load.inc.32.p0i32 and @llvm.nvvm.atomic.load.dec.32.p0i32. Patch by Jason Henline. Reviewers: jlebar Differential Revision: http://reviews.llvm.org/D18322 llvm-svn: 264009
* Preserve ExtParameterInfos into CGFunctionInfo.John McCall2016-03-111-3/+1
| | | | | | | | | As part of this, make the function-arrangement interfaces a little simpler and more semantic. NFC. llvm-svn: 263191
* [PPC] FE support for generating VSX [negated] absolute value instructionsKit Barton2016-03-091-0/+10
| | | | | | | | | | Includes new built-in, conversion of built-in to target-independent intrinsic and update in the header file. Tests are also updated. There is a second part in the backend for which I will post a separate code-review. BACKEND PART SHOULD BE COMMITTED FIRST. Phabricator: http://reviews.llvm.org/D17816 llvm-svn: 263051
* Add __builtin_canonicalizeMatt Arsenault2016-02-271-0/+5
| | | | llvm-svn: 262122
* AMDGPU: Add sin/cos builtinsMatt Arsenault2016-02-131-0/+6
| | | | llvm-svn: 260783
* AMDGPU: Update builtin for intrinsic changeMatt Arsenault2016-02-131-3/+3
| | | | llvm-svn: 260781
* Add builtins for bitreverse intrinsicMatt Arsenault2016-02-031-42/+45
| | | | | | | Follow the naming convention that bswap uses since it's a similar sort of operation. llvm-svn: 259671
* Recommit: R258773 [OpenCL] Pipe builtin functionsXiuli Pan2016-01-261-0/+136
| | | | | | | | | | | | | | | | | Fix arc patch fuzz error. Summary: Support for the pipe built-in functions for OpenCL 2.0. The pipe builtin functions may have infinite kinds of element types, one approach would be to just generate calls that would always use generic types such as void*. This patch is based on bader's opencl support patch on SPIR-V branch. Reviewers: Anastasia, pekka.jaaskelainen Subscribers: keryell, bader, cfe-commits Differential Revision: http://reviews.llvm.org/D15914 llvm-svn: 258782
* Revert "[OpenCL] Pipe builtin functions"David Majnemer2016-01-261-135/+0
| | | | | | | This reverts commit r258773, it broke the build bots: http://bb.pgr.jp/builders/cmake-clang-x86_64-linux/builds/43853 llvm-svn: 258775
* [OpenCL] Pipe builtin functionsXiuli Pan2016-01-261-0/+135
| | | | | | | | | | | | | | | | Summary: Support for the pipe built-in functions for OpenCL 2.0. The pipe builtin functions may have infinite kinds of element types, one approach would be to just generate calls that would always use generic types such as void*. This patch is based on bader's opencl support patch on SPIR-V branch. Reviewers: Anastasia, pekka.jaaskelainen Subscribers: keryell, bader, cfe-commits Differential Revision: http://reviews.llvm.org/D15914 llvm-svn: 258773
* [CUDA] Make printf work.Justin Lebar2016-01-231-0/+3
| | | | | | | | | | | | | | | | | | Summary: The code in CGCUDACall is largely based on a patch written by Eli Bendersky: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20140324/210218.html That patch implemented an LLVM pass lowering printf to vprintf; this one does something similar, but in Clang codegen. Reviewers: echristo Subscribers: cfe-commits, jhen, tra, majnemer Differential Revision: http://reviews.llvm.org/D16372 llvm-svn: 258642
* AMDGPU: Rename builtins to use amdgcn prefixMatt Arsenault2016-01-221-25/+39
| | | | | | | | | Keep the ones still used by libclc around for now. Emit the new amdgcn intrinsic name if not targeting r600, in which case the old AMDGPU name is still used. llvm-svn: 258560
* Reordering fields to reduce padding in Clang. NFCBen Craig2015-12-141-6/+6
| | | | llvm-svn: 255552
* Add the `pass_object_size` attribute to clang.George Burgess IV2015-12-021-20/+72
| | | | | | | | | | | | | `pass_object_size` is our way of enabling `__builtin_object_size` to produce high quality results without requiring inlining to happen everywhere. A link to the design doc for this attribute is available at the Differential review link below. Differential Revision: http://reviews.llvm.org/D13263 llvm-svn: 254554
* Move checkTargetFeatures to CodeGenFunction.cpp to make itEric Christopher2015-11-121-42/+0
| | | | | | more obvious that it's generic. llvm-svn: 252833
* In preparation to use it in more places renameEric Christopher2015-11-121-11/+11
| | | | | | | checkBuiltinTargetFeatures to checkTargetFeatures and sink the error handling into the function. llvm-svn: 252832
* Extract out a function onto CodeGenModule for getting the map ofEric Christopher2015-11-111-26/+3
| | | | | | | features for a particular function, then use it to clean up some code. llvm-svn: 252819
* Fix a FIXME about using std::is_sorted.Eric Christopher2015-11-111-3/+4
| | | | llvm-svn: 252691
* Fix __builtin_signbit for ppcf128 typePetar Jovanovic2015-11-061-3/+13
| | | | | | | | | | | Function__builtin_signbit returns wrong value for type ppcf128 on big endian machines. This patch fixes how value is generated in that case. Patch by Aleksandar Beserminji. Differential Revision: http://reviews.llvm.org/D14149 llvm-svn: 252307
* [WebAssembly] Update wasm builtin functions to match spec changes.Dan Gohman2015-11-051-7/+2
| | | | | | | The page_size operator has been removed from the spec, and the resize_memory operator has been changed to grow_memory. llvm-svn: 252201
* Add support for __builtin_{add,sub,mul}_overflow.John McCall2015-10-291-1/+127
| | | | | | Patch by David Grayson! llvm-svn: 251651
* Put global classes into the appropriate namespace.Benjamin Kramer2015-10-281-1/+3
| | | | | | | Most of the cases belong into an anonymous namespace. No functionality change intended. llvm-svn: 251514
* Reflow comment.Eric Christopher2015-10-281-6/+4
| | | | llvm-svn: 251501
* Handle target builtin options that are all required rather thanEric Christopher2015-10-271-4/+9
| | | | | | | | | | | | | | | | | only one of a group of possibilities. This changes the syntax in the builtin files to represent: , as the and operator | as the or operator The former syntax matches how the backend tablegen files represent multiple subtarget features being required. Updated the builtin and intrinsic headers accordingly for the new syntax. llvm-svn: 251388
* Use early exits to reduce indentation.Eric Christopher2015-10-271-46/+48
| | | | llvm-svn: 251371
* Make a bunch of static arrays const.Craig Topper2015-10-181-3/+3
| | | | llvm-svn: 250647
* Add an error when calling a builtin that requires features that don'tEric Christopher2015-10-151-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | match the feature set of the function that they're being called from. This ensures that we can effectively diagnose some[1] code that would instead ICE in the backend with a failure to select message. Example: __m128d foo(__m128d a, __m128d b) { return __builtin_ia32_addsubps(b, a); } compiled for normal x86_64 via: clang -target x86_64-linux-gnu -c would fail to compile in the back end because the normal subtarget features for x86_64 only include sse2 and the builtin requires sse3. [1] We're still not erroring on: __m128i bar(__m128i const *p) { return _mm_lddqu_si128(p); } where we should fail and error on an always_inline function being inlined into a function that doesn't support the subtarget features required. llvm-svn: 250473
* [CodeGen] Remove dead code. NFC.Benjamin Kramer2015-10-151-9/+0
| | | | llvm-svn: 250418
* [X86] Add XSAVE intrinsic familyAmjad Aboud2015-10-131-0/+40
| | | | | | | | | | | | Add intrinsics for the XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64) XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64) XSAVEC instructions (XSAVEC/XSAVEC64) XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64) Differential Revision: http://reviews.llvm.org/D13014 llvm-svn: 250158
* [WebAssembly] Add a __builtin_wasm_resize_memory() intrinsic.Dan Gohman2015-10-021-0/+5
| | | | llvm-svn: 249179
* [WebAssembly] Add a __builtin_wasm_memory_size() intrinsic.Dan Gohman2015-10-021-0/+5
| | | | llvm-svn: 249176
* [CUDA] fix codegen for __nvvm_atom_cas_*Jingyue Wu2015-09-301-1/+3
| | | | | | | | | | | | Summary: __nvvm_atom_cas_* returns the old value instead of whether the swap succeeds. Reviewers: eliben, tra Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D13306 llvm-svn: 248951
* [ARM][NEON] Use address space in vld([1234]|[234]lane) and ↵Jeroen Ketema2015-09-301-10/+20
| | | | | | | | | | | | | | | | | | | | | | | vst([1234]|[234]lane) instructions This is the clang commit associated with llvm r248887. This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234], vst[234]lane ARM neon intrinsics and associates an address space with the pointer that these intrinsics take. This changes, e.g., <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32) to <2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32) This change ensures that address spaces are fully taken into account in the ARM target during lowering of interleaved loads and stores. Differential Revision: http://reviews.llvm.org/D13127 llvm-svn: 248888
* [CUDA] Allow parsing of host and device code simultaneously.Artem Belevich2015-09-221-11/+25
| | | | | | | | | | | | * adds -aux-triple option to specify target triple * propagates aux target info to AST context and Preprocessor * pulls in target specific preprocessor macros. * pulls in target-specific builtins from aux target. * sets appropriate host or device attribute on builtins. Differential Revision: http://reviews.llvm.org/D12917 llvm-svn: 248299
* Support __builtin_ms_va_list.Charles Davis2015-09-171-13/+41
| | | | | | | | | | | | | | | | | | Summary: This change adds support for `__builtin_ms_va_list`, a GCC extension for variadic `ms_abi` functions. The existing `__builtin_va_list` support is inadequate for this because `va_list` is defined differently in the Win64 ABI vs. the System V/AMD64 ABI. Depends on D1622. Reviewers: rsmith, rnk, rjmccall CC: cfe-commits Differential Revision: http://reviews.llvm.org/D1623 llvm-svn: 247941
* Fix vld1_lane intrinsic generationSteven Wu2015-09-091-2/+1
| | | | | | | Fix a bug introduced in r246985 which causes assertion when generating vld1_lane. llvm-svn: 247117
* Introduce __builtin_nontemporal_store and __builtin_nontemporal_load.Michael Zolotukhin2015-09-081-0/+26
| | | | | | | | | | | | | Summary: Currently clang provides no general way to generate nontemporal loads/stores. There are some architecture specific builtins for doing so (e.g. in x86), but there is no way to generate non-temporal store on, e.g. AArch64. This patch adds generic builtins which are expanded to a simple store with '!nontemporal' attribute in IR. Differential Revision: http://reviews.llvm.org/D12313 llvm-svn: 247104
* Compute and preserve alignment more faithfully in IR-generation.John McCall2015-09-081-206/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce an Address type to bundle a pointer value with an alignment. Introduce APIs on CGBuilderTy to work with Address values. Change core APIs on CGF/CGM to traffic in Address where appropriate. Require alignments to be non-zero. Update a ton of code to compute and propagate alignment information. As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment helper function to CGF and made use of it in a number of places in the expression emitter. The end result is that we should now be significantly more correct when performing operations on objects that are locally known to be under-aligned. Since alignment is not reliably tracked in the type system, there are inherent limits to this, but at least we are no longer confused by standard operations like derived-to-base conversions and array-to-pointer decay. I've also fixed a large number of bugs where we were applying the complete-object alignment to a pointer instead of the non-virtual alignment, although most of these were hidden by the very conservative approach we took with member alignment. Also, because IRGen now reliably asserts on zero alignments, we should no longer be subject to an absurd but frustrating recurring bug where an incomplete type would report a zero alignment and then we'd naively do a alignmentAtOffset on it and emit code using an alignment equal to the largest power-of-two factor of the offset. We should also now be emitting much more aggressive alignment attributes in the presence of over-alignment. In particular, field access now uses alignmentAtOffset instead of min. Several times in this patch, I had to change the existing code-generation pattern in order to more effectively use the Address APIs. For the most part, this seems to be a strict improvement, like doing pointer arithmetic with GEPs instead of ptrtoint. That said, I've tried very hard to not change semantics, but it is likely that I've failed in a few places, for which I apologize. ABIArgInfo now always carries the assumed alignment of indirect and indirect byval arguments. In order to cut down on what was already a dauntingly large patch, I changed the code to never set align attributes in the IR on non-byval indirect arguments. That is, we still generate code which assumes that indirect arguments have the given alignment, but we don't express this information to the backend except where it's semantically required (i.e. on byvals). This is likely a minor regression for those targets that did provide this information, but it'll be trivial to add it back in a later patch. I partially punted on applying this work to CGBuiltin. Please do not add more uses of the CreateDefaultAligned{Load,Store} APIs; they will be going away eventually. llvm-svn: 246985
* [WebAssembly] Initial WebAssembly support in clangDan Gohman2015-09-031-0/+17
| | | | | | | | | | This implements basic support for compiling (though not yet assembling or linking) for a WebAssembly target. Note that ABI details are not yet finalized, and may change. Differential Revision: http://reviews.llvm.org/D12002 llvm-svn: 246814
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