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* Add __builtin_amdgpu_classMatt Arsenault2015-01-061-0/+3
| | | | llvm-svn: 225314
* R600: Handle amdgcn tripleTom Stellard2015-01-061-0/+1
| | | | | | For now there is no difference between amdgcn and r600. llvm-svn: 225294
* [x86] Add the (v)cmpps/pd/ss/sd builtins to match gcc. Use them in the sse ↵Craig Topper2014-12-271-2/+150
| | | | | | | | | | intrinsic files. This still lower to the same intrinsics as before. This is preparation for bounds checking the immediate on the avx version of the builtin so we don't pass illegal immediates into the backend. Since SSE uses a smaller size immediate its not possible to bounds check when using a shared builtin. Rather than creating a clang specific builtin for the different immediate, I decided (after consulting with Chandler) that it was better to match gcc. llvm-svn: 224879
* CodeGen: implement __emit intrinsicSaleem Abdulrasool2014-12-171-0/+22
| | | | | | | | | | | | | | | For MSVC compatibility, add the `__emit' builtin. This is used in the Windows SDK headers, and must therefore be implemented as a builtin rather than an intrinsic. The `__emit' builtin provides a mechanism to emit a 16-bit opcode instruction into the stream. The value must be a compile time constant expression. No guarantees are made about the CPU and memory states after the execution of the instruction. Due to the unchecked nature of the builtin, only support this on Windows on ARM. llvm-svn: 224438
* Implement the __builtin_call_with_static_chain GNU extension.Peter Collingbourne2014-12-121-1/+9
| | | | | | | | | | | | | | | | The extension has the following syntax: __builtin_call_with_static_chain(Call, Chain) where Call must be a function call expression and Chain must be of pointer type This extension performs a function call Call with a static chain pointer Chain passed to the callee in a designated register. This is useful for calling foreign language functions whose ABI uses static chain pointers (e.g. to implement closures). Differential Revision: http://reviews.llvm.org/D6332 llvm-svn: 224167
* IR: Update clang for Metadata/Value split in r223802Duncan P. N. Exon Smith2014-12-091-2/+2
| | | | | | Match LLVM API changes from r223802. llvm-svn: 223803
* CodeGen: refactor ARM builtin handlingSaleem Abdulrasool2014-12-041-20/+20
| | | | | | | | Create a helper function to construct a value for the ARM hint intrinsic rather than inling the construction. In order to avoid the use of the sentinel value, inline the use of intrinsic instruction retrieval. NFC. llvm-svn: 223338
* Use nullptr to silence -Wsentinel when self-hosting on WindowsReid Kleckner2014-12-011-2/+2
| | | | | | | | | | | Richard rejected my Sema change to interpret an integer literal zero in a varargs context as a null pointer, so -Wsentinel sees an integer literal zero and fires off a warning. Only CodeGen currently knows that it promotes integer literal zeroes in this context to pointer size on Windows. I didn't want to teach -Wsentinel about that compatibility hack. Therefore, I'm migrating to C++11 nullptr. llvm-svn: 223079
* [PowerPC] Add vec_vsx_ld and vec_vsx_st intrinsicsBill Schmidt2014-11-121-0/+16
| | | | | | | | | | | | | | | | | | This patch enables the vec_vsx_ld and vec_vsx_st intrinsics for PowerPC, which provide programmer access to the lxvd2x, lxvw4x, stxvd2x, and stxvw4x instructions. New code in altivec.h defines these in terms of new builtins, which are themselves defined in BuiltinsPPC.def. The builtins are converted to LLVM intrinsics in CGBuiltin.cpp. Additional code is added to builtins-ppc-vsx.c to verify the correct generation of the intrinsics. Note that I moved the other VSX builtins so all VSX builtins will be alphabetical in their own section in BuiltinsPPC.def. There is a companion patch for LLVM. llvm-svn: 221768
* Bundle conditions checked by UBSan with sanitizer kinds they implement.Alexey Samsonov2014-11-111-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This change makes CodeGenFunction::EmitCheck() take several conditions that needs to be checked (all of them need to be true), together with sanitizer kinds these checks are for. This would allow to split one call into UBSan runtime into several calls in case different sanitizer kinds would have different recoverability settings. Tests should be fixed accordingly, I'm working on it. Test Plan: regression test suite. Reviewers: rsmith Reviewed By: rsmith Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D6219 llvm-svn: 221716
* Propagate SanitizerKind into CodeGenFunction::EmitCheck() call.Alexey Samsonov2014-11-101-2/+2
| | | | | | | | | | | | | | | | Make sure CodeGenFunction::EmitCheck() knows which sanitizer it emits check for. Make CheckRecoverableKind enum an implementation detail and move it away from header. Currently CheckRecoverableKind is determined by the type of sanitizer ("unreachable" and "return" are unrecoverable, "vptr" is always-recoverable, all the rest are recoverable). This will change in future if we allow to specify which sanitizers are recoverable, and which are not by -fsanitize-recover= flag. No functionality change. llvm-svn: 221635
* Introduce a SanitizerKind enum to LangOptions.Alexey Samsonov2014-11-071-1/+1
| | | | | | | | | | | | | Use the bitmask to store the set of enabled sanitizers instead of a bitfield. On the negative side, it makes syntax for querying the set of enabled sanitizers a bit more clunky. On the positive side, we will be able to use SanitizerKind to eventually implement the new semantics for -fsanitize-recover= flag, that would allow us to make some sanitizers recoverable, and some non-recoverable. No functionality change. llvm-svn: 221558
* Lower __builtin_fabs* to @llvm.fabs.*Reid Kleckner2014-11-031-0/+7
| | | | | | | | | mingw64's headers implement fabs by calling __builtin_fabs, so using the library call results in an infinite loop. If the backend legalizes @llvm.fabs as a call to fabs later, things should work out, as the crt provides a definition. llvm-svn: 221206
* Remove dead AST type argument to EmitFAbsReid Kleckner2014-11-031-5/+5
| | | | llvm-svn: 221205
* Get rid of SanitizerOptions::Disabled global. NFC.Alexey Samsonov2014-10-301-1/+1
| | | | | | | | | SanitizerOptions is not even a POD now, so having global variable of this type, is not nice. Instead, provide a regular constructor and clear() method, and let each CodeGenFunction has its own copy of SanitizerOptions it uses. llvm-svn: 220920
* CodeGen: add __readfsdword builtinSaleem Abdulrasool2014-10-291-0/+8
| | | | | | | | | The Windows NT SDK uses __readfsdword and declares it as a compiler provided builtin (#pragma intrinsic(__readfsword). Because intrin.h is not referenced by winnt.h, it is not possible to provide an out-of-line definition for the intrinsic. Provide a proper compiler builtin definition. llvm-svn: 220859
* R600: Update for div_fmas intrinsic changeMatt Arsenault2014-10-211-2/+11
| | | | llvm-svn: 220339
* Add __sync_fetch_and_nand (again)Hal Finkel2014-10-021-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prior to GCC 4.4, __sync_fetch_and_nand was implemented as: { tmp = *ptr; *ptr = ~tmp & value; return tmp; } but this was changed in GCC 4.4 to be: { tmp = *ptr; *ptr = ~(tmp & value); return tmp; } in response to this change, support for sync_fetch_and_nand (and sync_nand_and_fetch) was removed in r99522 in order to avoid miscompiling code depending on the old semantics. However, at this point: 1. Many years have passed, and the amount of code relying on the old semantics is likely smaller. 2. Through the work of many contributors, all LLVM backends have been updated such that "atomicrmw nand" provides the newer GCC 4.4+ semantics (this process was complete July of 2014 (added to the release notes in r212635). 3. The lack of this intrinsic is now a needless impediment to porting codes from GCC to Clang (I've now seen several examples of this). It is true, however, that we still set GNUC_MINOR to 2 (corresponding to GCC 4.2). To compensate for this, and to address the original concern regarding code relying on the old semantics, I've added a warning that specifically details the fact that the semantics have changed and that we provide the newer semantics. Fixes PR8842. llvm-svn: 218905
* CGBuiltin: Use frem instruction rather than libcall to implement fmodJan Vesely2014-09-261-0/+8
| | | | | | | | AFAICT the semantics of frem match libm's fmod. Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <tom@stellard.net> llvm-svn: 218488
* Add __builtin_assume and __builtin_assume_aligned using @llvm.assume.Hal Finkel2014-09-071-3/+21
| | | | | | | | | | | This makes use of the recently-added @llvm.assume intrinsic to implement a __builtin_assume(bool) intrinsic (to provide additional information to the optimizer). This hooks up __assume in MS-compatibility mode to mirror __builtin_assume (the semantics have been intentionally kept compatible), and implements GCC's __builtin_assume_aligned as assume((p - o) & mask == 0). LLVM now contains special logic to deal with assumptions of this form. llvm-svn: 217349
* [ARMv8] Add support for 32-bit MIN/MAXNM and directed rounding.James Molloy2014-09-051-0/+16
| | | | | | | | This patch adds support for the 32bit numeric max/min and directed round-to-integral NEON intrinsics that were added as part of v8, along with unit tests. Patch by Graham Hunter! llvm-svn: 217242
* CGBuiltin: Use @llvm.fabs rather than fabs libcall when emitting builtinsTom Stellard2014-09-031-19/+5
| | | | | | | | | | | Using the intrinsic allows the SelectionDAGBuilder to turn this call into the FABS Node and also the intrinsic is something the vectorizer knows how to vectorize. This patch also sets the readnone attribute on this call, which should enable additional optmizations. llvm-svn: 217042
* Simplify creation of a bunch of ArrayRefs by using None, makeArrayRef or ↵Craig Topper2014-08-271-12/+9
| | | | | | just letting them be implicitly created. llvm-svn: 216528
* ARM: Add dbg builtin intrinsicYi Kong2014-08-261-0/+5
| | | | llvm-svn: 216452
* Implement __builtin_signbitl for PowerPCHal Finkel2014-08-241-2/+8
| | | | | | | | | | | PowerPC uses the special PPC_FP128 type for long double on Linux, which is composed of two 64-bit doubles. The higher-order double (which contains the overall sign) comes first, and so the __builtin_signbitl implementation requires special handling to extract the sign bit. Fixes PR20691. llvm-svn: 216341
* Pass expressions instead of argument ranges to EmitCall/EmitCXXConstructorCall.Alexey Samsonov2014-08-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Summary: This is a first small step towards passing generic "Expr" instead of ArgBeg/ArgEnd pair into EmitCallArgs() family of methods. Having "Expr" will allow us to get the corresponding FunctionDecl and its ParmVarDecls, thus allowing us to alter CodeGen depending on the function/parameter attributes. No functionality change. Test Plan: regression test suite Reviewers: rnk Reviewed By: rnk Subscribers: aemerson, cfe-commits Differential Revision: http://reviews.llvm.org/D4915 llvm-svn: 216214
* R600: Add ldexp intrinsicMatt Arsenault2014-08-151-6/+16
| | | | llvm-svn: 215738
* AArch64: Prefetch intrinsicYi Kong2014-08-131-0/+23
| | | | llvm-svn: 215569
* ARM: Prefetch intrinsicsYi Kong2014-08-131-0/+12
| | | | llvm-svn: 215568
* AArch64: Resolve some FIXMEs in CGBuiltin left over from backend mergeYi Kong2014-07-291-27/+16
| | | | | | | | | | | | Merge vrshr_n_v and vqshlu_n_v with ARM. Remove FIXME comments for others as they can't actually be shared. NFC. Differential Revision: http://reviews.llvm.org/D4697 llvm-svn: 214173
* AArch64: update Clang for merged arm64/aarch64 triples.Tim Northover2014-07-231-2/+0
| | | | | | | | | | | | | | The main subtlety here is that the Darwin tools still need to be given "-arch arm64" rather than "-arch aarch64". Fortunately this already goes via a custom function to handle weird edge-cases in other architectures, and it tested. I removed a few arm64_be tests because that really isn't an interesting thing to worry about. No-one using big-endian is also referring to the target as arm64 (at least as far as toolchains go). Mostly they date from when arm64 was a separate target and we *did* need a parallel name simply to test it at all. Now aarch64_be is sufficient. llvm-svn: 213744
* [UBSan] Add !nosanitize metadata to the code generated by UBSan.Alexey Samsonov2014-07-171-2/+3
| | | | | | | | | | This is used to mark the instructions emitted by Clang to implement variety of UBSan checks. Generally, we don't want to instrument these instructions with another sanitizers (like ASan). Reviewed in http://reviews.llvm.org/D4544 llvm-svn: 213291
* Add basic (noop) CodeGen support for __assumeHal Finkel2014-07-161-0/+3
| | | | | | | | | | | | | | Clang supports __assume, at least at the semantic level, when MS extensions are enabled. Unfortunately, trying to actually compile code using __assume would result in this error: error: cannot compile this builtin function yet __assume is an optimizer hint, and can be ignored at the IR level. Until LLVM supports assumptions at the IR level, a noop lowering is valid, and that is what is done here. llvm-svn: 213206
* Add codegen for more R600 builtinsMatt Arsenault2014-07-151-1/+46
| | | | llvm-svn: 213079
* ARM: Implement __builtin_arm_nop intrinsicYi Kong2014-07-141-0/+6
| | | | | | | | | | | This patch implements __builtin_arm_nop intrinsic for AArch32 and AArch64, which generates hint 0x0, the alias of NOP instruction. This intrinsic is necessary to implement ACLE __nop intrinsic. Differential Revision: http://reviews.llvm.org/D4495 llvm-svn: 212947
* CodeGen: support hint intrinsics from ACLE on AArch64Saleem Abdulrasool2014-07-121-0/+25
| | | | | | | This adds support for the ACLE hint intrinsics on AArch64 similar to ARM. This is required to properly support ACLE on AArch64. llvm-svn: 212890
* MS extension: Make __noop be the integer zero, not voidReid Kleckner2014-07-111-1/+2
| | | | | | | We still don't accept '__noop;', and we don't consider __noop to be the integer literal zero. More work is needed. llvm-svn: 212839
* CodeGen: add support for a few MSVC ARM intrinsicsSaleem Abdulrasool2014-07-051-4/+15
| | | | | | | | This adds support for simple MSVC compatibility mode intrinsics. These intrinsics are simple in that they are either directly passed through to the annotated MSBuiltin intrinsic or they mirror existing GCC builtins. llvm-svn: 212378
* CodeGen: add support for MSBuiltin aliasesSaleem Abdulrasool2014-07-041-1/+7
| | | | | | | | | | | | | | | | | | This completes the infrastructure for the new MSBuiltin aliases in the instruction definitions. These behave similar to the GCCBuiltin in that they can be implicitly constructed without special handling unless needed. With this change it is possible to annotate an LLVM intrinsic in the backend instruction definitions and indicate it as a builtin in the Builtin*.def files in clang via LANGBUILTIN. That will automatically pass through the instruction much as a GCCBuiltin. Note that there is no need for the special handling for ensuring that the compatibility flag is enabled since the filtering on the LANGBUILTIN will automatically prevent the intrinsic from bleeding into non-MS compatible compiler invocations. llvm-svn: 212359
* ARM: rename ARM builtins to use __builtin_arm prefixSaleem Abdulrasool2014-07-031-5/+5
| | | | | | | | | This corrects SVN r212196's naming change to use the proper prefix of `__builtin_arm_` instead of `__builtin_`. Thanks to Yi Kong for pointing out the incorrect naming! llvm-svn: 212253
* CodeGen: make target builtins support languagesSaleem Abdulrasool2014-07-021-0/+5
| | | | | | | | | | This extends the target builtin support to allow language specific annotations (i.e. LANGBUILTIN). This is to allow MSVC compatibility whilst retaining the ability to have EABI targets use a __builtin_ prefix. This is merely to allow uniformity in the EABI case where the unprefixed name is provided as an alias in the header. llvm-svn: 212196
* ARM: add support for v8 ldaex/stlex builtins.Tim Northover2014-07-021-16/+44
| | | | | | | | | | | | | | ARMv8 adds (to both AArch32 and AArch64) acquiring and releasing variants of the exclusive operations, in line with the C++11 memory model. This adds support for two new intrinsics to expose them to C & C++ developers directly: __builtin_arm_ldaex and __builtin_arm_stlex, in direct analogy with the versions with no implicit barrier. rdar://problem/15885451 llvm-svn: 212175
* Remove llvm:: from uses of ArrayRef.Craig Topper2014-06-281-3/+3
| | | | llvm-svn: 211987
* Add R600 builtin codegen.Matt Arsenault2014-06-241-0/+37
| | | | llvm-svn: 211631
* ARM: remove dead CodeGen functions.Tim Northover2014-06-241-30/+0
| | | | | | These two are no longer being used by NEON codegen. llvm-svn: 211586
* Fix spelling. s/overloaed/overloaded/Jim Grosbach2014-06-231-2/+2
| | | | llvm-svn: 211530
* CodeGen: improve ms instrincics supportSaleem Abdulrasool2014-06-181-0/+29
| | | | | | | | | Add support for _InterlockedCompareExchangePointer, _InterlockExchangePointer, _InterlockExchange. These are available as a compiler intrinsic on ARM and x86. These are used directly by the Windows SDK headers without use of the intrin header. llvm-svn: 211216
* AArch64: Support for __builtin_arm_rbit() and __builtin_arm_rbit64().Jim Grosbach2014-06-161-0/+15
| | | | | | | | __builtin_arm_rbit() and __builtin_arm_rbit64(). rdar://9283021 llvm-svn: 211060
* ARM: Support for __builtin_arm_rbit() intrinsic.Jim Grosbach2014-06-161-0/+6
| | | | | | | | Reverse the bits in a word. Maps to the RBIT instruction. rdar://9283021 llvm-svn: 211059
* IR-change: cmpxchg operations now return { iN, i1 }.Tim Northover2014-06-131-6/+6
| | | | | | | | This is a minimal fix for clang. I'll soon add support for generating weak variants when requested, but that's not really necessary for the LLVM change in isolation. llvm-svn: 210907
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