summaryrefslogtreecommitdiffstats
path: root/clang/lib/CodeGen/CGBuiltin.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Add __builtin_operator_new and __builtin_operator_delete, which act like callsRichard Smith2014-06-031-0/+6
| | | | | | | to the normal non-placement ::operator new and ::operator delete, but allow optimizations like new-expressions and delete-expressions do. llvm-svn: 210137
* [CodeGen] Don't use SizeTy for EmitNeonSplat.Michael J. Spencer2014-06-021-1/+1
| | | | llvm-svn: 210042
* [CodeGen] Don't cast and use SizeTy instead of Int32Ty when constructing ↵Michael J. Spencer2014-05-311-16/+16
| | | | | | {extract,insert} vector element instructions. llvm-svn: 209942
* AArch64/ARM64: rename ARM64 components to AArch64Tim Northover2014-05-241-451/+451
| | | | | | This keeps Clang consistent with backend naming conventions. llvm-svn: 209579
* AArch64/ARM64: update Clang after AArch64 removal.Tim Northover2014-05-241-1305/+2
| | | | | | | | | | | A few (mostly CodeGen) parts of Clang were tightly coupled to the AArch64 backend. Now that it's gone, they will not even compile. I've also deduplicated RUN lines in many of the AArch64 tests. This might improve "make check-all" time noticably: some of those NEON tests were monsters. llvm-svn: 209578
* [C++11] Use 'nullptr'. CodeGen edition.Craig Topper2014-05-211-61/+60
| | | | llvm-svn: 209272
* [ARM64]Fix the bug right shift uint64_t by 64 generates incorrect result.Hao Liu2014-05-141-13/+16
| | | | llvm-svn: 208761
* CodeGen: complete ARM ACLE hint 8.4 supportSaleem Abdulrasool2014-05-041-5/+20
| | | | | | | Add support for the remaining hints from the ACLE. Although __dbg is listed as a hint, it is handled different, so it is not covered by this change. llvm-svn: 207930
* CodeGen: rename __builtin_arm_sevl to __sevlSaleem Abdulrasool2014-05-021-5/+5
| | | | | | | ACLE adds the __sevl() extension. Rename the hint from a custom name to the ACLE specified name. llvm-svn: 207829
* [ARM64] Add arm64_be where it was accidentally missed from a bunch of ↵James Molloy2014-04-301-0/+1
| | | | | | | | | if-conditions. I think this is the last commit for ARM64 big endian in clang. This commit makes arm_neon.h compile correctly. llvm-svn: 207624
* [ARM64]Fix a bug cannot select UQSHL/SQSHL with constant i64 shift amount.Hao Liu2014-04-281-10/+6
| | | | llvm-svn: 207401
* CodeGen: remove an unused variableSaleem Abdulrasool2014-04-281-3/+0
| | | | llvm-svn: 207390
* remove useless codeSylvestre Ledru2014-04-271-1/+0
| | | | llvm-svn: 207360
* CodeGen: add __yield intrinsic for ARMSaleem Abdulrasool2014-04-251-0/+5
| | | | | | | | | The __yield intrinsic generates a hint instruction to indicate that the thread is not performing any useful operations at the moment. This is for compatibility with MSVC, although, the intrinsic is also part of the ACLE, and is enabled globally as a result. llvm-svn: 207275
* CodeGen: replace use of @llvm.arm.sevl with @llvm.arm.hintSaleem Abdulrasool2014-04-251-2/+2
| | | | | | | Use the new generic @llvm.arm.hint hint intrinsic rather than the specialised @llvm.arm.sevl hint instruction. llvm-svn: 207243
* ARM64: add a few bits of polynomial intrinsic codegen.Tim Northover2014-04-011-0/+11
| | | | llvm-svn: 205303
* ARM64: add missing ldN/stN intrinsics and enable tests.Tim Northover2014-04-011-3/+6
| | | | llvm-svn: 205296
* ARM64: enable aarch64-neon-intrinsics.c testTim Northover2014-03-311-28/+56
| | | | | | | | | | | | This adds support for the various NEON intrinsics used by aarch64-neon-intrinsics.c (originally written for AArch64) and enables the test. My implementations are designed to be semantically correct, the actual code quality looks like its a wash between the two backends, and is frequently different (hence the large number of CHECK changes). llvm-svn: 205210
* Remove unused variableDmitri Gribenko2014-03-311-1/+0
| | | | llvm-svn: 205169
* ARM64: remove currently trivial switch statementTim Northover2014-03-311-4/+0
| | | | llvm-svn: 205167
* ARM64: Fix GCC warning in CGBuiltin.cppTim Northover2014-03-291-1/+1
| | | | llvm-svn: 205104
* ARM64: initial clang support commit.Tim Northover2014-03-291-25/+2374
| | | | | | | | | | | This adds Clang support for the ARM64 backend. There are definitely still some rough edges, so please bring up any issues you see with this patch. As with the LLVM commit though, we think it'll be more useful for merging with AArch64 from within the tree. llvm-svn: 205100
* Add ARM big endian Target (armeb, thumbeb)Christian Pirker2014-03-281-0/+2
| | | | | | Reviewed at http://llvm-reviews.chandlerc.com/D3096 llvm-svn: 205008
* -fms-extensions: Add __va_start builtin, which is used for x64Reid Kleckner2014-03-261-1/+4
| | | | | | | | | | The main difference between __va_start and __builtin_va_start is that the address of the va_list has already been taken, and the va_list is always a char*. __va_end and __va_arg are not needed. llvm-svn: 204821
* Add support for __builtin___clear_cache in ClangRenato Golin2014-03-261-0/+6
| | | | | | Adding the mapping between __builtin___clear_cache into @llvm.clear_cache llvm-svn: 204820
* Fix a compile-time warningTimur Iskhodzhanov2014-03-241-4/+0
| | | | | | lib/CodeGen/CGBuiltin.cpp:3136:12: warning: variable ‘TblPos’ set but not used [-Wunused-but-set-variable] llvm-svn: 204599
* Cleanup dead assignments reported by scan-buildArnaud A. de Grandmaison2014-03-231-4/+0
| | | | llvm-svn: 204569
* Update for IR: add a second AtomicOrdering to cmpxchg insts.Tim Northover2014-03-111-0/+3
| | | | | | rdar://problem/15996804 llvm-svn: 203560
* Remove 'break' dominated by 'return' in 'EmitBuiltinExpr'.Ted Kremenek2014-03-061-1/+0
| | | | llvm-svn: 203080
* AArch64: use less cluttered intrinsic for vtbl/vtbxTim Northover2014-02-261-6/+2
| | | | | | | The table is always 128-bit so there's no reason to specify it every time we want the intrinsic. llvm-svn: 202259
* AArch64: use different type modifier in arm_neon.tdTim Northover2014-02-251-2/+2
| | | | | | | | | The 'f' modifier is designed for integer type arguments really (according to its documentation). It's better to use the "half width, same number" modifier. Should be no user-visible change. llvm-svn: 202152
* Add AArch64 big endian Target (aarch64_be)Christian Pirker2014-02-251-0/+1
| | | | llvm-svn: 202151
* Reapply 201734 but with appropriate gcc compatibilityWarren Hunt2014-02-211-0/+44
| | | | | | | | | | Because GCC incorrectly defines _mm_prefetch to take anything that casts to void*, people have started using that behavior. The previous patch that made _mm_prefetch actually take a const char * broke compatibility with existing code. This update to the patch leaves the macro that defines _mm_prefetch with the (void*) cast when _MSC_VER is not defined. llvm-svn: 201901
* Remove commas at the end of lists (C++11 again)Tim Northover2014-02-211-2/+2
| | | | llvm-svn: 201849
* ARM & AArch64: use table for EmitCommonNeonBuiltinExprTim Northover2014-02-211-948/+919
| | | | | | | | | | This extends the intrinsic lookup table format slightly, and adds entries for use the shared ARM/AArch64 definitions. The benefit is currently smaller than for the SISD intrinsics (there's more custom code implementing this set), but a few lines are saved and there's scope for future expansion. llvm-svn: 201848
* AArch64: refactor table-driven NEON lookup.Tim Northover2014-02-211-204/+183
| | | | | | | | | | This extracts the table-driven intrinsic lookup phase into a separate function, to be used by EmitCommonNeonBuiltinExpr soon. It also simplifies the logic used in that lookup, since VectorCastArgN and ScalarArgN were actually identical. llvm-svn: 201847
* Revert r201734 and r201742.Daniel Jasper2014-02-201-44/+0
| | | | | | | | | | | | | | | | | | | | | This breaks backwards compatibility with existing code. Previously, this was defined as #define _mm_prefetch(a, sel) (__builtin_prefetch((void *)(a), 0, (sel))) Which basically accepts any pointer. Changing this to char* simply breaks a lot of existing code. I have tried changing char* to "const void*", which seems to be the right thing as per Intel specification this should work on basically any pointer. However, apparently this breaks windows compatibility (because of a conflicting declaration in windows.h). So, we probably need to #ifdef this based on whether clang is compiling for windows. According to Chandler, this might be done by introducing an additional symbol to a fake type in BuiltinsX86.def and then condition the type expansion on the platform. llvm-svn: 201775
* Add _mm_prefetch and some others as MS builtinsWarren Hunt2014-02-191-0/+44
| | | | | | | | | | | | | This patch adds several built-ins that are required for ms compatibility. _mm_prefetch must be a built-in because it takes a compile-time constant argument and our prior approach of using a #define to the current built-in doesn't work in the presence of re-declaration of _mm_prefetch. The others can be obtained by including the windows system headers. If a user includes the windows system headers but not intrin.h they still need to work and therefore must be built-in because we don't get a chance to implement them in intrin.h in this case. llvm-svn: 201734
* AArch64: look up EmitAArch64Scalar support before calling.Tim Northover2014-02-191-655/+434
| | | | | | | | | | | | This fixes one immediate bug where an expression with side-effects could be emitted twice during a NEON call. It also prepares the way for folding CodeGen for many of the SISD intrinsics into a table, reducing code size and hopefully increasing performance eventually ("binary search + few switch cases" should be better than "lots of switch cases"). llvm-svn: 201667
* ARM NEON: add vcvtX (with rounding mode) intrinsics to v8 ARM.Tim Northover2014-02-191-124/+82
| | | | | | | | | | These instructions (well, the f32 ones) are supported on 32-bit ARMv8, not just AArch64. Now that the arm_neon.td refactoring is complete, adding them is surprisingly simple. rdar://problem/16035743 llvm-svn: 201661
* ARM & AArch64 NEON: share the vabs implementation.Tim Northover2014-02-131-11/+6
| | | | | | | | This changes ARM to use @llvm.fabs for floating-point vabs. Patterns already existed in the backend, and it might help mid-end phases since it's more likely to be understood than @llvm.arm.neon.vabs. llvm-svn: 201313
* AArch64: share slgihtly more NEON implementation with ARM.Tim Northover2014-02-111-14/+10
| | | | | | | | The s64/u64 vcvt conversion operations are actually pretty much identical to the s32/u32 ones in implementation, and can be shared with just one extra variable. llvm-svn: 201145
* ARM: move vshll NEON implementation to common codeTim Northover2014-02-101-13/+10
| | | | | | | Now that both ARM backends use the same implementation for vshll operations, the code can be shared. This is also a necessary LLVM/Clang interface update. llvm-svn: 201094
* ARM: implement vshrn NEON intrinsic in terms of shr/truncTim Northover2014-02-101-13/+10
| | | | | | | Now the backend supports the natural LLVM IR, we can shamelessly steal the AArch64 front-end code to implement the vshrn intrinsic on 32-bit ARM. llvm-svn: 201086
* ARM & AArch64: combine implementation of vcaXYZ intrinsicsTim Northover2014-02-041-80/+24
| | | | | | | | Now that the back-end intrinsics are more regular, there's no need for the special handling these got in the front-end, so they can be moved to EmitCommonNeonBuiltinExpr. llvm-svn: 200769
* ARM: implement support for crypto intrinsics in arm_neon.hTim Northover2014-02-031-33/+50
| | | | llvm-svn: 200708
* AArch64: use new non-polymorphic crypto intrinsicsTim Northover2014-02-031-14/+14
| | | | | | | The LLVM backend now has invariant types on the various crypto-intrinsics, because in all cases there's only really one interpretation. llvm-svn: 200707
* ARM & AArch64: unify the rest of the completely shared NEON implementationsTim Northover2014-01-311-22/+16
| | | | | | | | This should be the last routine patch: AArch64 does still delegate to EmitARMBuiltinExpr, but the remaining instances have complications of one sort or another so some more cunning thought will be needed. llvm-svn: 200528
* ARM & AArch64: another block of miscellaneous NEON sharing.Tim Northover2014-01-311-119/+83
| | | | llvm-svn: 200527
* ARM & AArch64: move shared vld/vst intrinsics to common implementation.Tim Northover2014-01-311-175/+145
| | | | llvm-svn: 200526
OpenPOWER on IntegriCloud