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path: root/clang/lib/CodeGen/CGBuiltin.cpp
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* Add the `pass_object_size` attribute to clang.George Burgess IV2015-12-021-20/+72
| | | | | | | | | | | | | `pass_object_size` is our way of enabling `__builtin_object_size` to produce high quality results without requiring inlining to happen everywhere. A link to the design doc for this attribute is available at the Differential review link below. Differential Revision: http://reviews.llvm.org/D13263 llvm-svn: 254554
* Move checkTargetFeatures to CodeGenFunction.cpp to make itEric Christopher2015-11-121-42/+0
| | | | | | more obvious that it's generic. llvm-svn: 252833
* In preparation to use it in more places renameEric Christopher2015-11-121-11/+11
| | | | | | | checkBuiltinTargetFeatures to checkTargetFeatures and sink the error handling into the function. llvm-svn: 252832
* Extract out a function onto CodeGenModule for getting the map ofEric Christopher2015-11-111-26/+3
| | | | | | | features for a particular function, then use it to clean up some code. llvm-svn: 252819
* Fix a FIXME about using std::is_sorted.Eric Christopher2015-11-111-3/+4
| | | | llvm-svn: 252691
* Fix __builtin_signbit for ppcf128 typePetar Jovanovic2015-11-061-3/+13
| | | | | | | | | | | Function__builtin_signbit returns wrong value for type ppcf128 on big endian machines. This patch fixes how value is generated in that case. Patch by Aleksandar Beserminji. Differential Revision: http://reviews.llvm.org/D14149 llvm-svn: 252307
* [WebAssembly] Update wasm builtin functions to match spec changes.Dan Gohman2015-11-051-7/+2
| | | | | | | The page_size operator has been removed from the spec, and the resize_memory operator has been changed to grow_memory. llvm-svn: 252201
* Add support for __builtin_{add,sub,mul}_overflow.John McCall2015-10-291-1/+127
| | | | | | Patch by David Grayson! llvm-svn: 251651
* Put global classes into the appropriate namespace.Benjamin Kramer2015-10-281-1/+3
| | | | | | | Most of the cases belong into an anonymous namespace. No functionality change intended. llvm-svn: 251514
* Reflow comment.Eric Christopher2015-10-281-6/+4
| | | | llvm-svn: 251501
* Handle target builtin options that are all required rather thanEric Christopher2015-10-271-4/+9
| | | | | | | | | | | | | | | | | only one of a group of possibilities. This changes the syntax in the builtin files to represent: , as the and operator | as the or operator The former syntax matches how the backend tablegen files represent multiple subtarget features being required. Updated the builtin and intrinsic headers accordingly for the new syntax. llvm-svn: 251388
* Use early exits to reduce indentation.Eric Christopher2015-10-271-46/+48
| | | | llvm-svn: 251371
* Make a bunch of static arrays const.Craig Topper2015-10-181-3/+3
| | | | llvm-svn: 250647
* Add an error when calling a builtin that requires features that don'tEric Christopher2015-10-151-0/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | match the feature set of the function that they're being called from. This ensures that we can effectively diagnose some[1] code that would instead ICE in the backend with a failure to select message. Example: __m128d foo(__m128d a, __m128d b) { return __builtin_ia32_addsubps(b, a); } compiled for normal x86_64 via: clang -target x86_64-linux-gnu -c would fail to compile in the back end because the normal subtarget features for x86_64 only include sse2 and the builtin requires sse3. [1] We're still not erroring on: __m128i bar(__m128i const *p) { return _mm_lddqu_si128(p); } where we should fail and error on an always_inline function being inlined into a function that doesn't support the subtarget features required. llvm-svn: 250473
* [CodeGen] Remove dead code. NFC.Benjamin Kramer2015-10-151-9/+0
| | | | llvm-svn: 250418
* [X86] Add XSAVE intrinsic familyAmjad Aboud2015-10-131-0/+40
| | | | | | | | | | | | Add intrinsics for the XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64) XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64) XSAVEC instructions (XSAVEC/XSAVEC64) XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64) Differential Revision: http://reviews.llvm.org/D13014 llvm-svn: 250158
* [WebAssembly] Add a __builtin_wasm_resize_memory() intrinsic.Dan Gohman2015-10-021-0/+5
| | | | llvm-svn: 249179
* [WebAssembly] Add a __builtin_wasm_memory_size() intrinsic.Dan Gohman2015-10-021-0/+5
| | | | llvm-svn: 249176
* [CUDA] fix codegen for __nvvm_atom_cas_*Jingyue Wu2015-09-301-1/+3
| | | | | | | | | | | | Summary: __nvvm_atom_cas_* returns the old value instead of whether the swap succeeds. Reviewers: eliben, tra Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D13306 llvm-svn: 248951
* [ARM][NEON] Use address space in vld([1234]|[234]lane) and ↵Jeroen Ketema2015-09-301-10/+20
| | | | | | | | | | | | | | | | | | | | | | | vst([1234]|[234]lane) instructions This is the clang commit associated with llvm r248887. This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234], vst[234]lane ARM neon intrinsics and associates an address space with the pointer that these intrinsics take. This changes, e.g., <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32) to <2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32) This change ensures that address spaces are fully taken into account in the ARM target during lowering of interleaved loads and stores. Differential Revision: http://reviews.llvm.org/D13127 llvm-svn: 248888
* [CUDA] Allow parsing of host and device code simultaneously.Artem Belevich2015-09-221-11/+25
| | | | | | | | | | | | * adds -aux-triple option to specify target triple * propagates aux target info to AST context and Preprocessor * pulls in target specific preprocessor macros. * pulls in target-specific builtins from aux target. * sets appropriate host or device attribute on builtins. Differential Revision: http://reviews.llvm.org/D12917 llvm-svn: 248299
* Support __builtin_ms_va_list.Charles Davis2015-09-171-13/+41
| | | | | | | | | | | | | | | | | | Summary: This change adds support for `__builtin_ms_va_list`, a GCC extension for variadic `ms_abi` functions. The existing `__builtin_va_list` support is inadequate for this because `va_list` is defined differently in the Win64 ABI vs. the System V/AMD64 ABI. Depends on D1622. Reviewers: rsmith, rnk, rjmccall CC: cfe-commits Differential Revision: http://reviews.llvm.org/D1623 llvm-svn: 247941
* Fix vld1_lane intrinsic generationSteven Wu2015-09-091-2/+1
| | | | | | | Fix a bug introduced in r246985 which causes assertion when generating vld1_lane. llvm-svn: 247117
* Introduce __builtin_nontemporal_store and __builtin_nontemporal_load.Michael Zolotukhin2015-09-081-0/+26
| | | | | | | | | | | | | Summary: Currently clang provides no general way to generate nontemporal loads/stores. There are some architecture specific builtins for doing so (e.g. in x86), but there is no way to generate non-temporal store on, e.g. AArch64. This patch adds generic builtins which are expanded to a simple store with '!nontemporal' attribute in IR. Differential Revision: http://reviews.llvm.org/D12313 llvm-svn: 247104
* Compute and preserve alignment more faithfully in IR-generation.John McCall2015-09-081-206/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce an Address type to bundle a pointer value with an alignment. Introduce APIs on CGBuilderTy to work with Address values. Change core APIs on CGF/CGM to traffic in Address where appropriate. Require alignments to be non-zero. Update a ton of code to compute and propagate alignment information. As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment helper function to CGF and made use of it in a number of places in the expression emitter. The end result is that we should now be significantly more correct when performing operations on objects that are locally known to be under-aligned. Since alignment is not reliably tracked in the type system, there are inherent limits to this, but at least we are no longer confused by standard operations like derived-to-base conversions and array-to-pointer decay. I've also fixed a large number of bugs where we were applying the complete-object alignment to a pointer instead of the non-virtual alignment, although most of these were hidden by the very conservative approach we took with member alignment. Also, because IRGen now reliably asserts on zero alignments, we should no longer be subject to an absurd but frustrating recurring bug where an incomplete type would report a zero alignment and then we'd naively do a alignmentAtOffset on it and emit code using an alignment equal to the largest power-of-two factor of the offset. We should also now be emitting much more aggressive alignment attributes in the presence of over-alignment. In particular, field access now uses alignmentAtOffset instead of min. Several times in this patch, I had to change the existing code-generation pattern in order to more effectively use the Address APIs. For the most part, this seems to be a strict improvement, like doing pointer arithmetic with GEPs instead of ptrtoint. That said, I've tried very hard to not change semantics, but it is likely that I've failed in a few places, for which I apologize. ABIArgInfo now always carries the assumed alignment of indirect and indirect byval arguments. In order to cut down on what was already a dauntingly large patch, I changed the code to never set align attributes in the IR on non-byval indirect arguments. That is, we still generate code which assumes that indirect arguments have the given alignment, but we don't express this information to the backend except where it's semantically required (i.e. on byvals). This is likely a minor regression for those targets that did provide this information, but it'll be trivial to add it back in a later patch. I partially punted on applying this work to CGBuiltin. Please do not add more uses of the CreateDefaultAligned{Load,Store} APIs; they will be going away eventually. llvm-svn: 246985
* [WebAssembly] Initial WebAssembly support in clangDan Gohman2015-09-031-0/+17
| | | | | | | | | | This implements basic support for compiling (though not yet assembling or linking) for a WebAssembly target. Note that ABI details are not yet finalized, and may change. Differential Revision: http://reviews.llvm.org/D12002 llvm-svn: 246814
* add __builtin_unpredictable and convert to metadataSanjay Patel2015-09-021-0/+6
| | | | | | | | | | | | | | | | | | | | | | | This patch depends on r246688 (D12341). The goal is to make LLVM generate different code for these functions for a target that has cheap branches (see PR23827 for more details): int foo(); int normal(int x, int y, int z) { if (x != 0 && y != 0) return foo(); return 1; } int crazy(int x, int y) { if (__builtin_unpredictable(x != 0 && y != 0)) return foo(); return 1; } Differential Revision: http://reviews.llvm.org/D12458 llvm-svn: 246699
* [PowerPC] Support __builtin_ppc_get_timebaseHal Finkel2015-08-311-0/+5
| | | | | | | | | | GCC 4.8+ has a PowerPC-specific intrinsic, __builtin_ppc_get_timebase, to do what Clang's __builtin_readcyclecounter does. For compatibility with code that uses GCC's spelling (including glibc), support it as well. Partially fixes PR23681. llvm-svn: 246510
* [CUDA] fix codegen for __nvvm_atom_min/max_gen_u*Jingyue Wu2015-08-311-2/+6
| | | | | | | | | | | | Summary: Clang should emit "atomicrmw umin/umax" instead of "atomicrmw min/max". Reviewers: eliben, tra Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D12487 llvm-svn: 246455
* [X86][SSE] Add _mm_undefined_* intrinsicsSimon Pilgrim2015-08-261-0/+4
| | | | | | | | | | | | | | | | Added missing SSE/AVX 'undefined' intrinsics (PR24040): _mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128 _mm256_undefined_pd, _mm256_undefined_ps + _mm256_undefined_si256 _mm512_undefined, _mm512_undefined_ps, _mm512_undefined_pd + _mm512_undefined_epi32 Added builtin intrinsicss: __builtin_ia32_undef128, __builtin_ia32_undef256 + __builtin_ia32_undef512 Differential Revision: http://reviews.llvm.org/D12052 llvm-svn: 246083
* [ARM NEON] Use CGF cached Types instead of llvm::Type::get. NFC.Ahmed Bougacha2015-08-241-13/+11
| | | | llvm-svn: 245906
* [ARM NEON] Replace redundant code with a new GetFloatNeonType. NFC.Ahmed Bougacha2015-08-241-63/+22
| | | | llvm-svn: 245904
* [ARM NEON] Use the common naming scheme for vcvt f16 builtins. NFC.Ahmed Bougacha2015-08-211-2/+2
| | | | | | | | | | | We had "vcvt_f16" and "VCVT_HIGH_F16": for other FP types, this naming is used for intrinsics with integer overloads. The FP->FP conversions, on the other hand, use the full "vcvt_f32_f64" name instead. Use the same naming convention for the f16<->f32 conversions. While there, reorder the definitions a little bit. llvm-svn: 245763
* Rename the non-coding style conformant functions in namespace BuiltinsEric Christopher2015-08-061-2/+2
| | | | | | to match the rest of their brethren and reformat the bits that need it. llvm-svn: 244186
* [CodeGen] Clean up CGBuiltin a bit.Benjamin Kramer2015-07-281-272/+176
| | | | | | | | | | - Use cached LLVM types - Turn SmallVectors into Arrays/ArrayRef if the size is static - Use ConstantInt::get's implicit splatting for vector types No functionality change intended. llvm-svn: 243425
* [AArch64] Implement __builtin_thread_pointerAdhemerval Zanella2015-07-281-0/+5
| | | | | | | This path add the aarch64 __builtin_thread_pointer support. It will be lowered to llvm.aarch64.thread.pointer. llvm-svn: 243413
* [CodeGen] Don't UBSan-ize the argument to __builtin_frame_addressDavid Majnemer2015-07-251-4/+4
| | | | | | | | | | | | | __builtin_frame_address requires its argument to be a constant expression which already implies that it cannot have undefined behavior. However, we used EmitScalarExpr to emit the argument causing UBSan to try to check for overflow. Instead, use the constant expression emission system. This fixes PR24256. llvm-svn: 243206
* [CodeGen] Flip lanes when lowering __builtin_palignr with one laneBenjamin Kramer2015-07-201-0/+1
| | | | | | | Otherwise we'd pick the wrong lane for the resulting shuffle and miscompile code. PR24187. llvm-svn: 242678
* Add missing builtins to altivec.h for ABI compliance (vol. 4)Nemanja Ivanovic2015-07-141-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D11184 A number of new interfaces for altivec.h (as mandated by the ABI): vector float vec_cpsgn(vector float, vector float) vector double vec_cpsgn(vector double, vector double) vector double vec_or(vector bool long long, vector double) vector double vec_or(vector double, vector bool long long) vector double vec_re(vector double) vector signed char vec_cntlz(vector signed char) vector unsigned char vec_cntlz(vector unsigned char) vector short vec_cntlz(vector short) vector unsigned short vec_cntlz(vector unsigned short) vector int vec_cntlz(vector int) vector unsigned int vec_cntlz(vector unsigned int) vector signed long long vec_cntlz(vector signed long long) vector unsigned long long vec_cntlz(vector unsigned long long) vector signed char vec_nand(vector bool signed char, vector signed char) vector signed char vec_nand(vector signed char, vector bool signed char) vector signed char vec_nand(vector signed char, vector signed char) vector unsigned char vec_nand(vector bool unsigned char, vector unsigned char) vector unsigned char vec_nand(vector unsigned char, vector bool unsigned char) vector unsigned char vec_nand(vector unsigned char, vector unsigned char) vector short vec_nand(vector bool short, vector short) vector short vec_nand(vector short, vector bool short) vector short vec_nand(vector short, vector short) vector unsigned short vec_nand(vector bool unsigned short, vector unsigned short) vector unsigned short vec_nand(vector unsigned short, vector bool unsigned short) vector unsigned short vec_nand(vector unsigned short, vector unsigned short) vector int vec_nand(vector bool int, vector int) vector int vec_nand(vector int, vector bool int) vector int vec_nand(vector int, vector int) vector unsigned int vec_nand(vector bool unsigned int, vector unsigned int) vector unsigned int vec_nand(vector unsigned int, vector bool unsigned int) vector unsigned int vec_nand(vector unsigned int, vector unsigned int) vector signed long long vec_nand(vector bool long long, vector signed long long) vector signed long long vec_nand(vector signed long long, vector bool long long) vector signed long long vec_nand(vector signed long long, vector signed long long) vector unsigned long long vec_nand(vector bool long long, vector unsigned long long) vector unsigned long long vec_nand(vector unsigned long long, vector bool long long) vector unsigned long long vec_nand(vector unsigned long long, vector unsigned long long) vector signed char vec_orc(vector bool signed char, vector signed char) vector signed char vec_orc(vector signed char, vector bool signed char) vector signed char vec_orc(vector signed char, vector signed char) vector unsigned char vec_orc(vector bool unsigned char, vector unsigned char) vector unsigned char vec_orc(vector unsigned char, vector bool unsigned char) vector unsigned char vec_orc(vector unsigned char, vector unsigned char) vector short vec_orc(vector bool short, vector short) vector short vec_orc(vector short, vector bool short) vector short vec_orc(vector short, vector short) vector unsigned short vec_orc(vector bool unsigned short, vector unsigned short) vector unsigned short vec_orc(vector unsigned short, vector bool unsigned short) vector unsigned short vec_orc(vector unsigned short, vector unsigned short) vector int vec_orc(vector bool int, vector int) vector int vec_orc(vector int, vector bool int) vector int vec_orc(vector int, vector int) vector unsigned int vec_orc(vector bool unsigned int, vector unsigned int) vector unsigned int vec_orc(vector unsigned int, vector bool unsigned int) vector unsigned int vec_orc(vector unsigned int, vector unsigned int) vector signed long long vec_orc(vector bool long long, vector signed long long) vector signed long long vec_orc(vector signed long long, vector bool long long) vector signed long long vec_orc(vector signed long long, vector signed long long) vector unsigned long long vec_orc(vector bool long long, vector unsigned long long) vector unsigned long long vec_orc(vector unsigned long long, vector bool long long) vector unsigned long long vec_orc(vector unsigned long long, vector unsigned long long) vector signed char vec_div(vector signed char, vector signed char) vector unsigned char vec_div(vector unsigned char, vector unsigned char) vector signed short vec_div(vector signed short, vector signed short) vector unsigned short vec_div(vector unsigned short, vector unsigned short) vector signed int vec_div(vector signed int, vector signed int) vector unsigned int vec_div(vector unsigned int, vector unsigned int) vector signed long long vec_div(vector signed long long, vector signed long long) vector unsigned long long vec_div(vector unsigned long long, vector unsigned long long) vector unsigned char vec_mul(vector unsigned char, vector unsigned char) vector unsigned int vec_mul(vector unsigned int, vector unsigned int) vector unsigned long long vec_mul(vector unsigned long long, vector unsigned long long) vector unsigned short vec_mul(vector unsigned short, vector unsigned short) vector signed char vec_mul(vector signed char, vector signed char) vector signed int vec_mul(vector signed int, vector signed int) vector signed long long vec_mul(vector signed long long, vector signed long long) vector signed short vec_mul(vector signed short, vector signed short) vector signed long long vec_mergeh(vector signed long long, vector signed long long) vector signed long long vec_mergeh(vector signed long long, vector bool long long) vector signed long long vec_mergeh(vector bool long long, vector signed long long) vector unsigned long long vec_mergeh(vector unsigned long long, vector unsigned long long) vector unsigned long long vec_mergeh(vector unsigned long long, vector bool long long) vector unsigned long long vec_mergeh(vector bool long long, vector unsigned long long) vector double vec_mergeh(vector double, vector double) vector double vec_mergeh(vector double, vector bool long long) vector double vec_mergeh(vector bool long long, vector double) vector signed long long vec_mergel(vector signed long long, vector signed long long) vector signed long long vec_mergel(vector signed long long, vector bool long long) vector signed long long vec_mergel(vector bool long long, vector signed long long) vector unsigned long long vec_mergel(vector unsigned long long, vector unsigned long long) vector unsigned long long vec_mergel(vector unsigned long long, vector bool long long) vector unsigned long long vec_mergel(vector bool long long, vector unsigned long long) vector double vec_mergel(vector double, vector double) vector double vec_mergel(vector double, vector bool long long) vector double vec_mergel(vector bool long long, vector double) vector signed int vec_pack(vector signed long long, vector signed long long) vector unsigned int vec_pack(vector unsigned long long, vector unsigned long long) vector bool int vec_pack(vector bool long long, vector bool long long) llvm-svn: 242171
* Rely on default zero-arg value for IRBuilder::CreateCall calls to zero-arg ↵David Blaikie2015-07-141-7/+7
| | | | | | | | functions Patch by servuswiegehtz at yahoo.de llvm-svn: 242168
* Add missing builtins to altivec.h for ABI compliance (vol. 2)Nemanja Ivanovic2015-07-051-1/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D10875 The bulk of the second round of additions to altivec.h. The following interfaces were added: vector double vec_floor(vector double) vector double vec_madd(vector double, vector double, vector double) vector float vec_msub(vector float, vector float, vector float) vector double vec_msub(vector double, vector double, vector double) vector float vec_mul(vector float, vector float) vector double vec_mul(vector double, vector double) vector float vec_nmadd(vector float, vector float, vector float) vector double vec_nmadd(vector double, vector double, vector double) vector double vec_nmsub(vector double, vector double, vector double) vector double vec_nor(vector double, vector double) vector double vec_or(vector double, vector double) vector float vec_rint(vector float) vector double vec_rint(vector double) vector float vec_nearbyint(vector float) vector double vec_nearbyint(vector double) vector float vec_sqrt(vector float) vector double vec_sqrt(vector double) vector double vec_rsqrte(vector double) vector double vec_sel(vector double, vector double, vector unsigned long long) vector double vec_sel(vector double, vector double, vector unsigned long long) vector double vec_sub(vector double, vector double) vector double vec_trunc(vector double) vector double vec_xor(vector double, vector double) vector double vec_xor(vector double, vector bool long long) vector double vec_xor(vector bool long long, vector double) New VSX paths for the following interfaces: vector float vec_madd(vector float, vector float, vector float) vector float vec_nmsub(vector float, vector float, vector float) vector float vec_rsqrte(vector float) vector float vec_trunc(vector float) vector float vec_floor(vector float) llvm-svn: 241399
* Attach attribute "trap-func-name" to call sites of llvm.trap and llvm.debugtrap.Akira Hatanaka2015-07-021-8/+4
| | | | | | | | | | | This is needed to use clang's command line option "-ftrap-function" for LTO and enable changing the trap function name on a per-call-site basis. rdar://problem/21225723 Differential Revision: http://reviews.llvm.org/D10831 llvm-svn: 241306
* Add support for the x86 builtin __builtin_cpu_supports.Eric Christopher2015-06-291-0/+77
| | | | | | | | | | | | | | | | | | | | This matches the implementation of the gcc support for the same feature, including checking the values set up by libgcc at runtime. The structure looks like this: unsigned int __cpu_vendor; unsigned int __cpu_type; unsigned int __cpu_subtype; unsigned int __cpu_features[1]; with a set of enums to match various fields that are field out after parsing the output of the cpuid instruction. This also adds a set of errors checking for valid input (and cpu). compiler-rt support for this and the other builtins in this family (__builtin_cpu_init and __builtin_cpu_is) are forthcoming. llvm-svn: 240994
* Add missing builtins to altivec.h for ABI compliance (vol. 1)Nemanja Ivanovic2015-06-261-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D10637 This is the first round of additions of missing builtins listed in the ABI document. More to come (this builds onto what seurer already addes). This patch adds: vector signed long long vec_abs(vector signed long long) vector double vec_abs(vector double) vector signed long long vec_add(vector signed long long, vector signed long long) vector unsigned long long vec_add(vector unsigned long long, vector unsigned long long) vector double vec_add(vector double, vector double) vector double vec_and(vector bool long long, vector double) vector double vec_and(vector double, vector bool long long) vector double vec_and(vector double, vector double) vector signed long long vec_and(vector signed long long, vector signed long long) vector double vec_andc(vector bool long long, vector double) vector double vec_andc(vector double, vector bool long long) vector double vec_andc(vector double, vector double) vector signed long long vec_andc(vector signed long long, vector signed long long) vector double vec_ceil(vector double) vector bool long long vec_cmpeq(vector double, vector double) vector bool long long vec_cmpge(vector double, vector double) vector bool long long vec_cmpge(vector signed long long, vector signed long long) vector bool long long vec_cmpge(vector unsigned long long, vector unsigned long long) vector bool long long vec_cmpgt(vector double, vector double) vector bool long long vec_cmple(vector double, vector double) vector bool long long vec_cmple(vector signed long long, vector signed long long) vector bool long long vec_cmple(vector unsigned long long, vector unsigned long long) vector bool long long vec_cmplt(vector double, vector double) vector bool long long vec_cmplt(vector signed long long, vector signed long long) vector bool long long vec_cmplt(vector unsigned long long, vector unsigned long long) llvm-svn: 240821
* [CUDA] Implemented __nvvm_atom_*_gen_* builtins.Artem Belevich2015-06-251-52/+127
| | | | | | | | | | | Integer variants are implemented as atomicrmw or cmpxchg instructions. Atomic add for floating point (__nvvm_atom_add_gen_f()) is implemented as a call to an overloaded @llvm.nvvm.atomic.load.add.f32.* LVVM intrinsic. Differential Revision: http://reviews.llvm.org/D10666 llvm-svn: 240669
* Move the special-case check from r240462 into ARM-specific code.Bob Wilson2015-06-241-19/+53
| | | | | | | | | | | | | | | | | | | This fixes a serious bug in r240462: checking the BuiltinID for ARM::BI_MoveToCoprocessor* in EmitBuiltinExpr() ignores the fact that each target has an overlapping range of the BuiltinID values. That check can trigger for builtins from other targets, leading to very bad behavior. Part of the reason I did not implement r240462 this way to begin with is the special handling of the last argument for Neon builtins. In this change, I have factored out the check to see which builtins have that extra argument into a new HasExtraNeonArgument() function. There is still some awkwardness in having to check for those builtins in two separate places, i.e., once to see if the extra argument is present and once to generate the appropriate IR, but this seems much cleaner than my previous patch. llvm-svn: 240522
* PR22560: Fix argument order for ARM _MoveToCoprocessor builtins.Bob Wilson2015-06-231-0/+8
| | | | | | | | | | | | | | | | The Microsoft-extension _MoveToCoprocessor and _MoveToCoprocessor2 builtins take the register value to be moved as the first argument, but the corresponding mcr and mcr2 LLVM intrinsics expect that value to be the third argument. Handle this as a special case, while still leaving those intrinsics as generic MSBuiltins. I considered the alternative of handling these in EmitARMBuiltinExpr, but that does not work well for the follow-up change that I'm going to make to improve the error handling for PR22560 -- we need the GetBuiltinType() checks for ICEArguments, and the ARM version of that code is only used for Neon intrinsics where the last argument is special and not checked in the normal way. llvm-svn: 240462
* AMDGPU: Fix places missed in renameMatt Arsenault2015-06-191-21/+21
| | | | llvm-svn: 240148
* This patch implements clang support for the ACLE special register intrinsicsLuke Cheeseman2015-06-151-0/+121
| | | | | | | | | | | | | in section 10.1, __arm_{w,r}sr{,p,64}. This includes arm_acle.h definitions with builtins and codegen to support these, the intrinsics are implemented by generating read/write_register calls which get appropriately lowered in the backend based on the register string provided. SemaChecking is also implemented to fault invalid parameters. Differential Revision: http://reviews.llvm.org/D9697 llvm-svn: 239737
* [CodeGen][NEON] Emit constants for "immediate" intrinsic arguments.Ahmed Bougacha2015-06-041-3/+38
| | | | | | | | | | | | | | | | | On ARM/AArch64, we currently always use EmitScalarExpr for the immediate builtin arguments, instead of directly emitting the constant. When the overflow sanitizer is enabled, this generates overflow intrinsics instead of constants, breaking assumptions in various places. Instead, use the knowledge of "immediates" to directly emit a constant: - teach the tablegen backend to emit the "immediate" modifiers - use those modifiers in the NEON CodeGen, on ARM and AArch64. Fixes PR23517. Differential Revision: http://reviews.llvm.org/D10045 llvm-svn: 239002
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