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* [OpenMP] Sema and parsing for 'teams distribute parallel for' pragmaKelvin Li2016-12-091-6/+23
| | | | | | | | This patch is to implement sema and parsing for 'teams distribute parallel for' pragma. Differential Revision: https://reviews.llvm.org/D27345 llvm-svn: 289179
* [WebAssembly] Revert r288447.Dan Gohman2016-12-031-4/+0
| | | | | | | Revert r288447 which introduced -mdirect. It turns out we don't need a custom flag for this, as the information we need is in the target triple. llvm-svn: 288604
* [WebAssembly] Add an -mdirect flag for the direct wasm object feature.Dan Gohman2016-12-021-0/+4
| | | | | | | Add a target flag for enabling the new direct wasm object emission feature. llvm-svn: 288447
* [OpenMP] Sema and parsing for 'teams distribute parallel for simd' pragmaKelvin Li2016-11-301-6/+23
| | | | | | | | This patch is to implement sema and parsing for 'teams distribute parallel for simd' pragma. Differential Revision: https://reviews.llvm.org/D27084 llvm-svn: 288294
* Add a little endian variant of TCE.Pekka Jaaskelainen2016-11-161-2/+33
| | | | llvm-svn: 287112
* Define __ANDROID_API__ when specified as part of an Android target.Stephen Hines2016-11-111-0/+2
| | | | | | | | | | | | | | | | | Summary: This macro should be defined only when the user directly specifies an API level as part of an Android target. For any regular Android target, we leave this macro undefined. Bug: https://llvm.org/bugs/show_bug.cgi?id=30940 Reviewers: eugenis, pirama Subscribers: tberghammer, cfe-commits, pirama, eugenis, danalbert Differential Revision: https://reviews.llvm.org/D26491 llvm-svn: 286543
* [Sparc] LLONG is not lock-free atomic on v8Douglas Katzman2016-11-091-1/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D26286 llvm-svn: 286376
* [VFS] Replace TimeValue usage with std::chronoPavel Labath2016-11-092-14/+15
| | | | | | | | | | | | Summary: NFCI Reviewers: benlangmuir, zturner Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D25948 llvm-svn: 286356
* [AVX-512] Make VBMI instruction set enabling imply that the BWI instruction ↵Craig Topper2016-11-091-0/+6
| | | | | | | | | | | | | | set is also enabled. Summary: This is needed to make the v64i8 and v32i16 types legal for the 512-bit VBMI instructions. Fixes PR30912. Reviewers: delena, zvi Subscribers: RKSimon, cfe-commits Differential Revision: https://reviews.llvm.org/D26306 llvm-svn: 286340
* Revert "Define __ANDROID_API__ for all Android builds."Stephen Hines2016-11-081-2/+0
| | | | | | | | | | Summary: This reverts commit a8804ddd9fe71304b28e5b834d134fe93e568ee0. Subscribers: cfe-commits, pirama, eugenis, tberghammer, danalbert Differential Revision: https://reviews.llvm.org/D26422 llvm-svn: 286298
* Define __ANDROID_API__ for all Android builds.Stephen Hines2016-11-081-0/+2
| | | | | | | | | | | | | | | | | | Summary: Bug: https://llvm.org/bugs/show_bug.cgi?id=30940 This macro (along with __ANDROID__) should always be defined for Android targets. We set it to the major (only) version of the Android API being compiled for. The Android version is able to be set as an integer suffix for any valid Android target. Reviewers: danalbert, eugenis Subscribers: cfe-commits, pirama, eugenis, tberghammer, danalbert Differential Revision: https://reviews.llvm.org/D26385 llvm-svn: 286295
* Add some more asserts to clearly indicate that there are special casesChandler Carruth2016-11-041-2/+4
| | | | | | | | | | | | | | | | | which guarantee pointers are not null. These all seem to have useful properties and correlations to document, in one case we even had it in a comment but now it will also be an assert. This should prevent PVS-Studio from incorrectly claiming that there are a bunch of potential bugs here. But I feel really strongly that the PVS-Studio warnings that pointed at this code have a far too high false-positive rate to be entirely useful. These are just places where there did seem to be a useful invariant to document and verify with an assert. Several other places in the code were already correct and already have perfectly clear code documenting and validating their invariants, but still ran afoul of PVS-Studio. llvm-svn: 285985
* regcall: Implement regcall Calling Conv in clangErich Keane2016-11-021-0/+3
| | | | | | | | | | This patch implements the register call calling convention, which ensures as many values as possible are passed in registers. CodeGen changes were committed in https://reviews.llvm.org/rL284108. Differential Revision: https://reviews.llvm.org/D25204 llvm-svn: 285849
* [OpenCL] Override supported OpenCL extensions with -cl-ext optionAlexey Bader2016-11-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch adds a command line option '-cl-ext' to control a set of supported OpenCL extensions. Option accepts a comma-separated list of extensions prefixed with '+' or '-'. It can be used together with a target triple to override support for some extensions: // spir target supports all extensions, but we want to disable fp64 clang -cc1 -triple spir-unknown-unknown -cl-ext=-cl_khr_fp64 Special 'all' extension allows to enable or disable all possible extensions: // only fp64 will be supported clang -cc1 -triple spir-unknown-unknown -cl-ext=-all,+cl_khr_fp64 Patch by asavonic (Andrew Savonichev). Reviewers: joey, yaxunl Subscribers: yaxunl, bader, Anastasia, cfe-commits Differential Revision: https://reviews.llvm.org/D23712 llvm-svn: 285700
* [x86][inline-asm][clang] accept 'v' constraintMichael Zuckerman2016-11-011-0/+2
| | | | | | | | | | | | | | Commit on behalf of: Coby Tayree 1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64). 2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent) This patch applies the needed changes to clang LLVM patch: https://reviews.llvm.org/D25005 Differential Revision: https://reviews.llvm.org/D25005 llvm-svn: 285688
* [x86][inline-asm][AVX512][clang][PART-1] Introducing "k" and "Yk" ↵Michael Zuckerman2016-10-311-0/+20
| | | | | | | | | | | | | | | | constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions. Commit on behalf of mharoush Extending inline assembly support, compatible with GCC as folowing: "k" constraint hints the compiler to select any of AVX512 k0-k7 registers. "Yk" constraint is a subset of "k" excluding k0 which is not allowd to be used as a mask. Reviewer: 1. rnk Differential Revision: https://reviews.llvm.org/D25063 llvm-svn: 285604
* [SystemZ] Add -march=archX aliasesUlrich Weigand2016-10-311-2/+6
| | | | | | | | | | | | | | | For compatibility with other compilers on the platform, allow specifying levels of the z/Architecture instead of model names with -march. In particular, the following aliases are now supported: -march=arch8 equals -march=z10 -march=arch9 equals -march=z196 -march=arch10 equals -march=zEC12 -march=arch11 equals -march=z13 This parallels the equivalent (and prerequisite) LLVM change in r285577. llvm-svn: 285578
* second attempt at r285565.Michael Zuckerman2016-10-311-0/+1
| | | | llvm-svn: 285573
* revert r285563 fail in test CodeGen/avx512-inline-asm-kregisters-basics.cMichael Zuckerman2016-10-311-1/+0
| | | | llvm-svn: 285565
* [x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usageMichael Zuckerman2016-10-311-0/+1
| | | | | | | | | | | | | | | Commit on behalf of mharoush After LGTM and check all: This patch enables usage of k registers in inline assembly syntax. Adding triple Reviewer: 1. rnk 2. delena Differential Revision: https://reviews.llvm.org/D25011 llvm-svn: 285563
* Revert reviosion 285555Michael Zuckerman2016-10-311-1/+0
| | | | llvm-svn: 285556
* [x86][inline-asm] Introducing (AVX512) k0-k7 registers for inline-asm usageMichael Zuckerman2016-10-311-0/+1
| | | | | | | | | | | | | | Commit on behalf of mharoush After LGTM and check all: This patch enables usage of k registers in inline assembly syntax. Reviewer: 1. rnk 2. delena Differential Revision: https://reviews.llvm.org/D25011 llvm-svn: 285555
* Do not print include_next/pragma once warnings when input is a header.Erik Verbruggen2016-10-271-1/+3
| | | | | | | | | | | r276653 suppressed the pragma once warning when generating a PCH file. This patch extends that to any main file for which clang is told (with the -x option) that it's a header file. It will also suppress the warning "#include_next in primary source file". Differential Revision: http://reviews.llvm.org/D25989 llvm-svn: 285295
* AMDGPU: Add missing ISA versions gfx7.x.x and 8.x.x.Yaxun Liu2016-10-261-0/+9
| | | | | | | | Patch by Laurent Morichetti. Differential Revision: https://reviews.llvm.org/D25920 llvm-svn: 285211
* Re-apply patch r279045.Kelvin Li2016-10-251-5/+18
| | | | llvm-svn: 285066
* [Basic] Support 32-bit x86 and ARM targets for FuchsiaPetr Hosek2016-10-241-4/+12
| | | | | | | | | Fuchsia has experimental support for 32-bit x86 and ARM targets, add them to the list of supported targets. Differential Revision: https://reviews.llvm.org/D25838 llvm-svn: 285038
* [Modules] Add 'no_undeclared_includes' module map attributeBruno Cardoso Lopes2016-10-211-1/+8
| | | | | | | | | | | | | The 'no_undeclared_includes' attribute should be used in a module to tell that only non-modular headers and headers from used modules are accepted. The main motivation behind this is to prevent dep cycles between system libraries (such as darwin) and libc++. Patch by Richard Smith! llvm-svn: 284797
* Retire llvm::alignOf in favor of C++11 alignof.Benjamin Kramer2016-10-201-2/+2
| | | | | | No functionality change intended. llvm-svn: 284730
* [cmake] Use LLVM_CMAKE_PATH for GetSVN scriptMichal Gorny2016-10-191-1/+1
| | | | | | | | Use the LLVM_CMAKE_PATH variable to locate the GetSVN.cmake script. The variable was already available in stand-alone builds, and is also set by LLVM since r284581. llvm-svn: 284582
* Drop a redundant ".get()" call (NFC)Vedant Kumar2016-10-181-1/+1
| | | | | | Pointed out by Malcolm Parsons. llvm-svn: 284510
* [Basic] unique_ptr-ify SourceManager::MacroArgsCacheMap (NFC)Vedant Kumar2016-10-181-9/+6
| | | | | | Differential Revision: https://reviews.llvm.org/D25711 llvm-svn: 284442
* Implement MS _BitScan intrinsicsAlbert Gutowski2016-10-121-0/+2
| | | | | | | | | | | | Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin. Reviewers: hans, thakis, rnk, majnemer Subscribers: RKSimon, cfe-commits, aemerson Differential Revision: https://reviews.llvm.org/D25264 llvm-svn: 284060
* Declare WinX86_64ABIInfo to satisfy SwiftABI infoArnold Schwaighofer2016-10-121-0/+1
| | | | | | | | | This is minimal support that allows swift's test cases on non windows platforms to pass. rdar://28738985 llvm-svn: 284032
* Move x86-64 builtins from SemaChecking.cpp to BuiltinsX86_64.defAlbert Gutowski2016-10-121-0/+2
| | | | | | | | | | | | Summary: Follow-up to https://reviews.llvm.org/D24598 (separating builtins for x84-64 and i386). Reviewers: hans, thakis, rnk Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D25494 llvm-svn: 284026
* Turn FileManager DirectoryEntry::Name from raw pointer to StringRef (NFC)Mehdi Amini2016-10-112-8/+8
| | | | llvm-svn: 283856
* Store FileEntry::Filename as a StringRef instead of raw pointer (NFC)Mehdi Amini2016-10-101-1/+1
| | | | llvm-svn: 283815
* Use StringRef in LangOptions::isNoBuiltinFunc API (NFC)Mehdi Amini2016-10-101-2/+1
| | | | llvm-svn: 283776
* Revert "[x86][inline-asm][clang] accept 'v' constraint"Daniel Jasper2016-10-101-2/+0
| | | | | | | | | This reverts commit r283716. Breaks buildbot: http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/9155/testReport/junit/Clang/CodeGen/x86_inline_asm_v_constraint_c/ llvm-svn: 283743
* [x86][inline-asm][clang] accept 'v' constraintMichael Zuckerman2016-10-101-0/+2
| | | | | | | | | | | | | | Commit in the name of: Coby Tayree 1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64). 2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent) This patch applies the needed changes to clang LLVM patch: https://reviews.llvm.org/D25005 Differential Revision: D25004 llvm-svn: 283716
* [ARM]: Add Cortex-R52 targetJaved Absar2016-10-071-0/+2
| | | | | | | This patch adds Cortex-R52, the new ARM real-time processor. Cortex-R52 implements the ARMv8-R architecture. llvm-svn: 283543
* Use StringReg in TargetParser APIs (NFC)Mehdi Amini2016-10-071-3/+3
| | | | llvm-svn: 283527
* [Driver] Add driver support for FuchsiaPetr Hosek2016-10-061-0/+26
| | | | | | | | | | | Provide toolchain and tool support for Fuchsia operating system. Fuchsia uses compiler-rt as the runtime library and libc++, libc++abi and libunwind as the C++ standard library. lld is used as a default linker. Differential Revision: https://reviews.llvm.org/D25117 llvm-svn: 283420
* Separate builtins for x84-64 and i386; implement __mulh and __umulhAlbert Gutowski2016-10-041-8/+16
| | | | | | | | | | | | Summary: We need x86-64-specific builtins if we want to implement some of the MS intrinsics - winnt.h contains definitions of some functions for i386, but not for x86-64 (for example _InterlockedOr64), which means that we cannot treat them as builtins for both i386 and x86-64, because then we have definitions of builtin functions in winnt.h on i386. Reviewers: thakis, majnemer, hans, rnk Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D24598 llvm-svn: 283264
* [coroutines] Rename driver flag -fcoroutines to -fcoroutines-tsGor Nishanov2016-10-021-1/+1
| | | | | | | | | | | | | | | Summary: Also makes -fcoroutines_ts to be both a Driver and CC1 flag. Patch mostly by EricWF. Reviewers: rnk, cfe-commits, rsmith, EricWF Subscribers: mehdi_amini Differential Revision: https://reviews.llvm.org/D25130 llvm-svn: 283064
* Use StringRef for MemoryBuffer identifier API (NFC)Mehdi Amini2016-10-011-12/+12
| | | | llvm-svn: 283043
* P0035R4: add predefined __STDCPP_DEFAULT_NEW_ALIGNMENT__ macro. By default, weRichard Smith2016-09-302-0/+11
| | | | | | | | | assume that ::operator new provides no more alignment than is necessary for any primitive type, except when we're on a GNU OS, where glibc's malloc guarantees to provide 64-bit alignment on 32-bit systems and 128-bit alignment on 64-bit systems. This can be controlled by the command-line -fnew-alignment flag. llvm-svn: 282974
* [CUDA] added __nvvm_atom_{sys|cta}_* builtins.Artem Belevich2016-09-281-1/+14
| | | | | | | | These builtins are available on sm_60+ GPU only. Differential Revision: https://reviews.llvm.org/D24944 llvm-svn: 282609
* [Power9] Builtins for ELF v.2 ABI conformance - front end portionNemanja Ivanovic2016-09-271-9/+29
| | | | | | | | | | This patch corresponds to review: https://reviews.llvm.org/D24397 It adds the __POWER9_VECTOR__ macro and the -mpower9-vector option along with a number of altivec.h functions (refer to the code review for a list). llvm-svn: 282481
* [OpenBSD] Add type sign information for OpenBSDRenato Golin2016-09-221-1/+5
| | | | | | | | | | | | | | Like NetBSD, OpenBSD prefers having a consistent set of typedefs across the architectures it supports over strictly following the ARM ABIs. The diff below makes sure that clang's view of those types matches OpenBSD's system header files. It also adds a test that checks the relevant types on all OpenBSD platforms that clang works on. Hopefully we can add mips64 and powerpc to that list in the future. Patch by Mark Kettenis <mark.kettenis@xs4all.nl> llvm-svn: 282184
* Add some MS aliases for existing intrinsicsAlbert Gutowski2016-09-141-0/+2
| | | | | | | | | | Reviewers: thakis, compnerd, majnemer, rsmith, rnk Subscribers: alexshap, cfe-commits Differential Revision: https://reviews.llvm.org/D24330 llvm-svn: 281540
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