summaryrefslogtreecommitdiffstats
path: root/clang/lib/Basic
Commit message (Collapse)AuthorAgeFilesLines
...
* [clang] Fill RealPathName for virtual files.Kadir Cetinkaya2018-11-301-10/+14
| | | | | | | | | | | | | | | Summary: Absolute path information for virtual files were missing even if we have already stat'd the files. This patch puts that information for virtual files that can succesffully be stat'd. Reviewers: ilya-biryukov Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D55054 llvm-svn: 348006
* Add Hurd target to Clang driver (2/2)Kristina Brooks2018-11-292-0/+25
| | | | | | | | | | | | | | | This adds Hurd toolchain support to Clang's driver in addition to handling translating the triple from Hurd-compatible form to the actual triple registered in LLVM. (Phabricator was stripping the empty files from the patch so I manually created them) Patch by sthibaul (Samuel Thibault) Differential Revision: https://reviews.llvm.org/D54379 llvm-svn: 347833
* [clang][ARC] Add ARCTargetInfoTatyana Krasnukha2018-11-274-0/+104
| | | | | | | | Based-on-patch-by: Pete Couperus <petecoup@synopsys.com> Differential Revision: https://reviews.llvm.org/D53100 llvm-svn: 347699
* [X86] Add -march=cascadelake support in clang.Craig Topper2018-11-271-2/+10
| | | | | | | | | | This is skylake-avx512 with the addition of avx512vnni ISA. Patch by Jianping Chen Differential Revision: https://reviews.llvm.org/D54792 llvm-svn: 347682
* [AArch64] Add aarch64_vector_pcs function attribute to ClangSander de Smalen2018-11-261-0/+1
| | | | | | | | | | | | | | | | | | | | This is the Clang patch to complement the following LLVM patches: https://reviews.llvm.org/D51477 https://reviews.llvm.org/D51479 More information describing the vector ABI and procedure call standard can be found here: https://developer.arm.com/products/software-development-tools/\ hpc/arm-compiler-for-hpc/vector-function-abi Patch by Kerry McLaughlin. Reviewed By: rjmccall Differential Revision: https://reviews.llvm.org/D54425 llvm-svn: 347571
* [FileManager] getFile(open=true) after getFile(open=false) should open the file.Sam McCall2018-11-191-19/+32
| | | | | | | | | | | | | | | | | | | Summary: Old behavior is to just return the cached entry regardless of opened-ness. That feels buggy (though I guess nobody ever actually needed this). This came up in the context of clangd+clang-tidy integration: we're going to getFile(open=false) to replay preprocessor actions obscured by the preamble, but the compilation may subsequently getFile(open=true) for non-preamble includes. Reviewers: ilya-biryukov Subscribers: ioeric, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D54691 llvm-svn: 347205
* Introduce the _Clang scoped attribute token.Aaron Ballman2018-11-091-10/+12
| | | | | | Currently, we only accept clang as the scoped attribute identifier for double square bracket attributes provided by Clang, but this has the potential to conflict with user-defined macros. To help alleviate these concerns, this introduces the _Clang scoped attribute identifier as an alias for clang. It also introduces a warning with a fixit on the off chance someone attempts to use __clang__ as the scoped attribute (which is a predefined compiler identification macro). llvm-svn: 346521
* Add support for 'atomic_default_mem_order' clause on 'requires' directive. ↵Patrick Lyster2018-11-021-0/+16
| | | | | | Also renamed test files relating to 'requires'. Differntial review: https://reviews.llvm.org/D53513 llvm-svn: 345967
* Fix clang -Wimplicit-fallthrough warnings across llvm, NFCReid Kleckner2018-11-013-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch should not introduce any behavior changes. It consists of mostly one of two changes: 1. Replacing fall through comments with the LLVM_FALLTHROUGH macro 2. Inserting 'break' before falling through into a case block consisting of only 'break'. We were already using this warning with GCC, but its warning behaves slightly differently. In this patch, the following differences are relevant: 1. GCC recognizes comments that say "fall through" as annotations, clang doesn't 2. GCC doesn't warn on "case N: foo(); default: break;", clang does 3. GCC doesn't warn when the case contains a switch, but falls through the outer case. I will enable the warning separately in a follow-up patch so that it can be cleanly reverted if necessary. Reviewers: alexfh, rsmith, lattner, rtrieu, EricWF, bollu Differential Revision: https://reviews.llvm.org/D53950 llvm-svn: 345882
* Add LLVM_FALLTHROUGH annotation after switchReid Kleckner2018-11-011-0/+1
| | | | | | | | | | | This silences a -Wimplicit-fallthrough warning from clang. GCC does not appear to warn when the case body ends in a switch. This is a somewhat surprising but intended fallthrough that I pulled out from my mechanical patch. The code intends to handle 'Yi' and related constraints as the 'x' constraint. llvm-svn: 345873
* [Clang][PowerPC] Support constraint 'wi' in asmLi Jia He2018-11-011-0/+1
| | | | | | | | | | From the gcc manual, we can see that the specific limit of wi inline asm is “FP or VSX register to hold 64-bit integers for VSX insns or NO_REGS”. The link is https://gcc.gnu.org/onlinedocs/gcc-8.2.0/gcc/Machine-Constraints.html#Machine-Constraints. We should accept this constraint. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D53265 llvm-svn: 345809
* NFC: Merge KEYOBJC and KEYARCErik Pilkington2018-10-301-25/+23
| | | | | | | We used to only define ARC keywords in -fobjc-arc mode, but now that we define them in ObjC mode, there isn't any reason to keep them seperate. llvm-svn: 345646
* NFC: Remove the ObjC1/ObjC2 distinction from clang (and related projects)Erik Pilkington2018-10-304-11/+8
| | | | | | | | | | We haven't supported compiling ObjC1 for a long time (and never will again), so there isn't any reason to keep these separate. This patch replaces LangOpts::ObjC1 and LangOpts::ObjC2 with LangOpts::ObjC. Differential revision: https://reviews.llvm.org/D53547 llvm-svn: 345637
* [AArch64] Implement FP16FML intrinsicsBryan Chan2018-10-252-0/+7
| | | | | | | | | | | | | Generate the FP16FML intrinsics into arm_neon.h (AArch64 only for now). Add two new type modifiers to NeonEmitter to handle the new prototypes. Define __ARM_FEATURE_FP16FML when +fp16fml is enabled and guard the intrinsics with the macro in arm_neon.h. Based on a patch by Gao Yiling. Differential Revision: https://reviews.llvm.org/D53633 llvm-svn: 345344
* Implement Function Multiversioning for Non-ELF Systems.Erich Keane2018-10-251-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Similar to how ICC handles CPU-Dispatch on Windows, this patch uses the resolver function directly to forward the call to the proper function. This is not nearly as efficient as IFuncs of course, but is still quite useful for large functions specifically developed for certain processors. This is unfortunately still limited to x86, since it depends on __builtin_cpu_supports and __builtin_cpu_is, which are x86 builtins. The naming for the resolver/forwarding function for cpu-dispatch was taken from ICC's implementation, which uses the unmodified name for this (no mangling additions). This is possible, since cpu-dispatch uses '.A' for the 'default' version. In 'target' multiversioning, this function keeps the '.resolver' extension in order to keep the default function keeping the default mangling. Change-Id: I4731555a39be26c7ad59a2d8fda6fa1a50f73284 Differential Revision: https://reviews.llvm.org/D53586 llvm-svn: 345298
* Add gfx909 to GPU ArchTim Renouf2018-10-242-0/+6
| | | | | | | | Subscribers: jholewinski, cfe-commits Differential Revision: https://reviews.llvm.org/D53558 llvm-svn: 345198
* AMDGPU: Handle gfx909 in AMDGPUTargetInfo::initFeatureMapKonstantin Zhuravlyov2018-10-241-0/+1
| | | | | | + add required tests llvm-svn: 345181
* Support accepting __gnu__ as a scoped attribute namespace that aliases to gnu.Aaron Ballman2018-10-241-6/+11
| | | | | | This is useful in libstdc++ to avoid clashes with identifiers in the user's namespace. llvm-svn: 345132
* Add gfx904 and gfx906 to GPU ArchYaxun Liu2018-10-232-0/+12
| | | | | | Differential Revision: https://reviews.llvm.org/D53472 llvm-svn: 344996
* [X86] Remove 'rtm' feature from KNL.Craig Topper2018-10-231-1/+0
| | | | | | | | I'm unsure if KNL has this feature, but the backend never thought it did, only clang did. The predefined-arch-macros test lost the check for __RTM__ on KNL when it was removed Skylake CPUs in r344117. I think we want to drop it from KNL for consistency with Skylake anyway regardless of how we got here. llvm-svn: 344978
* [Hexagon] Remove support for V4Krzysztof Parzyszek2018-10-191-11/+4
| | | | llvm-svn: 344786
* [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples.Eli Friedman2018-10-171-3/+2
| | | | | | | | "aarch64-none-elf" is commonly used for AArch64 baremetal toolchains. Differential Revision: https://reviews.llvm.org/D53348 llvm-svn: 344710
* [SystemZ] Actually enable -mzvector keywordsUlrich Weigand2018-10-161-0/+1
| | | | | | | | | | | | | | It appears when initially committing the support for the IBM Z vector extension language, one critical line was lost, causing the specific keywords __vector, __bool, and vec_step to not actually be enabled. (Note that this does not affect "vector" and "bool"!) Unfortunately, this was not caught by any tests either. (All existing Z vector tests just use the regular "vector" and "bool" keywords ...) Fixed by adding the missing line and updating the tests. llvm-svn: 344611
* [mips] Fix handling of GNUABIN32 environment in a target tripleSimon Atanasyan2018-10-151-1/+6
| | | | | | | | | | | | The `GNUABIN32` environment in a target triple implies using the N32 ABI. This patch adds support for this environment and switches on N32 ABI if necessary. Patch by Patch by YunQiang Su. Differential revision: https://reviews.llvm.org/D51464 llvm-svn: 344570
* Add support for 'dynamic_allocators' clause on 'requires' directive. ↵Patrick Lyster2018-10-111-0/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D53079 llvm-svn: 344249
* Lift VFS from clang to llvm (NFC)Jonas Devlieghere2018-10-105-2158/+17
| | | | | | | | | | | | | | | | | | | This patch moves the virtual file system form clang to llvm so it can be used by more projects. Concretely the patch: - Moves VirtualFileSystem.{h|cpp} from clang/Basic to llvm/Support. - Moves the corresponding unit test from clang to llvm. - Moves the vfs namespace from clang::vfs to llvm::vfs. - Formats the lines affected by this change, mostly this is the result of the added llvm namespace. RFC on the mailing list: http://lists.llvm.org/pipermail/llvm-dev/2018-October/126657.html Differential revision: https://reviews.llvm.org/D52783 llvm-svn: 344140
* [X86] Remove FeatureRTM from Skylake processor listCraig Topper2018-10-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: There are a LOT of Skylakes and later without TSX-NI. Examples: - SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz- - KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz- - KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz- - CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz This feature seems to be present only on high-end desktop and server chips (I can't find any SKX without). This commit leaves it disabled for all processors, but can be re-enabled for specific builds with -mrtm. Matches https://reviews.llvm.org/D53041 Patch by Thiago Macieira Reviewers: erichkeane, craig.topper Reviewed By: craig.topper Subscribers: lebedev.ri, cfe-commits Differential Revision: https://reviews.llvm.org/D53042 llvm-svn: 344117
* Introduce code_model macrosAli Tamur2018-10-081-0/+5
| | | | | | | | | | | | | | | | | | | Summary: gcc defines macros such as __code_model_small_ based on the user passed command line flag -mcmodel. clang accepts a flag with the same name and similar effects, but does not generate any macro that the user can use. This cl narrows the gap between gcc and clang behaviour. However, achieving full compatibility with gcc is not trivial: The set of valid values for mcmodel in gcc and clang are not equal. Also, gcc defines different macros for different architectures. In this cl, we only tackle an easy part of the problem and define the macro only for x64 architecture. When the user does not specify a mcmodel, the macro for small code model is produced, as is the case with gcc. Reviewers: compnerd, MaskRay Reviewed By: MaskRay Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D52920 llvm-svn: 344000
* [OPENMP] Add reverse_offload clause to requires directivePatrick Lyster2018-10-031-0/+2
| | | | llvm-svn: 343711
* Add support for unified_shared_memory clause on requires directivePatrick Lyster2018-10-011-0/+2
| | | | llvm-svn: 343472
* Use the container form llvm::sort(C, ...)Fangrui Song2018-09-301-1/+1
| | | | | | | | | There are a few leftovers of rC343147 that are not (\w+)\.begin but in the form of ([-[:alnum:]>.]+)\.begin or spanning two lines. Change them to use the container form in this commit. The 12 occurrences have been inspected manually for safety. llvm-svn: 343425
* [X86] Add the movbe instruction intrinsics from icc.Craig Topper2018-09-281-0/+3
| | | | | | | | | | These intrinsics exist in icc. They can be found on the Intel Intrinsics Guide website. All the backend support is in place to pattern match a load+bswap or a bswap+store pattern to the MOVBE instructions. So we just need to get the frontend to emit the correct IR. The pointer arguments in icc are declared as void so I had to jump through a packed struct to forcing a specific alignment on the load/store. Same trick we use in the unaligned vector load/store intrinsics Differential Revision: https://reviews.llvm.org/D52586 llvm-svn: 343343
* [ARM] Prevent DSP and SIM32 being set for v6mSam Parker2018-09-281-1/+1
| | | | | | | | | My previous change (rL340911) set the two features for architectures >= 6, which wrongly includes v6m. Now set to >= 6 and not Cortex-M. Differential Revision: https://reviews.llvm.org/D52644 llvm-svn: 343309
* llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song2018-09-261-2/+1
| | | | | | | | | | | | | | Summary: The convenience wrapper in STLExtras is available since rL342102. Reviewers: rsmith, #clang, dblaikie Reviewed By: rsmith, #clang Subscribers: mgrang, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D52576 llvm-svn: 343147
* [ARM/AArch64][v8.5A] Add Armv8.5-A targetOliver Stannard2018-09-261-0/+2
| | | | | | | | | | | This patch allows targetting Armv8.5-A from Clang. Most of the implementation is in TargetParser, so this is mostly just adding tests. Patch by Pablo Barrio! Differential revision: https://reviews.llvm.org/D52491 llvm-svn: 343111
* [OPENMP] Add support for OMP5 requires directive + unified_address clauseKelvin Li2018-09-261-0/+13
| | | | | | | | | Add support for OMP5.0 requires directive and unified_address clause. Patches to follow will include support for additional clauses. Differential Revision: https://reviews.llvm.org/D52359 llvm-svn: 343063
* [CUDA] Added basic support for compiling with CUDA-10.0Artem Belevich2018-09-242-0/+14
| | | | llvm-svn: 342924
* [VFS] Use llvm::StringMap instead of std::map. NFCEric Liu2018-09-241-1/+1
| | | | llvm-svn: 342889
* [AST] Various optimizations + refactoring in DeclarationName(Table)Bruno Ricci2018-09-211-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce the following optimizations in DeclarationName(Table): 1. Store common kinds inline in DeclarationName instead of DeclarationNameExtra. Currently the kind of C++ constructor, destructor, conversion function and overloaded operator names is stored in DeclarationNameExtra. Instead store it inline in DeclarationName. To do this align IdentifierInfo, CXXSpecialName, DeclarationNameExtra and CXXOperatorIdName to 8 bytes so that we can use the lower 3 bits of DeclarationName::Ptr. This is already the case on 64 bits archs anyway. This also allow us to remove DeclarationNameExtra from CXXSpecialName and CXXOperatorIdName, which shave off a pointer from CXXSpecialName. 2. Synchronize the enumerations DeclarationName::NameKind, DeclarationName::StoredNameKind and Selector::IdentifierInfoFlag. This makes DeclarationName::getNameKind much more efficient since we can replace the switch table by a single comparison and an addition. 3. Put the overloaded operator names inline in DeclarationNameTable to remove an indirection. This increase the size of DeclarationNameTable a little bit but this is not important since it is only used in ASTContext, and never copied nor moved from. This also get rid of the last dynamic allocation in DeclarationNameTable. Altogether these optimizations cut the run time of parsing all of Boost by about 0.8%. While we are at it, do the following NFC modifications: 1. Put the internal classes CXXSpecialName, CXXDeductionGuideNameExtra, CXXOperatorIdName, CXXLiteralOperatorIdName and DeclarationNameExtra in a namespace detail since these classes are only meant to be used by DeclarationName and DeclarationNameTable. Make this more explicit by making the members of these classes private and friending DeclarationName(Table). 2. Make DeclarationName::getFETokenInfo a non-template since every users are using it to get a void *. It was supposed to be used with a type to avoid a subsequent static_cast. 3. Change the internal functions DeclarationName::getAs* to castAs* since when we use them we already know the correct kind. This has no external impact since all of these are private. Reviewed By: erichkeane, rjmccall Differential Revision: https://reviews.llvm.org/D52267 llvm-svn: 342729
* Basic: correct `__WINT_TYPE__` on WindowsSaleem Abdulrasool2018-09-191-0/+1
| | | | | | | | | Windows uses `unsigned short` for `wint_t`. Correct the type definition as vended by the compiler. This type is defined in corecrt.h and is unconditionally typedef'ed. cl does not have an equivalent to `__WINT_TYPE__` which is why this was never detected. llvm-svn: 342557
* [Modules] Add platform and environment features to requires clauseBruno Cardoso Lopes2018-09-181-1/+33
| | | | | | | | | | | | | Allows module map writers to add build requirements based on platform/os. This helps when target features and language dialects aren't enough to conditionalize building a module, among other things, it allow module maps for different platforms to live in the same file. rdar://problem/43909745 Differential Revision: https://reviews.llvm.org/D51910 llvm-svn: 342499
* [VFS] vfs::directory_iterator yields path and file type instead of full StatusSam McCall2018-09-141-44/+37
| | | | | | | | | | | | | | | | | | | | | | | Summary: Most callers I can find are using only `getName()`. Type is used by the recursive iterator. Now we don't have to call stat() on every listed file (on most platforms). Exceptions are e.g. Solaris where readdir() doesn't include type information. On those platforms we'll still stat() - see D51918. The result is significantly faster (stat() can be slow). My motivation: this may allow us to improve clang IO on large TUs with long include search paths. Caching readdir() results may allow us to skip many stat() and open() operations on nonexistent files. Reviewers: bkramer Subscribers: fedor.sergeev, cfe-commits Differential Revision: https://reviews.llvm.org/D51921 llvm-svn: 342232
* When we leave a module header, make that header visible in itsRichard Smith2018-09-121-6/+5
| | | | | | includer's context, even if its overall module is unavailable. llvm-svn: 342096
* Move AESNI generation to Skylake and GoldmontErich Keane2018-09-101-2/+2
| | | | | | | | | | | | | | | | | | | The instruction set first appeared with Westmere, but not all processors in that and the next few generations have the instructions. According to Wikipedia[1], the first generation in which all SKUs have AES instructions are Skylake and Goldmont. I can't find any Skylake, Kabylake, Kabylake-R or Cannon Lake currently listed at https://ark.intel.com that says "Intel® AES New Instructions" "No". This matches GCC commit https://gcc.gnu.org/ml/gcc-patches/2018-08/msg01940.html [1] https://en.wikipedia.org/wiki/AES_instruction_set Patch By: thiagomacieira Differential Revision: https://reviews.llvm.org/D51510 llvm-svn: 341862
* [VFS] Cache the current working directory for the real FS.Eric Liu2018-09-051-2/+16
| | | | | | | | | | Reviewers: sammccall Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D51641 llvm-svn: 341455
* Adding HardLink Support to VirtualFileSystem.Ilya Biryukov2018-09-041-49/+119
| | | | | | | | | | | | | | | | | | | | | | | Summary: Added support of creating a hardlink from one file to another file. After a hardlink is added between two files, both file will have the same: 1. UniqueID (inode) 2. Size 3. Buffer This will bring replay of compilation closer to the actual compilation. There are instances where clang checks for the UniqueID of the file/header to be loaded which leads to a different behavior during replay as all files have different UniqueIDs. Patch by Utkarsh Saxena! Reviewers: ilya-biryukov Reviewed By: ilya-biryukov Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D51359 llvm-svn: 341366
* Add dump() method for SourceRangeStephen Kelly2018-08-301-0/+54
| | | | | | | | Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D50662 llvm-svn: 341140
* [ARM] Set __ARM_FEATURE_SIMD32 for +dsp coresSam Parker2018-08-291-1/+1
| | | | | | | | | | | | | | ARM_FEATURE_DSP is already set for targets with the +dsp feature. In the backend, this target feature is also used to represent the availability of the of the instructions that the ACLE guard through the __ARM_FEATURE_SIMD32 macro. We don't have any cores that implement one and not the other, so set this macro for cores later than V6 or for Cortex-M cores that the target parser, or user, reports that the 'dsp' instructions are supported. Differential Revision: https://reviews.llvm.org/D51093 llvm-svn: 340911
* Revert r323281 "Adjust MaxAtomicInlineWidth for i386/i486 targets."Hans Wennborg2018-08-241-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | As reported on http://lists.llvm.org/pipermail/cfe-dev/2018-August/058760.html, this broke i386-freebsd11 due to its lack of atomic 64 bit primitives. While that's not really this commit's fault, let's revert back to the old behaviour until this can be fixed. This means generating cmpxchg8b etc for i386 and i486 which don't technically support those, but that's been the behaviour for a long time, so a little longer probably doesn't hurt that much. > Adjust MaxAtomicInlineWidth for i386/i486 targets. > > This is to fix the bug reported in https://bugs.llvm.org/show_bug.cgi?id=34347#c6. > Currently, all MaxAtomicInlineWidth of x86-32 targets are set to 64. However, > i386 doesn't support any cmpxchg related instructions. i486 only supports cmpxchg. > So in this patch MaxAtomicInlineWidth is reset as follows: > For i386, the MaxAtomicInlineWidth should be 0 because no cmpxchg is supported. > For i486, the MaxAtomicInlineWidth should be 32 because it supports cmpxchg. > For others 32 bits x86 cpu, the MaxAtomicInlineWidth should be 64 because of cmpxchg8b. > > Differential Revision: https://reviews.llvm.org/D42154 llvm-svn: 340666
* Fix build bot after r340598.Eric Liu2018-08-241-8/+12
| | | | | | | Revert to the original behavior: only calculate real file path when file is opened and avoid using InterndPath for real path calculation. llvm-svn: 340602
OpenPOWER on IntegriCloud