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* [WebAssembly] Don't use Wasm function sections for more than one functionDan Gohman2017-12-051-5/+0
| | | | | | | | | | Patch by Nicholas Wilson! Fixes PR35467. Differential Revision: https://reviews.llvm.org/D40738 llvm-svn: 319801
* AMDGPU: Don't add fp64 feature to r600 subtargetsMatt Arsenault2017-12-051-1/+1
| | | | | | Should fix test after r319709 llvm-svn: 319735
* [OpenMP] Initial implementation of code generation for pragma 'teams ↵Carlo Bertolli2017-12-041-1/+1
| | | | | | | | | | distribute parallel for simd' on host https://reviews.llvm.org/D40795 This includes regression tests for all associated clauses. llvm-svn: 319696
* Now that C++17 is official (https://www.iso.org/standard/68564.html), start ↵Aaron Ballman2017-12-041-1/+1
| | | | | | changing the C++1z terminology over to C++17. NFC intended, these are all mechanical changes. llvm-svn: 319688
* Toolchain: Normalize dwarf, sjlj and seh ehMartell Malone2017-11-294-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a re-apply of r319294. adds -fseh-exceptions and -fdwarf-exceptions flags clang will check if the user has specified an exception model flag, in the absense of specifying the exception model clang will then check the driver default and append the model flag for that target to cc1 -fno-exceptions has a higher priority then specifying the model move __SEH__ macro definitions out of Targets into InitPreprocessor behind the -fseh-exceptions flag move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check remove unused USESEHExceptions from the MinGW Driver fold USESjLjExceptions into a new GetExceptionModel function that gives the toolchain classes more flexibility with eh models Reviewers: rnk, mstorsjo Differential Revision: https://reviews.llvm.org/D39673 llvm-svn: 319297
* Revert "Toolchain: Normalize dwarf, sjlj and seh eh"Martell Malone2017-11-294-0/+29
| | | | | | | | This reverts rL319294. The windows sanitizer does not like seh on x86. Will re apply with None type for x86 llvm-svn: 319295
* Toolchain: Normalize dwarf, sjlj and seh ehMartell Malone2017-11-294-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | adds -fseh-exceptions and -fdwarf-exceptions flags clang will check if the user has specified an exception model flag, in the absense of specifying the exception model clang will then check the driver default and append the model flag for that target to cc1 clang cc1 assumes dwarf is the default if none is passed and -fno-exceptions has a higher priority then specifying the model move __SEH__ macro definitions out of Targets into InitPreprocessor behind the -fseh-exceptions flag move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check remove unused USESEHExceptions from the MinGW Driver fold USESjLjExceptions into a new GetExceptionModel function that gives the toolchain classes more flexibility with eh models Reviewers: rnk, mstorsjo Differential Revision: https://reviews.llvm.org/D39673 llvm-svn: 319294
* [OPENMP] Generalize capturing of clauses expressions.Alexey Bataev2017-11-281-7/+9
| | | | | | | The handling and capturing of the non-constant expressions of some of the capturable clauses in combined directives is generalized. llvm-svn: 319227
* [WebAssembly] Add options for using the nontrapping-fptoint feature.Dan Gohman2017-11-282-2/+15
| | | | | | | This adds ways to control use of WebAssembly's new nontrapping-fptoint feature. llvm-svn: 319129
* [OPENMP] Codegen for `distribute parallel for simd` directive.Alexey Bataev2017-11-271-1/+1
| | | | | | Added proper codegen for `distribute parallel for simd` directive. llvm-svn: 319078
* Control-Flow Enforcement Technology - Shadow Stack and Indirect Branch ↵Oren Ben Simhon2017-11-262-0/+10
| | | | | | | | | | | | | | | | | | Tracking support (Clang side) Shadow stack solution introduces a new stack for return addresses only. The stack has a Shadow Stack Pointer (SSP) that points to the last address to which we expect to return. If we return to a different address an exception is triggered. This patch includes shadow stack intrinsics as well as the corresponding CET header. It includes CET clang flags for shadow stack and Indirect Branch Tracking. For more information, please see the following: https://software.intel.com/sites/default/files/managed/4d/2a/control-flow-enforcement-technology-preview.pdf Differential Revision: https://reviews.llvm.org/D40224 Change-Id: I79ad0925a028bbc94c8ecad75f6daa2f214171f1 llvm-svn: 318995
* [OPENMP] General improvement of code, NFC.Alexey Bataev2017-11-221-11/+11
| | | | llvm-svn: 318849
* [X86] Update CPUSupports code to reuse LLVM .def file [NFC]Erich Keane2017-11-221-31/+2
| | | | llvm-svn: 318815
* [OPENMP] Initial support for asynchronous data update, NFC.Alexey Bataev2017-11-211-3/+5
| | | | | | | | | OpenMP 5.0 introduces asynchronous data update/dependecies clauses on target data directives. Patch adds initial support for outer task regions to use task-based codegen for future async target data directives. llvm-svn: 318781
* [MINGW] normalize WIN32 macrosMartell Malone2017-11-217-38/+14
| | | | | | | | | | | | | | move _WIN64 and _WIN32 defines to lib/Basic/Targets/OSTargets.h move WIN32, WIN64 and __MINGW64__ to addMinGWDefines fixes __MINGW64__ not being defined for aarch64 adds WIN32 definition for x64 Reviewers: mstorsjo Differential Revision: https://reviews.llvm.org/D40285 llvm-svn: 318755
* [x86][inline-asm] allow recognition of MPX regs inside ms inline-asm blobCoby Tayree2017-11-211-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D38445 llvm-svn: 318739
* [MS] Increase default new alignment for win64 and test itReid Kleckner2017-11-211-1/+1
| | | | | | | | | | | | | | | | | | Summary: This raises __STDCPP_DEFAULT_NEW_ALIGNMENT__ from 8 to 16 on Win64. This matches platforms that follow the usual `2 * sizeof(void*)` alignment requirement for malloc. We might want to consider making that the default rather than relying on long double alignment. Fixes PR35356 Reviewers: STL_MSFT, rsmith Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D40277 llvm-svn: 318723
* [X86] Remove 'mm3now' from isValidFeatureName.Craig Topper2017-11-211-2/+0
| | | | | | The correct spelling is '3dnow' which is already in the list. llvm-svn: 318716
* [OpenMP] Initial implementation of code generation for pragma 'teams ↵Carlo Bertolli2017-11-201-1/+4
| | | | | | | | | | distribute parallel for' on host https://reviews.llvm.org/D40187 This patch implements code gen for 'teams distribute parallel for' on the host, including all its clauses and related regression tests. llvm-svn: 318692
* [X86] Add icelake CPU support for -march.Craig Topper2017-11-191-0/+4
| | | | llvm-svn: 318617
* [X86] Set __corei7__ preprocessor defines for skylake server and cannonlake.Craig Topper2017-11-191-5/+2
| | | | | | This is the resolution we came to in D38824. llvm-svn: 318616
* [OpenMP] Show error if VLAs are not supportedJonas Hahnfeld2017-11-183-0/+3
| | | | | | | | | | | | | | Some target devices (e.g. Nvidia GPUs) don't support dynamic stack allocation and hence no VLAs. Print errors with description instead of failing in the backend or generating code that doesn't work. This patch handles explicit uses of VLAs (local variable in target or declare target region) or implicitly generated (private) VLAs for reductions on VLAs or on array sections with non-constant size. Differential Revision: https://reviews.llvm.org/D39505 llvm-svn: 318601
* [OPENMP] Codegen for `target simd` construct.Alexey Bataev2017-11-171-1/+3
| | | | | | Added codegen support for `target simd` directive. llvm-svn: 318536
* [MinGW] Define __ARM_DWARF_EH__ for MinGW/ARMMartin Storsjo2017-11-171-0/+1
| | | | | | | | | Since SVN r318510, the MinGW/ARM configuration defaults to dwarf exception handling. Differential Revision: https://reviews.llvm.org/D39533 llvm-svn: 318511
* [VirtualFileSystem] Support creating directories then adding files insideBen Hamilton2017-11-161-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In https://reviews.llvm.org/D39572 , I added support for specifying `Type` when invoking `InMemoryFileSystem::addFile()`. However, I didn't account for the fact that when `Type` is `directory_file`, we need to construct an `InMemoryDirectory`, not an `InMemoryFile`, or else clients cannot create files inside that directory. This diff fixes the bug and adds a test. Test Plan: New test added. Ran test with: % make -j12 check-clang-tools Reviewers: bkramer, hokein Reviewed By: bkramer Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D40140 llvm-svn: 318445
* Split x86 "Processor" info into its own def file. [NFC]Erich Keane2017-11-152-281/+9
| | | | | | | | | | | A first step toward removing the repetition of features/CPU info in the x86 target info, this patch pulls all the processor information out into its own .def file. Differential Revision: https://reviews.llvm.org/D40093 llvm-svn: 318343
* Simplify CpuIs code to use include from LLVMErich Keane2017-11-151-30/+6
| | | | | | | | | | | | LLVM exposes a file in the backend (X86TargetParser.def) that contains information about the correct list of CpuIs values. This patch removes 2 of the copied and pasted versions of this list from clang and instead includes the data from the .def file. Differential Revision: https://reviews.llvm.org/D40054 llvm-svn: 318234
* Make DiagnosticIDs::getAllDiagnostics static. NFC.Gabor Horvath2017-11-142-2/+2
| | | | | | | | Patch by: Andras Leitereg! Differential Revision: https://reviews.llvm.org/D39372 llvm-svn: 318150
* [OPENMP] Codegen for `#pragma omp target parallel for simd`.Alexey Bataev2017-11-091-2/+2
| | | | | | Added codegen for `#pragma omp target parallel for simd` and clauses. llvm-svn: 317813
* [OPENMP] Treat '#pragma omp target parallel for simd' as simd directive.Alexey Bataev2017-11-091-1/+2
| | | | | | | `#pragma omp target parallel for simd` mistakenly was not treated as a simd directive, fixed this problem. llvm-svn: 317811
* [VirtualFileSystem] InMemoryFileSystem::addFile(): Type and PermsBen Hamilton2017-11-091-13/+27
| | | | | | | | | | | | | | | | | | | | | | | Summary: This implements a FIXME in InMemoryFileSystem::addFile(), allowing clients to specify User, Group, Type, and/or Perms when creating a file in an in-memory filesystem. New tests included. Ran tests with: % ninja BasicTests && ./tools/clang/unittests/Basic/BasicTests Fixes PR#35172 (https://bugs.llvm.org/show_bug.cgi?id=35172) Reviewers: bkramer, hokein Reviewed By: bkramer, hokein Subscribers: alexfh Differential Revision: https://reviews.llvm.org/D39572 llvm-svn: 317800
* [OPENMP] Codegen for `#pragma omp target parallel for`.Alexey Bataev2017-11-081-1/+1
| | | | llvm-svn: 317719
* Update SanitizerSpecialCaseList to use renamed functions in base class.Mitch Phillips2017-11-071-1/+1
| | | | | | | | | | | | Note: This change has a cyclical dependency on D39485. Both these changes must be submitted at the same time to avoid a build breakage. Reviewers: vlad.tsyrklevich Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D39486 llvm-svn: 317616
* [X86] Add 3dnow and 3dnowa to the list of valid target featuresMartin Storsjo2017-11-061-0/+2
| | | | | | | | These were missed in SVN r316783, which broke compiling mingw-w64 CRT. Differential Revision: https://reviews.llvm.org/D39631 llvm-svn: 317504
* [Basic] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-11-033-57/+91
| | | | | | other minor fixes (NFC). llvm-svn: 317381
* [X86] Define i586 and pentium preprocessor defines for -march=lakemont to ↵Craig Topper2017-11-011-0/+2
| | | | | | match GCC llvm-svn: 317069
* Basic: improve coverage for Darwin targets and fix ABISaleem Abdulrasool2017-10-281-4/+9
| | | | | | | | The existing coverage for the Darwin targets wasn't enough to catch all the variations. Improve the coverage a bit further and fix a few cases for Darwin targets. llvm-svn: 316826
* ARM: centralise SizeType, PtrDiffType, and IntPtrTypeSaleem Abdulrasool2017-10-271-31/+13
| | | | | | | | | Centralise the definitions of these compiler vended types to aid inspection to ensure that they are defined similarly. The one case that stands out is the Darwin case where the types do not match up. This fixes the API conformance for APCS-GNU as well. llvm-svn: 316810
* Filter out invalid 'target' items from being passed to LLVMErich Keane2017-10-271-0/+1
| | | | | | | | | | | | | | | | | Craig noticed that CodeGen wasn't properly ignoring the values sent to the target attribute. This patch ignores them. This patch also sets the 'default' for this checking to 'supported', since only X86 has implemented the support for checking valid CPU names and Feature Names. One test was changed to i686, since it uses a lakemont, which would otherwise be prohibited in x86_64. Differential Revision: https://reviews.llvm.org/D39357 llvm-svn: 316783
* Remove x86,x86_32/64 from isValidFeatureNameErich Keane2017-10-271-3/+0
| | | | | | | | | These are not valid values for this, and are pretty non-sensical, since LLVM doesn't understand them. Differential Revision: https://reviews.llvm.org/D39378 llvm-svn: 316781
* [X86] Add 'sse4' to X86TargetInfo::isValidFeatureNameCraig Topper2017-10-271-0/+1
| | | | | | sse4 is valid for target attribute and functions as an alias of sse4.2. llvm-svn: 316718
* [X86] Make -march=i686 an alias of -march=pentiumproCraig Topper2017-10-262-14/+3
| | | | | | | | I think the only reason they are different is because we don't set tune_i686 for -march=i686 to match GCC. But GCC 4.9.0 seems to have changed this behavior and they do set it now. So I think they can aliases now. Differential Revision: https://reviews.llvm.org/D39349 llvm-svn: 316712
* [CUDA] Print an error if you try to compile with < sm_30 on CUDA 9.Justin Lebar2017-10-251-0/+12
| | | | | | | | | | | | | | Summary: CUDA 9's minimum sm is sm_30. Ideally we should also make sm_30 the default when compiling with CUDA 9, but that seems harder than it should be. Subscribers: sanjoy Differential Revision: https://reviews.llvm.org/D39109 llvm-svn: 316611
* [X86] Add avx512vpopcntdq to Knights MillCraig Topper2017-10-251-0/+2
| | | | | | As indicated by Table 1-1 in Intel Architecture Instruction Set Extensions and Future Features Programming Reference from October 2017. llvm-svn: 316593
* Pull X86 "CPUKind" checking into .cpp file. [NFC]Erich Keane2017-10-232-71/+73
| | | | | | | | Preparing to do a refactor of CPU/feature checking, this patch pulls the one CPU implementation from the .h file to the .cpp file. llvm-svn: 316338
* Basic: restore {,u}intptr_t on NetBSD/ARMSaleem Abdulrasool2017-10-201-3/+4
| | | | | | | | | NetBSD uses `long int` for `intptr_t` on ARM. This was changed in SVN r316046, referenced against other compilers. However, NetBSD's reference was incorrect as the current clang behaviour is more up-to-date. Restore the original behaviour for that target. llvm-svn: 316204
* AMDGPU: Parse r600 CPU name early and expose FMAF capabilityJan Vesely2017-10-191-1/+7
| | | | | | | Improve amdgcn macro test Differential Revision: https://reviews.llvm.org/D38667 llvm-svn: 316181
* [Hexagon] Handling of new HVX flags and target-featuresSumanth Gundapaneni2017-10-182-35/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has the following changes A new flag "-mhvx-length={64B|128B}" is introduced to specify the length of the vector. Previously we have used "-mhvx-double" for 128 Bytes. This adds the target-feature "+hvx-length{64|128}b" The "-mhvx" flag must be provided on command line to enable HVX for Hexagon. If no -mhvx-length flag is specified, a default length is picked from the arch mentioned in this priority order from either -mhvx=vxx or -mcpu. For v60 and v62 the default length is 64 Byte. For unknown versions, the length is 128 Byte. The -mhvx flag adds the target-feature "+hvxv{hvx_version}" The 64 Byte mode is soon going to be deprecated. A warning is emitted if 64 Byte is enabled. A warning is still emitted for the default 64 Byte as well. This warning can be suppressed with a -Wno flag. The "-mhvx-double" and "-mno-hvx-double" flags are deprecated. A warning is emitted if the driver sees them on commandline. "-mhvx-double" is an alias to "-mhvx-length=128B" The compilation will error out if -mhvx-length is specified with out an -mhvx/-mhvx= flag The macro HVX_LENGTH is defined and is set to the length of the vector. Eg: #define HVX_LENGTH 64 The macro HVX_ARCH is defined and is set to the version of the HVX. Eg: #define HVX_ARCH 62 Differential Revision: https://reviews.llvm.org/D38852 llvm-svn: 316102
* Basic: fix __{,U}INTPTR_TYPE__ on ARMSaleem Abdulrasool2017-10-181-1/+4
| | | | | | | | | | Darwin and OpenBSD are the only platforms which use `long int` for `__INTPTR_TYPE__`. The other platforms use `int` in 32-bit, and `long int` on 64-bit (except for VMS and Windows which are LLP64). Adjust the type definitions to match the platform definitions. We now generate the same definition as GCC on all the targets. llvm-svn: 316046
* Basic: fix `__INTPTR_TYPE__` for Windows ARMSaleem Abdulrasool2017-10-171-0/+1
| | | | | | | The `IntPtrType` for Windows ARM should be `int` as per MSVC. Adjust the type accordingly. llvm-svn: 316042
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