summaryrefslogtreecommitdiffstats
path: root/clang/lib/Basic
Commit message (Collapse)AuthorAgeFilesLines
* [AMDGPU] Allow flexible register names in inline asm constraintsYaxun Liu2017-09-281-6/+73
| | | | | | | | | | | | | | | | | | | | | | | | Currently AMDGPU inline asm only allow v and s as register names in constraints. This patch allows the following register names in constraints: (n, m is unsigned integer, n < m) v s {vn} or {v[n]} {sn} or {s[n]} {S} , where S is a special register name {v[n:m]} {s[n:m]} Differential Revision: https://reviews.llvm.org/D37568 llvm-svn: 314452
* [Targets/X86] Remove unneded `return` in setMaxAtomicWidth(). NFCI.Davide Italiano2017-09-281-1/+0
| | | | llvm-svn: 314367
* [AVR] Update data layout to match current LLVM trunkDylan McKay2017-09-271-2/+1
| | | | | | The data layout was changed in r314179 to fix atomic loads and stores. llvm-svn: 314354
* Basic: support Preserve{Most,All} CC on WindowsSaleem Abdulrasool2017-09-262-0/+4
| | | | | | | Add support for the `preserve_mostcc` and `preserve_allcc` on Windows x86_64 and AArch64. This is used by Swift. llvm-svn: 314236
* Allow specifying sanitizers in blacklistsVlad Tsyrklevich2017-09-254-16/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the follow-up patch to D37924. This change refactors clang to use the the newly added section headers in SpecialCaseList to specify which sanitizers blacklists entries should apply to, like so: [cfi-vcall] fun:*bad_vcall* [cfi-derived-cast|cfi-unrelated-cast] fun:*bad_cast* The SanitizerSpecialCaseList class has been added to allow querying by SanitizerMask, and SanitizerBlacklist and its downstream users have been updated to provide that information. Old blacklists not using sections will continue to function identically since the blacklist entries will be placed into a '[*]' section by default matching against all sanitizers. Reviewers: pcc, kcc, eugenis, vsk Reviewed By: eugenis Subscribers: dberris, cfe-commits, mgorny Differential Revision: https://reviews.llvm.org/D37925 llvm-svn: 314171
* [Clang] Adding missing feature to goldmontMichael Zuckerman2017-09-251-0/+1
| | | | | Change-Id: I6c22478d16b8e02ce60dae2f8c80d43bc5ab3a9c llvm-svn: 314104
* [Atomic][X8664] set max atomic inline width according to the targetWei Mi2017-09-222-1/+8
| | | | | | | | | | | This is to fix PR31620. MaxAtomicInlineWidth is set to 128 for x86_64. However for target without cx16 support, 128 atomic operation will generate __sync_* libcalls. The patch set MaxAtomicInlineWidth to 64 if the target doesn't support cx16. Differential Revision: https://reviews.llvm.org/D38046 llvm-svn: 313992
* Add Cross Translation Unit support libraryGabor Horvath2017-09-221-1/+3
| | | | | | | | | | | | | | | | | | This patch introduces a class that can help to build tools that require cross translation unit facilities. This class allows function definitions to be loaded from external AST files based on an index. In order to use this functionality an index is required. The index format is a flat text file but it might be replaced with a different solution in the near future. USRs are used as names to look up the functions definitions. This class also does caching to avoid redundant loading of AST files. Right now only function defnitions can be loaded using this API because this is what the in progress cross translation unit feature of the Static Analyzer requires. In to future this might be extended to classes, types etc. Differential Revision: https://reviews.llvm.org/D34512 llvm-svn: 313975
* [X86] Move even more of our CPU to feature mapping switch to use fallthroughsCraig Topper2017-09-171-44/+40
| | | | | | | | This arranges more of the Intel and AMD CPUs into fallthrough positions based on their features. We may be able to merge this new AMD set with the BTVER or BDVER sets but I didn't look that closely. Differential Revision: https://reviews.llvm.org/D37941 llvm-svn: 313497
* [X86] Remove unnecessary extra encodings from the CPU name enum in clangCraig Topper2017-09-162-72/+14
| | | | | | | | | | | | | | | | | Summary: For a lot of older CPUs we have a 1:1 mapping between CPU name and enum name. But many of them are effectively aliases of each other and as a result are always repeated together at every usage This patch removes most of the duplication. It also uses StringSwitch::Cases to make the many to one mapping in the StringSwitch more obvious. Reviewers: RKSimon, spatel, zvi, igorb Reviewed By: RKSimon Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D37938 llvm-svn: 313462
* [Module map] Introduce a private module re-export directive.Douglas Gregor2017-09-141-0/+5
| | | | | | | | | | | | | Introduce a new "export_as" directive for top-level modules, which indicates that the current module is a "private" module whose symbols will eventually be exported through the named "public" module. This is in support of a common pattern in the Darwin ecosystem where a single public framework is constructed of several private frameworks, with (currently) header duplication and some support from the linker. Addresses rdar://problem/34438420. llvm-svn: 313316
* [AMDGPU] Change addr space of clk_event_t, queue_t and reserve_id_t to globalYaxun Liu2017-09-131-0/+4
| | | | | | Differential Revision: https://reviews.llvm.org/D37703 llvm-svn: 313171
* [Basic] Update CMakeLists.txt to handle repoMinSeong Kim2017-09-091-33/+0
| | | | | | | | | | | | | | | | | | | | | | | Summary: The find_first_existing_file and find_first_existing_vc_file macros in lib/Basic/CMakeLists.txt are removed. The macros are also defined in {LLVM}/cmake/modules/AddLLVM.cmake for the same purpose. This change serves the following 2 objectives: 1. To remove the redundant code in clang to use the same macros in llvm, 2. The macros in AddLLVM.cmake can also handle repo for displaying correct version information. Reviewers: jordan_rose, cfe-commits, modocache, hintonda Reviewed By: hintonda Subscribers: mgorny Differential Revision: https://reviews.llvm.org/D35533 llvm-svn: 312865
* Fix ownership of the MemoryBuffer in a FrontendInputFile.Richard Smith2017-09-091-5/+6
| | | | | | | | This fixes a possible crash on certain kinds of corrupted AST file, but checking in an AST file corrupted in just the right way will be a maintenance nightmare because the format changes frequently. llvm-svn: 312851
* [OpenCL] Add half load and store builtinsJan Vesely2017-09-071-2/+7
| | | | | | | | This enables load/stores of half type, without half being a legal type. Differential Revision: https://reviews.llvm.org/D37231 llvm-svn: 312742
* [CUDA] Added rudimentary support for CUDA-9 and sm_70.Artem Belevich2017-09-072-0/+14
| | | | | | | | | | | | | For now CUDA-9 is not included in the list of CUDA versions clang searches for, so the path to CUDA-9 must be explicitly passed via --cuda-path=. On LLVM side NVPTX added sm_70 GPU type which bumps required PTX version to 6.0, but otherwise is equivalent to sm_62 at the moment. Differential Revision: https://reviews.llvm.org/D37576 llvm-svn: 312734
* Change Diagnostic Category size error from runtime to compiletimeErich Keane2017-08-281-12/+23
| | | | | | | | | | Diagnostic Categories are fairly annoying, and are only enforced by a runtime-debug-only assert. This puts in a touch more work to get this all done at compile-time with static asserts Differential Revision: https://reviews.llvm.org/D37122 llvm-svn: 311905
* [Basic] Add a DiagnosticError llvm::ErrorInfo subclassAlex Lorenz2017-08-251-1/+4
| | | | | | | | | Clang's DiagnosticError is an llvm::Error payload that stores a partial diagnostic and its location. I'll be using it in the refactoring engine. Differential Revision: https://reviews.llvm.org/D36969 llvm-svn: 311778
* [mips] Introducing option -mabs=[legacy/2008]Petar Jovanovic2017-08-242-3/+12
| | | | | | | | | | | | | | | | | In patch r205628 using abs.[ds] instruction is forced, as they should behave in accordance with flags Has2008 and ABS2008. Unfortunately for revisions prior mips32r6 and mips64r6, abs.[ds] is not generating correct result when working with NaNs. To generate a sequence which always produce a correct result but also to allow user more control on how his code is compiled, option -mabs is added where user can choose legacy or 2008. By default legacy mode is used on revisions prior R6. Mips32r6 and mips64r6 use abs2008 mode by default. Patch by Aleksandar Beserminji Differential Revision: https://reviews.llvm.org/D35982 llvm-svn: 311669
* [Clang][x86][Inline Asm] support for GCC style inline asm - Y<x> constraintsCoby Tayree2017-08-242-18/+35
| | | | | | | | | | This patch is intended to enable the use of basic double letter constraints used in GCC extended inline asm {Yi Y2 Yz Y0 Ym Yt}. Supersedes D35205 llvm counterpart: D36369 Differential Revision: https://reviews.llvm.org/D36371 llvm-svn: 311643
* bpf: add -mcpu=# support for bpfYonghong Song2017-08-231-0/+12
| | | | | | | | | | | | | | | | | | | | | -mcpu=# will support: . generic: the default insn set . v1: insn set version 1, the same as generic . v2: insn set version 2, version 1 + additional jmp insns . probe: the compiler will probe the underlying kernel to decide proper version of insn set. Examples: $ clang -target bpf -mcpu=v1 -c t.c $ clang -target bpf -mcpu=v2 -c t.c $ clang -target bpf -mcpu=generic -c t.c $ clang -target bpf -mcpu=probe -c t.c $ clang -target bpf -mcpu=v3 -c t.c error: unknown target CPU 'v3' Signed-off-by: Yonghong Song <yhs@fb.com> Acked-by: Alexei Starovoitov <ast@kernel.org> llvm-svn: 311523
* [mips] Rename getSupportedNanEncoding() to getIEEE754Standard()Petar Jovanovic2017-08-221-2/+2
| | | | | | | | | | | Rename the function getSupportedNanEncoding() to getIEEE754Standard(), since this function will be used for non-nan related features. Patch by Aleksandar Beserminji. Differential Revision: https://reviews.llvm.org/D36824 llvm-svn: 311454
* AMDGPU: add missing amdgcn processors and testsKonstantin Zhuravlyov2017-08-181-10/+15
| | | | | | | | | | | | - gfx600 - gfx601 - gfx703 - gfx902 - gfx903 Differential Revision: https://reviews.llvm.org/D36771 llvm-svn: 311141
* [OpenCL] Allow targets to select address space per typeSven van Haastregt2017-08-152-1/+40
| | | | | | | | | | | | | Generalize getOpenCLImageAddrSpace into getOpenCLTypeAddrSpace, such that targets can select the address space per type. No functional changes intended. Initial patch by Simon Perretta. Differential Revision: https://reviews.llvm.org/D33989 llvm-svn: 310911
* [c++2a] Treat 'concept' and 'requires' as keywords, add compat warning for ↵Richard Smith2017-08-131-2/+6
| | | | | | C++17 and before. llvm-svn: 310803
* [AArch64] Add support for a MinGW AArch64 targetMartin Storsjo2017-08-133-27/+72
| | | | | | Differential Revision: https://reviews.llvm.org/D36364 llvm-svn: 310798
* Revert r310057Stefan Maksimovic2017-08-112-1/+7
| | | | | | | | Bring back changes which r304953 introduced since they were in fact not the cause of failures described in r310057 commit message. llvm-svn: 310702
* [X86] Implement __builtin_cpu_isCraig Topper2017-08-102-0/+40
| | | | | | | | This patch adds support for __builtin_cpu_is. I've tried to match the strings supported to the latest version of gcc. Differential Revision: https://reviews.llvm.org/D35449 llvm-svn: 310657
* [X86] Support 'avx5124vnniw' and 'avx5124fmaps' for __builtin_cpu_supports.Craig Topper2017-08-081-0/+2
| | | | | | They still need to be implemented in the intrinsics, the command line, and the backend. But this change isn't dependent on any of that and resolves a TODO. llvm-svn: 310386
* [AArch64] Ignore stdcall and similar on aarch64/windowsMartin Storsjo2017-08-072-0/+19
| | | | | | | | | | This is similar to what's done on arm and x86_64, where these calling conventions are silently ignored, as in SVN r245076. Differential Revision: https://reviews.llvm.org/D36105 llvm-svn: 310303
* Add OpenCL 2.0 atomic builtin functions as Clang builtinYaxun Liu2017-08-041-0/+2
| | | | | | | | | | | | | | | | | | | | | OpenCL 2.0 atomic builtin functions have a scope argument which is ideally represented as synchronization scope argument in LLVM atomic instructions. Clang supports translating Clang atomic builtin functions to LLVM atomic instructions. However it currently does not support synchronization scope of LLVM atomic instructions. Without this, users have to use LLVM assembly code to implement OpenCL atomic builtin functions. This patch adds OpenCL 2.0 atomic builtin functions as Clang builtin functions, which supports generating LLVM atomic instructions with synchronization scope operand. Currently only constant memory scope argument is supported. Support of non-constant memory scope argument will be added later. Differential Revision: https://reviews.llvm.org/D28691 llvm-svn: 310082
* Revert r304953 for release 5.0.0Stefan Maksimovic2017-08-042-7/+1
| | | | | | | | | | This is causing failures when compiling clang with -O3 as one of the structures used by clang is passed by value and uses the fastcc calling convention. Faliures manifest for stage2 mips build. llvm-svn: 310057
* Define _GNU_SOURCE for RTEMS c++Walter Lee2017-08-021-0/+2
| | | | | | | | | | | | Summary: This is required by the libc++ locale support. Reviewers: jyknight Subscribers: fedor.sergeev Differential Revision: https://reviews.llvm.org/D36121 llvm-svn: 309815
* Use VFS operations in FileManager::makeAbsolutePath.Ilya Biryukov2017-08-021-1/+1
| | | | | | | | | | | | | | Summary: It used to call into llvm::sys::fs::make_absolute. Reviewers: akyrtzi, erikjv, bkramer, krasimir, klimek Reviewed By: klimek Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D36155 llvm-svn: 309795
* [x86][inline-asm]Allow a pack of Control Debug to be properly pickedCoby Tayree2017-08-011-0/+1
| | | | | | | | Allows the incorporation of legit (x86) Debug Regs within inline asm stataements Differential Revision: https://reviews.llvm.org/D36074 llvm-svn: 309672
* Move RTEMS to OSTargets.hWalter Lee2017-07-312-34/+34
| | | | | | Differential Revision: https://reviews.llvm.org/D36106 llvm-svn: 309626
* [AArch64] Don't define __LP64__ when targeting WindowsMartin Storsjo2017-07-311-2/+4
| | | | | | | | | Windows/ARM64 is a LLP64 environment, so don't set this default define. Differential Revision: https://reviews.llvm.org/D36098 llvm-svn: 309619
* [Targets] Move addCygMingDefines into the arch-independent Targets.cpp (NFC)Martin Storsjo2017-07-313-24/+28
| | | | | | | | | | | | This fixes a dependency inconsistency, where addMinGWDefines in Targets.cpp (used from other architectures than X86) called the addCygMingDefines function in X86.h. This was inconsistently split in SVN r308791 (D35701). Differential Revision: https://reviews.llvm.org/D36072 llvm-svn: 309598
* [x86][inline-asm]Allow a pack of Control Regs to be properly pickedCoby Tayree2017-07-301-0/+1
| | | | | | | | Allows the incorporation of legit (x86) Control Regs within inline asm stataements Differential Revision: https://reviews.llvm.org/D35903 llvm-svn: 309508
* Revert r264998 and r265035.Akira Hatanaka2017-07-271-7/+0
| | | | | | | | | | r303175 made changes to have __cxa_allocate_exception return a 16-byte aligned pointer, so it's no longer necessary to specify a lower alignment (8-bytes) for exception objects on Darwin. rdar://problem/32363695 llvm-svn: 309308
* Update to use enum classes for various ARM *Kind enumsFlorian Hahn2017-07-273-45/+46
| | | | | | | | | | | | | | Summary: This updates the relevant Clang parts for the LLVM change D35882. Reviewers: rengolin, chandlerc, javed.absar, rovka Reviewed By: rovka Subscribers: aemerson, cfe-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D35884 llvm-svn: 309289
* AArch64 & ARM: move TargetInfo functions from .h to .cpp file. NFC.Tim Northover2017-07-244-1100/+1294
| | | | | | | Most of them are virtual anyway, and the few remaining ones can move to the .cpp for consistency. llvm-svn: 308898
* [Bash-autocompletion] Fixed typo and add '-' after -WnoYuka Takahashi2017-07-221-1/+1
| | | | | | | | Summary: -Wno-<warning> was autocompleted as -Wno<warning>, so fixed this typo. Differential Revision: https://reviews.llvm.org/D35762 llvm-svn: 308824
* Remove Bitrig: Clang ChangesErich Keane2017-07-214-65/+3
| | | | | | | | Bitrig code has been merged back to OpenBSD, thus the OS has been abandoned. Differential Revision: https://reviews.llvm.org/D35708 llvm-svn: 308797
* Break up Targets.cpp into a header/impl pair per target type[NFCI]Erich Keane2017-07-2147-9599/+10925
| | | | | | | | | | | | | | | | Targets.cpp is getting unwieldy, and even minor changes cause the entire thing to cause recompilation for everyone. This patch bites the bullet and breaks it up into a number of files. I tended to keep function definitions in the class declaration unless it caused additional includes to be necessary. In those cases, I pulled it over into the .cpp file. Content is copy/paste for the most part, besides includes/format/etc. Differential Revision: https://reviews.llvm.org/D35701 llvm-svn: 308791
* [OPENMP] Initial support for 'in_reduction' clause.Alexey Bataev2017-07-211-2/+4
| | | | | | | Parsing/sema analysis for 'in_reduction' clause for task-based directives. llvm-svn: 308768
* [Hexagon] Add inline-asm constraint 'a' for modifier register classKrzysztof Parzyszek2017-07-211-0/+3
| | | | | | | For example asm ("memw(%0++%1) = %2" : : "r"(addr),"a"(mod),"r"(val) : "memory") llvm-svn: 308763
* [NVPTX] Add lowering of i128 params.Artem Belevich2017-07-201-2/+2
| | | | | | | | | | | | | | | | | The patch adds support of i128 params lowering. The changes are quite trivial to support i128 as a "special case" of integer type. With this patch, we lower i128 params the same way as aggregates of size 16 bytes: .param .b8 _ [16]. Currently, NVPTX can't deal with the 128 bit integers: * in some cases because of failed assertions like ValVTs.size() == OutVals.size() && "Bad return value decomposition" * in other cases emitting PTX with .i128 or .u128 types (which are not valid [1]) [1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types Differential Revision: https://reviews.llvm.org/D34555 Patch by: Denys Zariaiev (denys.zariaiev@gmail.com) llvm-svn: 308675
* [vfs] Assert that the status is known in equivalent().Benjamin Kramer2017-07-201-0/+1
| | | | | | Otherwise we'd silently compare uninitialized data. llvm-svn: 308604
* [X86] Put avx512vpopcntdq in the right spot in the validateCpuSupports ↵Craig Topper2017-07-191-1/+1
| | | | | | | | string switch. The validateCpuSupports switch is in the order of the enum defined in CGBuiltin.cpp and libgcc/compiler-rt. llvm-svn: 308546
OpenPOWER on IntegriCloud