summaryrefslogtreecommitdiffstats
path: root/clang/lib/Basic
Commit message (Collapse)AuthorAgeFilesLines
...
* [X86] Add 'movbe' to btver2 CPU.Craig Topper2017-07-141-0/+1
| | | | | | This probably doesn't change anything because the frotend doesn't do anything with this feature and the backend will infer from the cpu string. So this is just for consistency with other cpus that support movbe. llvm-svn: 308002
* [AArch64] Add support for handling the +sve target feature.Amara Emerson2017-07-131-4/+11
| | | | | | | | This also adds the appropriate predefine for SVE if enabled. Differential Revision: https://reviews.llvm.org/D35118 llvm-svn: 307919
* [mips] Create the correct profiling symbol on Linux MIPSSimon Atanasyan2017-07-111-0/+4
| | | | llvm-svn: 307627
* CodeGen: Fix address space of global variableYaxun Liu2017-07-081-0/+4
| | | | | | | | | | | | | Certain targets (e.g. amdgcn) require global variable to stay in global or constant address space. In C or C++ global variables are emitted in the default (generic) address space. This patch introduces virtual functions TargetCodeGenInfo::getGlobalVarAddressSpace and TargetInfo::getConstantAddressSpace to handle this in a general approach. It only affects IR generated for amdgcn target. Differential Revision: https://reviews.llvm.org/D33842 llvm-svn: 307470
* [X86] Replace 'fallthrough' comments with LLVM_FALLTHROUGH.Craig Topper2017-07-071-6/+6
| | | | llvm-svn: 307420
* This reverts r305820 (ARMv.2-A FP16 vector intrinsics) because it showsSjoerd Meijer2017-07-061-3/+0
| | | | | | | | problems in testing, see comments in D34161 for some more details. A fix is in progres in D35011, but a revert seems better now as the fix will probably take some more time to land. llvm-svn: 307277
* [SystemZ] Simplify handling of ISA revisionsUlrich Weigand2017-07-051-26/+22
| | | | | | | | | | This moves determination of the ISA revision from the CPU name to one single place, removing a bunch of duplicated code. It also makes the supported ISA revisions available as feature strings. No functional change. llvm-svn: 307156
* [AMDGPU] Fix size and alignment of size_t and pointer typesYaxun Liu2017-07-051-6/+14
| | | | | | Differential Revision: https://reviews.llvm.org/D34995 llvm-svn: 307121
* [AMDGPU] Fix regressions on mesa/clover with libclc due to address spaceYaxun Liu2017-07-041-10/+18
| | | | | | | | | | Currently AMDGPUTargetInfo does not initialize AddrSpaceMap in constructor, which causes regressions in mesa/clover with libclc. This patch fixes that. Differential Revision: https://reviews.llvm.org/D34987 llvm-svn: 307105
* fix trivial typos; NFCHiroshi Inoue2017-07-011-1/+1
| | | | llvm-svn: 306954
* Changed Opts.EABIVersion type string to llvm::EABI enum classYuka Takahashi2017-07-011-2/+2
| | | | | | | | | | Summary: Changed EABIVersion type from string to llvm::EABI. It seems it was just a typo and this is intended implementation. Differential Revision: https://reviews.llvm.org/D34595 llvm-svn: 306953
* [X86] Add RDRND feature to Goldmont. Add MOVBE to all Atom CPUs.Craig Topper2017-06-301-0/+2
| | | | | | Diffential Revision: https://reviews.llvm.org/D34842 llvm-svn: 306851
* [X86] Add a break to the last case of a few switches to prevent accidents in ↵Craig Topper2017-06-301-0/+4
| | | | | | the future. NFC llvm-svn: 306850
* [X86] Move all atom CPUs to the same section of the switch and use ↵Craig Topper2017-06-301-3/+6
| | | | | | | | fallthroughs like we do for other CPU generations. NFC This is prep work to add MOVBE to all Atom CPUs. This instruction didn't come in to the Nehalem/Westmere/SandyBridge/etc. line until later so there's no natural place to overlap the Atom CPUs into that part of the switch. llvm-svn: 306849
* ARMV8-A archkind and target defines helper functionsSjoerd Meijer2017-06-301-12/+47
| | | | | | | | | | | | This introduces helper functions that set target defines for different ARMV8-A architecture kinds. It fixes an issue that the v8.1 define ARM_FEATURE_QRDMX was not set for v8.2. These helper functions make things more “scalable” if we want to add ARMv8.3 at some point, and a cleanup has been done to hold the architecture kind in one variable (instead of one for each). Differential Revision: https://reviews.llvm.org/D34686 llvm-svn: 306805
* [Clang][X86][Goldmont]Adding new target-cpu: Goldmont Michael Zuckerman2017-06-291-0/+21
| | | | | | | | | | | | | | | [Clang-side] Connecting the GoldMont processor to his feature. Reviewers: 1. igorb 2. delena 3. zvi Differential Revision: https://reviews.llvm.org/D34807 llvm-svn: 306673
* Factor out a functionality from isBeforeInTranslationUnitGabor Horvath2017-06-291-37/+48
| | | | | | | | | | The first user of this API will be the cross translation unit functionality of the Static Analyzer which will be committed in a follow-up patch. Differential Revision: https://reviews.llvm.org/D34506 llvm-svn: 306648
* [COFF, ARM64] Add support for Windows ARM64 COFF formatMandeep Singh Grang2017-06-271-0/+39
| | | | | | | | | | | | | | Summary: This is the clang part of the initial implementation to support Windows ARM64 COFF format. Reviewers: ruiu, t.p.northover, rnk, compnerd Reviewed By: ruiu, compnerd Subscribers: aemerson, kristof.beyls, cfe-commits, llvm-commits Differential Revision: https://reviews.llvm.org/D34706 llvm-svn: 306489
* Revert "Revert "[NFC] Refactor DiagnosticRenderer to use FullSourceLoc""Christof Douma2017-06-271-0/+70
| | | | | | | | | | | | | | | | | | | | | | This reverts commit r305688 meaning it reintroduces r305684. To repeat: [NFC] Refactor DiagnosticRenderer to use FullSourceLoc Move the DiagnosticRenderer and its dependents to using FullSourceLocs instead of a SourceLocation and SourceManager pointer. The changeset is rather large but entirely mechanical. This is step one to allow DiagnosticRenderer to take either llvm::SMLocs or clang::SourceLocations. This breaks clang-tidy and clng-query which will be fixed in a commit soon after. Patch by Sanne Wouda Differential Revision: https://reviews.llvm.org/D31709 llvm-svn: 306384
* Reapply "Frontend support for Nios2 target"Nikolai Bozhenov2017-06-271-0/+145
| | | | | | | | | | | | | | Summary: - Implements TargetInfo class for Nios2 target. - Enables handling of -march and -mcpu options for Nios2 target. - Definition of Nios2 builtin functions. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D33356 Author: belickim <mateusz.belicki@intel.com> llvm-svn: 306383
* Remove some redundant setup when preprocessing .pcm files.Richard Smith2017-06-261-9/+0
| | | | | | Both of these steps are immediately overwritten by the FrontendAction setup. llvm-svn: 306325
* [inline asm][gcc-compatiblity] "=i" output constraint supportMarina Yatsina2017-06-261-0/+5
| | | | | | | | Ignore ‘i’,’n’,’E’,’F’ as output constraints in inline assembly (gcc compatibility) Differential Revision: https://reviews.llvm.org/D31383 llvm-svn: 306297
* Add support for Ananas platformEd Schouten2017-06-251-0/+19
| | | | | | | | | | | | | | | | | Ananas is a home-brew operating system, mainly for amd64 machines. After using GCC for quite some time, it has switched to clang and never looked back - yet, having to manually patch things is annoying, so it'd be much nicer if this was in the official tree. More information: https://github.com/zhmu/ananas/ https://rink.nu/projects/ananas.html Submitted by: Rink Springer Differential Revision: https://reviews.llvm.org/D32936 llvm-svn: 306239
* [MSP430] Fix data layout string.Vadzim Dambrouski2017-06-231-1/+1
| | | | | | | | | | | | | | | | | Summary: Change data layout string so it would be compatible with MSP430 EABI. Depends on D34561 Reviewers: asl, awygle Reviewed By: asl Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D34562 llvm-svn: 306161
* [AArch64] ADD ARMv.2-A FP16 vector intrinsicsAbderrazek Zaafrani2017-06-201-0/+10
| | | | | | Differential Revision: https://reviews.llvm.org/D34161 llvm-svn: 305820
* Support non-identifier module names when preprocessing modules.Richard Smith2017-06-191-22/+41
| | | | llvm-svn: 305758
* Revert "[NFC] Refactor DiagnosticRenderer to use FullSourceLoc"Christof Douma2017-06-191-70/+0
| | | | | | | This reverts commit 305684. This patch breaks extra/tools/clang-tidy llvm-svn: 305688
* [NFC] Refactor DiagnosticRenderer to use FullSourceLocChristof Douma2017-06-191-0/+70
| | | | | | | | | | | | | | | | Move the DiagnosticRenderer and its dependents to using FullSourceLocs instead of a SourceLocation and SourceManager pointer. The changeset is rather large but entirely mechanical. This is step one to allow DiagnosticRenderer to take either llvm::SMLocs or clang::SourceLocations. Patch by Sanne Wouda Review: https://reviews.llvm.org/D31709 Change-Id: If351a112cdf6718e2d3ef6721b8da9c6376b32dd llvm-svn: 305684
* Revert "Define _GNU_SOURCE for rtems c++"Daniel Jasper2017-06-151-3/+0
| | | | | | | | | | | | | | | | | This reverts commit r305399. This breaks a build in libcxx: libcxx/src/system_error.cpp:90:16: error: assigning to 'int' from incompatible type 'char *' if ((ret = ::strerror_r(ev, buffer, strerror_buff_size)) != 0) { ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Which makes sense according to: https://linux.die.net/man/3/strerror_r Not entirely sure how this needs to be fixed. llvm-svn: 305456
* Define _GNU_SOURCE for rtems c++James Y Knight2017-06-141-0/+3
| | | | | | | | | | This is required by the libc++ locale support. Patch by Walter Lee. Differential Revision: https://reviews.llvm.org/D34105 llvm-svn: 305399
* Revert of r305066 "Reapply Frontend support for Nios2 target"Nikolai Bozhenov2017-06-091-145/+0
| | | | llvm-svn: 305068
* Reapply "Frontend support for Nios2 target"Nikolai Bozhenov2017-06-091-0/+145
| | | | | | | | | | | | | | Summary: - Implements TargetInfo class for Nios2 target. - Enables handling of -march and -mcpu options for Nios2 target. - Definition of Nios2 builtin functions. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D33356 Author: belickim <mateusz.belicki@intel.com> llvm-svn: 305066
* Revert "Frontend support for Nios2 target"Nikolai Bozhenov2017-06-081-145/+0
| | | | | | As it breaks many buildbots. llvm-svn: 305002
* Frontend support for Nios2 target.Nikolai Bozhenov2017-06-081-0/+145
| | | | | | | | | | | | | | Summary: - Implements TargetInfo class for Nios2 target. - Enables handling of -march and -mcpu options for Nios2 target. - Definition of Nios2 builtin functions. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D33356 Author: belickim <mateusz.belicki@intel.com> llvm-svn: 304994
* Reapply r304929 [mips] Add runtime options to enable/disable madd/sub.fmtPetar Jovanovic2017-06-071-1/+7
| | | | | | | | | | | | | | | | | The test in r304929 broke multiple buildbots as it expected mips target to be registered and available (which is not necessarily true). Updating the test with this condition. Original commit: [mips] Add runtime options to enable/disable madd.fmt and msub.fmt Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable generation of madd.fmt and similar instructions respectively, as per GCC. Patch by Stefan Maksimovic. llvm-svn: 304953
* Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmtPetar Jovanovic2017-06-071-7/+1
| | | | | | | | | | | | | | | Revert r304929 since the test broke buildbots. Original commit: [mips] Add runtime options to enable/disable madd.fmt and msub.fmt Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable generation of madd.fmt and similar instructions respectively, as per GCC. Patch by Stefan Maksimovic. llvm-svn: 304935
* [mips] Add runtime options to enable/disable madd.fmt and msub.fmtPetar Jovanovic2017-06-071-1/+7
| | | | | | | | | | | Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable generation of madd.fmt and similar instructions respectively, as per GCC. Patch by Stefan Maksimovic. Differential Revision: https://reviews.llvm.org/D33401 llvm-svn: 304929
* [CodeGen] Add thumb-mode to target-features for arm/thumb triples.Florian Hahn2017-06-071-0/+7
| | | | | | | | | | | | | | | | | | | | | Summary: The thumb-mode target feature is used to force Thumb or ARM code generation on a per-function basis. Explicitly adding +thumb-mode to functions for thumbxx triples enables mixed ARM/Thumb code generation in places where compilation units with thumbxx and armxx triples are merged together (e.g. the IR linker or LTO). For armxx triples, -thumb-mode is added in a similar fashion. Reviewers: echristo, t.p.northover, kristof.beyls, rengolin Reviewed By: echristo Subscribers: rinon, aemerson, mehdi_amini, javed.absar, cfe-commits Differential Revision: https://reviews.llvm.org/D33448 llvm-svn: 304897
* [ARM] Fix Neon vector type alignment to 64-bitJaved Absar2017-06-071-0/+4
| | | | | | | | | | This is restricted version of patch - https://reviews.llvm.org/D33205 that I reverted as it was leading to ABI breaks on darwin etc. This patch restricts the fix to AAPCS (Android remains 128-bit). Reviewed by: Renato Golin, Stephen Hines Differential Revision: https://reviews.llvm.org/D33786 llvm-svn: 304889
* [WebAssembly] Set MaxAtomicInlineWidth to 64.Dan Gohman2017-06-071-1/+1
| | | | | | | | The WebAssembly threads proposal has changed such that C++ implementations can now declare that atomics up to 64 bits are "lock free" in C++'s terms. llvm-svn: 304859
* [ARM] Add support for target("arm") and target("thumb").Florian Hahn2017-06-061-1/+11
| | | | | | | | | | | | | | | | | | | | | | | Summary: This patch adds support for the target("arm") and target("thumb") attributes, which can be used to force the compiler to generated ARM or Thumb code for a function. In LLVM, ARM or Thumb code generation can be controlled by the thumb-mode target feature. But GCC already uses target("arm") and target("thumb"), so we have to substitute "arm" with -thumb-mode and "thumb" with +thumb-mode. Reviewers: echristo, pcc, kristof.beyls Reviewed By: echristo Subscribers: ahatanak, aemerson, javed.absar, kristof.beyls, cfe-commits Differential Revision: https://reviews.llvm.org/D33721 llvm-svn: 304781
* Fix memory leak exposed by r304726.Richard Smith2017-06-051-5/+7
| | | | | | | | When giving a ContentCache a null buffer, ignore the DoNotFree flag rather than inheriting it onto whatever buffer we end up using for the file. Also ensure that the main buffer is properly destroyed. llvm-svn: 304740
* Rather than rejecting attempts to run preprocessor-only actions on AST files,Richard Smith2017-06-051-0/+35
| | | | | | | | | | replay the steps taken to create the AST file with the preprocessor-only action installed to produce preprocessed output. This can be used to produce the preprocessed text for an existing .pch or .pcm file. llvm-svn: 304726
* Added missing break.Galina Kistanova2017-06-031-0/+1
| | | | llvm-svn: 304653
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-06-031-0/+2
| | | | llvm-svn: 304652
* Support lazy stat'ing of files referenced by module maps.Richard Smith2017-06-021-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for a `header` declaration in a module map to specify certain `stat` information (currently, size and mtime) about that header file. This has two purposes: - It removes the need to eagerly `stat` every file referenced by a module map. Instead, we track a list of unresolved header files with each size / mtime (actually, for simplicity, we track submodules with such headers), and when attempting to look up a header file based on a `FileEntry`, we check if there are any unresolved header directives with that `FileEntry`'s size / mtime and perform deferred `stat`s if so. - It permits a preprocessed module to be compiled without the original files being present on disk. The only reason we used to need those files was to get the `stat` information in order to do header -> module lookups when using the module. If we're provided with the `stat` information in the preprocessed module, we can avoid requiring the files to exist. Unlike most `header` directives, if a `header` directive with `stat` information has no corresponding on-disk file the enclosing module is *not* marked unavailable (so that behavior is consistent regardless of whether we've resolved a header directive, and so that preprocessed modules don't get marked unavailable). We could actually do this for all `header` directives: the only reason we mark the module unavailable if headers are missing is to give a diagnostic slightly earlier (rather than waiting until we actually try to build the module / load and validate its .pcm file). Differential Revision: https://reviews.llvm.org/D33703 llvm-svn: 304515
* Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics"Vedant Kumar2017-06-021-10/+0
| | | | | | | | | | | | This reverts commit r304493. It breaks all the Darwin bots: http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental_check/37168 Failure: Failing Tests (2): Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c Clang :: CodeGen/arm_neon_intrinsics.c llvm-svn: 304509
* [AArch64] Add ARMv8.2-A FP16 vefctor intrinsicsAbderrazek Zaafrani2017-06-011-0/+10
| | | | llvm-svn: 304493
* [Modules] Handle sanitizer feature mismatches when importing modulesVedant Kumar2017-06-011-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch makes it an error to have a mismatch between the enabled sanitizers in a CU, and in any module being imported into the CU. Only mismatches between non-modular sanitizers are treated as errors. This patch also includes non-modular sanitizers in module hashes, in order to ensure module rebuilds occur when -fsanitize=X is toggled on and off for non-modular sanitizers, and to cut down on module rebuilds when the option is toggled for modular sanitizers. This fixes a longstanding issue with implicit modules and sanitizers, which Duncan originally diagnosed. When building with implicit modules it's possible to hit a scenario where modules are built without -fsanitize=address, and are subsequently imported into CUs with -fsanitize=address enabled. This causes strange failures at runtime. The case Duncan found affects libcxx, since its vector implementation behaves differently when ASan is enabled. Implicit module builds should "just work" when -fsanitize=X is toggled on and off across multiple compiler invocations, which is what this patch does. Differential Revision: https://reviews.llvm.org/D32724 llvm-svn: 304463
* [OpenCL] Makes kernels use the SPIR_KERNEL CC by default.Pekka Jaaskelainen2017-06-011-0/+16
| | | | | | | | | | | | | | | | Rationale: OpenCL kernels are called via an explicit runtime API with arguments set with clSetKernelArg(), not as normal sub-functions. Return SPIR_KERNEL by default as the kernel calling convention to ensure the fingerprint is fixed such way that each OpenCL argument gets one matching argument in the produced kernel function argument list to enable feasible implementation of clSetKernelArg() with aggregates etc. In case we would use the default C calling conv here, clSetKernelArg() might break depending on the target-specific conventions; different targets might split structs passed as values to multiple function arguments etc. https://reviews.llvm.org/D33639 llvm-svn: 304389
OpenPOWER on IntegriCloud