Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Fix handling of curly braces in NVPTX inline asm | Justin Holewinski | 2012-07-11 | 1 | -0/+1 |
| | | | | | | | | Fixes bug 13322 Patch by Dmitry Mikushin llvm-svn: 160050 | ||||
* | Wire up -mrdrnd for X86. | Benjamin Kramer | 2012-07-07 | 1 | -4/+27 |
| | | | | | | | For some reason GCC decided to call the feature rdrnd instead of rdrand, which requires translating it for LLVM. llvm-svn: 159897 | ||||
* | Remove unreachable default case to pacify clang's -Wcovered-switch-default. | Benjamin Kramer | 2012-07-06 | 1 | -1/+0 |
| | | | | llvm-svn: 159829 | ||||
* | MIPS: Define __mips_dsp_rev / __mips_dspr2 / __mips_dsp macros | Simon Atanasyan | 2012-07-05 | 1 | -0/+23 |
| | | | | | | if -mdsp or -mdspr2 options are provided. llvm-svn: 159774 | ||||
* | MIPS: Add -mdsp/-mno-dsp and -mdspr2/-mno-dspr2 command line options support. | Simon Atanasyan | 2012-07-05 | 1 | -1/+1 |
| | | | | llvm-svn: 159769 | ||||
* | MIPS: Define __mips16 macro if -mips16 option is provided. | Simon Atanasyan | 2012-07-05 | 1 | -0/+8 |
| | | | | llvm-svn: 159753 | ||||
* | MIPS: Replace the pair of boolean flags by enumeration to hold selected ↵ | Simon Atanasyan | 2012-07-05 | 1 | -24/+26 |
| | | | | | | float ABI. llvm-svn: 159752 | ||||
* | MIPS: Add -mips16 / -mno-mips16 command line support. | Simon Atanasyan | 2012-07-05 | 1 | -1/+2 |
| | | | | llvm-svn: 159747 | ||||
* | Add additional architecture defines for PPC targets. | Hal Finkel | 2012-07-03 | 1 | -9/+49 |
| | | | | | | Patch by Andy Gibbs. llvm-svn: 159665 | ||||
* | Support MIPS DSP Rev1 intrinsics. | Simon Atanasyan | 2012-06-28 | 1 | -1/+10 |
| | | | | | | This patch was reviewed in the llvm-commits list by Jim Grosbach. llvm-svn: 159366 | ||||
* | Explicitly build __builtin_va_list. | Meador Inge | 2012-06-16 | 1 | -42/+30 |
| | | | | | | | The target specific __builtin_va_list types are now explicitly built instead of injecting strings into the preprocessor input. llvm-svn: 158592 | ||||
* | Add PPC support for translating gcc-style -mcpu options into LLVM ↵ | Hal Finkel | 2012-06-11 | 1 | -0/+49 |
| | | | | | | | | | | | | | | -target-cpu options. This functionality is based on what is done on ARM, and enables selecting PPC CPUs in a way compatible with gcc's driver. Also, mirroring gcc (and what is done on x86), -mcpu=native support was added. This uses the host cpu detection from LLVM (which will also soon be updated by refactoring code currently in backend). In order for this to work, the target needs a list of valid CPUs -- we now accept all CPUs accepted by LLVM. A few preprocessor defines for common CPU types have been added. llvm-svn: 158334 | ||||
* | Add XOP feature flag. | Craig Topper | 2012-06-09 | 1 | -8/+28 |
| | | | | llvm-svn: 158284 | ||||
* | Mips: Define __mips_hard_float macro additional to __mips_single_float | Simon Atanasyan | 2012-06-05 | 1 | -6/+7 |
| | | | | | | when single float ABI is selected. llvm-svn: 157996 | ||||
* | Make disabling SSE levels also disable AVX and FMA. | Craig Topper | 2012-06-03 | 1 | -6/+13 |
| | | | | llvm-svn: 157907 | ||||
* | Make AES and PCLMUL features imply SSE2 as that's needed to get the right ↵ | Craig Topper | 2012-06-03 | 1 | -3/+4 |
| | | | | | | types defined. llvm-svn: 157906 | ||||
* | Add fma feature flag for Intel FMA instructions. | Craig Topper | 2012-06-03 | 1 | -2/+21 |
| | | | | llvm-svn: 157904 | ||||
* | Add builtin for pclmulqdq instruction. | Craig Topper | 2012-05-31 | 1 | -4/+22 |
| | | | | llvm-svn: 157733 | ||||
* | SSE4A should not imply LZCNT and POPCNT. FMA4 should imply SSE4A. Add ↵ | Craig Topper | 2012-05-30 | 1 | -3/+5 |
| | | | | | | missing break at the end of btver1 feature list. llvm-svn: 157680 | ||||
* | Define __SSE4A__ when targeting new AMD CPUs. | Benjamin Kramer | 2012-05-29 | 1 | -1/+11 |
| | | | | | | This doesn't really fit the existing SSELevel so it gets an extra flag. llvm-svn: 157630 | ||||
* | Sparc is bigendian. | Roman Divacky | 2012-05-29 | 1 | -1/+0 |
| | | | | llvm-svn: 157626 | ||||
* | Replace PTX back-end with NVPTX back-end in all places where Clang cares | Justin Holewinski | 2012-05-24 | 1 | -140/+30 |
| | | | | | | NV_CONTRIB llvm-svn: 157403 | ||||
* | Teach Clang about the NVPTX backend. | Peter Collingbourne | 2012-05-20 | 1 | -0/+98 |
| | | | | llvm-svn: 157173 | ||||
* | CUDA: add CodeGen support for global variable address spaces. | Peter Collingbourne | 2012-05-20 | 1 | -2/+8 |
| | | | | | | | | | Because in CUDA types do not have associated address spaces, globals are declared in their "native" address space, and accessed by bitcasting the pointer to address space 0. This relies on address space 0 being a unified address space. llvm-svn: 157167 | ||||
* | Hexagon V5 FP support. | Sirish Pande | 2012-05-10 | 1 | -2/+11 |
| | | | | llvm-svn: 156567 | ||||
* | Enable AVX on AMD Bulldozer processors. | Craig Topper | 2012-05-01 | 1 | -1/+1 |
| | | | | llvm-svn: 155900 | ||||
* | Define __ANDROID__ macro on -androideabi targets. | Evgeniy Stepanov | 2012-04-26 | 1 | -0/+2 |
| | | | | llvm-svn: 155632 | ||||
* | Enable AVX/AVX2 for Sandy Bridge, Ivy Bridge, and Haswell CPUs. | Craig Topper | 2012-04-26 | 1 | -4/+2 |
| | | | | llvm-svn: 155624 | ||||
* | OpenBSD: Remove incorrect -pthread preprocessor define _POSIX_THREADS and ↵ | Chris Lattner | 2012-04-25 | 1 | -1/+1 |
| | | | | | | | | | | replace with _REENTRANT. Also remove undef _POSIX_THREADS in phread.h. Patch by Brad Smith! llvm-svn: 155535 | ||||
* | Revert r155363, due to the underlying patches in LLVM causing regression | Chandler Carruth | 2012-04-23 | 1 | -11/+2 |
| | | | | | | test suite failures. llvm-svn: 155371 | ||||
* | Hexagon V5 (floating point) support in cfe. | Sirish Pande | 2012-04-23 | 1 | -2/+11 |
| | | | | llvm-svn: 155363 | ||||
* | Revert some Hexagon builtin commits to match reverts done to LLVM in | Chandler Carruth | 2012-04-18 | 1 | -11/+2 |
| | | | | | | | | | | | | | | | | | | | r155047. See the LLVM log for the primary motivation: http://llvm.org/viewvc/llvm-project?rev=155047&view=rev Primary commit r154828: - Several issues were raised in review, and fixed in subsequent commits. - Follow-up commits also reverted, and which should be folded into the original before reposting: - r154837: Re-add the 'undef BUILTIN' thing to fix the build. - r154928: Fix build warnings, re-add (and correct) header and license - r154937: Typo fix. Please resubmit this patch with the relevant LLVM resubmission. llvm-svn: 155048 | ||||
* | MIPS: Followup to r154606. Expand list of accepted MIPS target features in ↵ | Simon Atanasyan | 2012-04-18 | 1 | -1/+4 |
| | | | | | | the MipsTargetInfoBase::setFeatureEnabled() routine. llvm-svn: 154998 | ||||
* | Hexagon V5(Floating Point) support. | Sirish Pande | 2012-04-16 | 1 | -2/+11 |
| | | | | llvm-svn: 154828 | ||||
* | MIPS: Initialize MIPS CPU's name by default value. | Simon Atanasyan | 2012-04-12 | 1 | -3/+6 |
| | | | | | | | Otherwise MipsTargetInfoBase::getDefaultFeatures() might return an invalid features set with an empty feature name. llvm-svn: 154606 | ||||
* | Move some MIPS target macro definitions from class Mips32TargetInfoBase | Simon Atanasyan | 2012-04-05 | 1 | -4/+4 |
| | | | | | | | to the base class MipsTargetInfoBase. These macros are applicable for both 32/64-bits targets. llvm-svn: 154116 | ||||
* | [driver] Create a new -mfpmath= option, which is used to control whether clang | Chad Rosier | 2012-04-04 | 1 | -1/+2 |
| | | | | | | | | | | | uses Neon instructions for single-precision FP. -mfpmath=neon is analogous to passing llc -mattr=+neonfp. -mfpmath=[vfp|vfp2|vfp3|vfp4] is analogous to passing llc -mattr=-neonfp. rdar://11108618 llvm-svn: 154046 | ||||
* | Add more constraint registers for mips. | Eric Christopher | 2012-04-03 | 1 | -0/+3 |
| | | | | | | Patch by Jack Carter. Testcase cleanup by me. llvm-svn: 153921 | ||||
* | ARM backend knows about cortex-m4. The front end should too. | Jim Grosbach | 2012-03-29 | 1 | -0/+1 |
| | | | | llvm-svn: 153678 | ||||
* | Define __LITTLE_ENDIAN__ for le32, since "le" stands for little endian. | Jan Wen Voung | 2012-03-29 | 1 | -0/+1 |
| | | | | | | Add a test for this too. llvm-svn: 153616 | ||||
* | Fix the type of wchar_t on Solaris. | David Chisnall | 2012-03-28 | 1 | -1/+1 |
| | | | | | | Patch by Dmitri Shubin! llvm-svn: 153585 | ||||
* | Add better support for $fp and $sp for mips inline asm support. | Eric Christopher | 2012-03-27 | 1 | -5/+9 |
| | | | | | | Patch by Jack Carter. llvm-svn: 153530 | ||||
* | Add support for MIPS' floating ABIs (hard, soft and single) to clang driver. | Akira Hatanaka | 2012-03-23 | 1 | -2/+56 |
| | | | | | | Patch by Simon Atanasyan. llvm-svn: 153348 | ||||
* | No longer defining LP64 in 64-bit builds on platforms which are not LP64. | Aaron Ballman | 2012-03-14 | 1 | -2/+4 |
| | | | | llvm-svn: 152740 | ||||
* | Fix the long double to be of width/align 64. Rename va_list_test to | Roman Divacky | 2012-03-13 | 1 | -2/+6 |
| | | | | | | powerpc_types and add testing for the (long) double there. llvm-svn: 152647 | ||||
* | Long double is just double on FreeBSD/{PPC,PPC64}. | Roman Divacky | 2012-03-13 | 1 | -0/+6 |
| | | | | llvm-svn: 152632 | ||||
* | Use ZeroLengthBitfieldAlignment for AAPCS, as well as APCS-GNU. | James Molloy | 2012-03-12 | 1 | -6/+6 |
| | | | | llvm-svn: 152552 | ||||
* | TargetInfo: create less temporary strings. | Benjamin Kramer | 2012-03-05 | 1 | -16/+17 |
| | | | | llvm-svn: 152029 | ||||
* | Fix an ABI problem with ptrdiff_t and intptr_t on PPC32 | Hal Finkel | 2012-03-02 | 1 | -0/+2 |
| | | | | | | | | | | ptrdiff_t on PPC32 on Linux, etc. should be int not long. This does not matter for C, but it does matter for C++ because of name mangling. The preprocessor test has been changed accordingly. llvm-svn: 151935 | ||||
* | Add the Solaris support directory to the header search when using libc++. | David Chisnall | 2012-03-02 | 1 | -1/+1 |
| | | | | | | | | Unconditionally define __C99FEATURES__ when using C++ on Solaris. This is a (hopefully temporary) work around for libc++ exposing C99-but-not-C++98 features in C++98 mode. llvm-svn: 151889 |