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* Add PRFCHW intrinsic supportMichael Liao2013-03-261-2/+17
| | | | | | | | | - Add head 'prfchwintrin.h' to define '_m_prefetchw' which is mapped to LLVM/clang prefetch builtin - Add option '-mprfchw' to enable PRFCHW feature and pre-define '__PRFCHW__' macro llvm-svn: 178041
* Remove driver support for Hexagon V2 and V3Matthew Curtis2013-03-121-2/+0
| | | | | | | | | Driver will now error when trying to compile for V2 or V3. Removal of V2 and V3 support will allow us to simplify the hexagon back-end. llvm-svn: 176859
* Add 'e' to the SPIR data layout - SPIR is little endian for now.Guy Benyei2013-03-071-4/+12
| | | | | | Add 32/64 bit specific target defines for SPIR. llvm-svn: 176629
* Mips specific inline assembler constraint 'R'Jack Carter2013-03-051-1/+1
| | | | | | | | | | | | 'R' An address that can be sued in a non-macro load or store. Including missing positive test case and fixed typo for r176453. Thanks to Richard Smith for catching this! Jack llvm-svn: 176506
* Tidy up lists of Cortex-A series processors, adding entries for A7.Bob Wilson2013-03-041-2/+3
| | | | | | Also fix a missing entry for cortex-r5 in one copy of getLLVMArchSuffixForARM. llvm-svn: 176457
* Mips specific inline assembler constraint 'R'Jack Carter2013-03-041-0/+3
| | | | | | | 'R' An address that can be sued in a non-macro load or store. This patch includes a positive test case. llvm-svn: 176453
* R600: Use the GPU type to determine the correct DataLayout v2Tom Stellard2013-03-041-8/+101
| | | | | | | | | v2: - Add R600_DOUBLE_OPS for RV670 - s/CPU/GPU/ Reviewed-by: Alex Deucher <alexander.deucher@amd.com> llvm-svn: 176440
* [Mips] Add two new aliases for MIPS ABI names 32 (means o32 abi) and 64Simon Atanasyan2013-02-271-9/+19
| | | | | | | (means n64 abi) to improve compatibility with GNU tools. Patch by Jia Liu <proljc@gmail.com>. llvm-svn: 176187
* Implement __builtin_eh_return_data_regno() for ARM and MIPS.Logan Chien2013-02-231-0/+12
| | | | llvm-svn: 175954
* Revert r175912, "Add support for coldcc to clang" at John's request.Peter Collingbourne2013-02-231-2/+5
| | | | llvm-svn: 175936
* Add support for coldcc to clangPeter Collingbourne2013-02-221-5/+2
| | | | llvm-svn: 175912
* Revert "intmax_t is long long on Darwin, not long."Jordan Rose2013-02-201-2/+0
| | | | | | | | | 'long' and 'long long' are different for the purposes of mangling. This caused <rdar://problem/13254874>. This reverts commit c2f994d31ec85e9af811af38eb1b28709aef0b2c. llvm-svn: 175681
* intmax_t is long long on Darwin, not long.Jordan Rose2013-02-201-0/+2
| | | | | | <rdar://problem/11540697> llvm-svn: 175588
* AArch64: add atomic support parameters to TargetInfoTim Northover2013-02-181-0/+4
| | | | | | | | This allows Clang to detect and deal wih __atomic_* operations properly on AArch64. Previously we produced an error when encountering them at high optimisation levels. llvm-svn: 175438
* Add some missing PPC cpusBill Schmidt2013-02-011-9/+85
| | | | llvm-svn: 174215
* Add -mqpx and -mno-qpx feature flags to toggle use of the PPC QPX vector ↵Hal Finkel2013-02-011-1/+3
| | | | | | | | instruction set I've renamed the altivec test to ppc-features (because now there is more than one feature to test). llvm-svn: 174204
* Add PPC A2Q core and BG/Q preprocessor definitionsHal Finkel2013-02-011-2/+20
| | | | | | The a2q core is the variant of the a2 core used on the BG/Q supercomputers. llvm-svn: 174151
* Enable -fno-altivec, -mno-altivec for PowerPC.Bill Schmidt2013-02-011-0/+31
| | | | | | | | | | | Introduces these negation forms explicitly and uses them to control a new "altivec" target feature for PowerPC. This allows avoiding generating Altivec instructions on processors that support Altivec. The new test case verifies that the Altivec "lvx" instruction is not used when -fno-altivec is present on the command line. llvm-svn: 174140
* Add support for AArch64 target.Tim Northover2013-01-311-0/+188
| | | | | | | | | | | | | In cooperation with the LLVM patch, this should implement all scalar front-end parts of the C and C++ ABIs for AArch64. This patch excludes the NEON support also reviewed due to an outbreak of batshit insanity in our legal department. That will be committed soon bringing the changes to precisely what has been approved. Further reviews would be gratefully received. llvm-svn: 174055
* First pass at abstracting out a class for the target C++ ABI.John McCall2013-01-251-1/+4
| | | | llvm-svn: 173514
* PowerPC: fix __builtin_eh_return_data_regno returnAdhemerval Zanella2013-01-221-0/+5
| | | | llvm-svn: 173188
* [mips] Enable inlining of atomic ops on mips32 and mips64.Akira Hatanaka2013-01-181-0/+2
| | | | llvm-svn: 172855
* [ubsan] Add support for -fsanitize-blacklistWill Dietz2013-01-181-1/+1
| | | | llvm-svn: 172808
* Remove useless 'llvm::' qualifier from names like StringRef and others that areDmitri Gribenko2013-01-121-2/+2
| | | | | | brought into 'clang' namespace by clang/Basic/LLVM.h llvm-svn: 172323
* Enable intel_ocl_bicc for x86_64 target only. Remove fix from 171969 that ↵Guy Benyei2013-01-101-1/+3
| | | | | | enabled this extension for multiple targets. llvm-svn: 172052
* [mips] Fix data layout string. Add 64 to the list of native integer widthsAkira Hatanaka2013-01-051-6/+6
| | | | | | and add stack alignment information. llvm-svn: 171588
* Correct Hexagon DataLayout string. Fixes bug 14744.Anshuman Dasgupta2013-01-021-1/+1
| | | | | | Patch by Krzysztof Parzyszek! llvm-svn: 171415
* Rewrite #includes for llvm/Foo.h to llvm/IR/Foo.h as appropriate toChandler Carruth2013-01-021-1/+1
| | | | | | | | reflect the migration in r171366. Re-sort the #include lines to reflect the new paths. llvm-svn: 171369
* s/CPlusPlus0x/CPlusPlus11/gRichard Smith2013-01-021-1/+1
| | | | llvm-svn: 171367
* Add intel_ocl_bicc calling convention as a function attribute to clang. The ↵Guy Benyei2012-12-251-1/+2
| | | | | | calling convention is already implemented in LLVM. llvm-svn: 171056
* Add ARM cortex-r5 subtarget as available mcpuQuentin Colombet2012-12-211-0/+2
| | | | llvm-svn: 170909
* Targets.cpp: [cygwin] Add the predefined macro "_X86_", according to newer ↵NAKAMURA Takumi2012-12-141-0/+1
| | | | | | version of cygwin/w32api. llvm-svn: 170188
* Remove little endian specification from SPIR data layout - SPIR doesn't ↵Guy Benyei2012-12-131-2/+2
| | | | | | define endiannes in the data layout. llvm-svn: 170125
* Initial support for FreeBSD on ARM.Rafael Espindola2012-12-131-1/+3
| | | | | | Patch by Andrew Turner. llvm-svn: 170096
* Add SPIR32/SPIR64 targets to ClangGuy Benyei2012-12-111-0/+98
| | | | llvm-svn: 169917
* Virtual method overrides can no longer have mismatched calling conventions. ↵Aaron Ballman2012-12-091-4/+4
| | | | | | This fixes PR14339. llvm-svn: 169705
* long double should be 64 bits on FreeBSD/MIPS64. It possibly should be onDavid Chisnall2012-12-081-0/+4
| | | | | | | | Linux too, as I think we inherited it from there. The ABI spec says 128-bit, although I think SGI's compiler on IRIX may be the only thing ever to support this. llvm-svn: 169674
* Adapt to LLVM commit 169291 which streamlines the usage of NaCl/NativeClientEli Bendersky2012-12-041-4/+4
| | | | | | in the triple. llvm-svn: 169292
* Don't emit a warning with an input/output parameter. We assume the user ↵Bill Wendling2012-11-301-1/+3
| | | | | | knows what they're doing here. llvm-svn: 169059
* Don't warn if the input size is less than the register size. Also don't warn ifBill Wendling2012-11-301-1/+3
| | | | | | | the output size is greater than the register size. No truncation occurs with those. Reword warning to make it clearer what's the problem is. llvm-svn: 169054
* Add ARM cortex-a5 subtargetQuentin Colombet2012-11-291-1/+1
| | | | llvm-svn: 168958
* Revert commit revision r168953, to change the commit message, which was emptyQuentin Colombet2012-11-291-1/+1
| | | | llvm-svn: 168956
* (no commit message)Quentin Colombet2012-11-291-1/+1
| | | | llvm-svn: 168953
* Fix the definition of the vfork() builtin on Haiku. PR14378.Eli Friedman2012-11-271-0/+1
| | | | llvm-svn: 168674
* Add missing "break". Thanks to Craig for spotting it.Eli Friedman2012-11-261-0/+1
| | | | | | I'm looking at ways to fix the relevant test so it can catch this sort of mistake. llvm-svn: 168618
* Enable inlining of 4 byte atomic ops on ppc32, 8 byte atomic ops on ppc64.Benjamin Kramer2012-11-171-1/+6
| | | | | | Also fixes a bit/byte mismatch when checking if a target supports atomic ops of a certain size. llvm-svn: 168260
* Add missing features for misc x86 CPUs to CPU feature translation. Patch by ↵Eli Friedman2012-11-171-1/+14
| | | | | | Jung-uk Kim. llvm-svn: 168239
* Clean up X86 target feature translation code slightly. No intended ↵Eli Friedman2012-11-171-14/+3
| | | | | | functional change. Patch by Jung-uk Kim. llvm-svn: 168237
* Since CreateTargetInfo is taking ownership of the target options, passDouglas Gregor2012-11-161-15/+15
| | | | | | it as a pointer. llvm-svn: 168136
* Remove the cellspu port.Eric Christopher2012-11-141-9/+5
| | | | | | Approved by Chris Lattner. llvm-svn: 167983
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