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* Add avx512cd, avx512er, avx512pf feature flags and enable them on KNL CPU.Craig Topper2013-08-211-6/+40
| | | | llvm-svn: 188867
* Replace avx-512 with avx512f to match llvm side and what gcc patches appear ↵Craig Topper2013-08-211-10/+10
| | | | | | to be using. llvm-svn: 188860
* Centralize the logic for handling -m* options and fix pr16943.Rafael Espindola2013-08-201-24/+20
| | | | | | | | | This moves the logic for handling -mfoo -mno-foo from the driver to -cc1. It also changes -cc1 to apply the options in order, fixing pr16943. The handling of -mno-mmx -msse is now an explicit special case. llvm-svn: 188817
* Remove duplicated error checking.Rafael Espindola2013-08-201-111/+11
| | | | | | | The driver validates its options, so we don't need to redo the work in "clang -cc1". llvm-svn: 188806
* Remove dead code.Rafael Espindola2013-08-201-17/+0
| | | | llvm-svn: 188802
* Refactor the x86 feature handling.Rafael Espindola2013-08-201-185/+193
| | | | | | | This removes the very long chains of Feature["avx"] = Feature["sse42"] = ... = true; llvm-svn: 188799
* Change 'avx512' to 'avx-512' to match llvm backend.Craig Topper2013-08-201-16/+16
| | | | llvm-svn: 188762
* Add AVX-512 feature flag and knl cpu to clang.Craig Topper2013-08-201-14/+49
| | | | llvm-svn: 188758
* Revert r188756 because some other changes snuck in with it.Craig Topper2013-08-201-49/+14
| | | | llvm-svn: 188757
* Add AVX-512 feature flag and knl cpu to clang.Craig Topper2013-08-201-14/+49
| | | | llvm-svn: 188756
* Bump the value of the __APPLE_CC__ predefined macro up to 6000.Bob Wilson2013-08-191-1/+1
| | | | | | | | | The previous value was set to match some ancient version of Apple's GCC. The value should be higher than anything used by Apple's GCC, but we don't intend for this value to be updated in the future. We have other macros to identify compiler versions. <rdar://problem/14749599> llvm-svn: 188700
* Add XCore targetRobert Lytton2013-08-131-0/+61
| | | | llvm-svn: 188258
* [Mips] MSA frontend option supportJack Carter2013-08-121-2/+10
| | | | | | | | | | | This patch adds -mmsa and -mno-msa to the options supported by clang to enable and disable support for MSA. When MSA is enabled, a predefined macro '__mips_msa' is defined to 1. Patch by Daniel Sanders llvm-svn: 188184
* AArch64: initial NEON supportTim Northover2013-08-011-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch by Ana Pazos - Completed implementation of instruction formats: AdvSIMD three same AdvSIMD modified immediate AdvSIMD scalar pairwise - Completed implementation of instruction classes (some of the instructions in these classes belong to yet unfinished instruction formats): Vector Arithmetic Vector Immediate Vector Pairwise Arithmetic - Initial implementation of instruction formats: AdvSIMD scalar two-reg misc AdvSIMD scalar three same - Intial implementation of instruction class: Scalar Arithmetic - Initial clang changes to support arm v8 intrinsics. Note: no clang changes for scalar intrinsics function name mangling yet. - Comprehensive test cases for added instructions To verify auto codegen, encoding, decoding, diagnosis, intrinsics. llvm-svn: 187568
* [PowerPC] Support powerpc64le as a syntax-checking target.Bill Schmidt2013-07-261-4/+25
| | | | | | | | | | | | | | | | | | | This patch provides basic support for powerpc64le as an LLVM target. However, use of this target will not actually generate little-endian code. Instead, use of the target will cause the correct little-endian built-in defines to be generated, so that code that tests for __LITTLE_ENDIAN__, for example, will be correctly parsed for syntax-only testing. Code generation will otherwise be the same as powerpc64 (big-endian), for now. The patch leaves open the possibility of creating a little-endian PowerPC64 back end, but there is no immediate intent to create such a thing. The new test case variant ensures that correct built-in defines for little-endian code are generated. llvm-svn: 187180
* Remove the mblaze backend from clang.Rafael Espindola2013-07-251-134/+0
| | | | | | Approval in here http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-July/064169.html llvm-svn: 187143
* [SystemZ] Add -march= command-line optionRichard Sandiford2013-07-191-0/+11
| | | | llvm-svn: 186694
* [PowerPC] FreeBSD does not require f128 in its data layout string.Bill Schmidt2013-07-031-1/+1
| | | | | | Long double is 64 bits on FreeBSD PPC, so the f128 entry is superfluous. llvm-svn: 185582
* Dont define __LONG_DOUBLE_128__ unless LongDoubleWidth is really 128bits width.Roman Divacky2013-07-031-1/+2
| | | | | | It's not the case on ie. FreeBSD. llvm-svn: 185572
* Fix MSP430 builtin types.Anton Korobeynikov2013-07-011-3/+3
| | | | | | Patch by Job Noorman! llvm-svn: 185362
* Driver: Push triple objects around instead of going to std::string all the time.Benjamin Kramer2013-06-291-306/+275
| | | | | | No functionality change. llvm-svn: 185261
* Add support for passing v8fp options via -mfpu.Joey Gouly2013-06-271-1/+1
| | | | llvm-svn: 185075
* Add support for passing '-target armv8' through the Driver.Joey Gouly2013-06-261-0/+1
| | | | llvm-svn: 184970
* Fix a couple of PPC predefined macros that I spotted while driving byChandler Carruth2013-06-251-2/+2
| | | | | | | | this code. These aren't technically standard predefines for the platform but apparantly lots of folks use them as they show up within LLVM's own codebase. ;] This may even fix some self host issues w/ the JIT!!! llvm-svn: 184830
* [NVPTX] Add NVPTX register constraintsJustin Holewinski2013-06-211-3/+12
| | | | llvm-svn: 184578
* size_t on Darwin AAPCS targets is "unsigned long". <rdar://problem/14136459>Bob Wilson2013-06-181-0/+3
| | | | | | | | Some embedded targets use ARM's AAPCS with iOS header files that define size_t as unsigned long, which conflicts with the usual AAPCS definition of size_t as unsigned int. llvm-svn: 184171
* Use atomic instructions on Bitrig armv6. Patch by Patrick Wildt.Rafael Espindola2013-06-171-1/+3
| | | | llvm-svn: 184113
* Emit native implementations of atomic operations on FreeBSD/armv6.Ed Schouten2013-06-151-2/+2
| | | | | | | | | | | | Just like on Linux, FreeBSD/armv6 assumes the system supports ldrex/strex unconditionally. It is also used by the kernel. We can therefore enable support for it, like we do on Linux. While there, change one of the unit tests to explicitly test against armv5 instead of armv7, as it actually tests whether libcalls are emitted. llvm-svn: 184040
* Do not report -Wasm-operand-widths for ARM output operands. <rdar://14050337>Bob Wilson2013-06-031-2/+1
| | | | | | | | | We're getting reports of this warning getting triggered in cases where it is not adding any value. There is no asm operand modifier that you can use to silence it, and there's really nothing wrong with having an LDRB, for example, with a "char" output. llvm-svn: 183172
* OpenBSD/sparc64 uses long long for int64_t and intmax_t.Jakob Stoklund Olesen2013-05-191-3/+10
| | | | | | Other operating systems, including FreeBSD and NetBSD, use long. llvm-svn: 182215
* fix PR 15726: ptrdiff_t should be int on PowerPC DarwinDavid Fang2013-05-161-0/+1
| | | | llvm-svn: 182029
* Use correct types for SPARC v9.Jakob Stoklund Olesen2013-05-151-0/+5
| | | | | | It's an LP64 platform. llvm-svn: 181867
* Use atomic instructions on linux thumb v7.Rafael Espindola2013-05-141-3/+17
| | | | | | | This matches gcc's behaviour. The patch also explicitly parses the version so that this keeps working when we add support for v8. llvm-svn: 181750
* Use atomic instructions on ARM linux.Rafael Espindola2013-05-131-1/+16
| | | | | | | | | This is safe given how the pre-v6 atomic ops funcions in libgcc are implemented. This fixes pr15429. llvm-svn: 181728
* Add SystemZ supportUlrich Weigand2013-05-061-0/+102
| | | | | | | | | | | | | | This patch then adds all the usual platform-specific pieces for SystemZ: driver support, basic target info, register names and constraints, ABI info and vararg support. It also adds new tests to verify pre-defined macros and inline asm, and updates a test for the minimum alignment change. This version of the patch incorporates feedback from reviews by Eric Christopher and John McCall. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181211
* AArch64: teach Clang about __clear_cache intrinsicTim Northover2013-05-041-2/+12
| | | | | | | libgcc provides a __clear_cache intrinsic on AArch64, much like it does on 32-bit ARM. llvm-svn: 181111
* Add support for -march=btver2.Benjamin Kramer2013-05-031-0/+15
| | | | llvm-svn: 181006
* Add some more required SPARC v9 predefined macros.Jakob Stoklund Olesen2013-04-241-0/+9
| | | | | | Solaris/AuroraUX only need __arch64__, the BSDs need the other variants. llvm-svn: 180172
* Add support for sparcv9 targets.Jakob Stoklund Olesen2013-04-161-13/+61
| | | | | | | | | | | | The SPARC v8 and SPARC v8 architectures are very similar, so use a base class to share most information between them. Include operating systems with known SPARC v9 ports. Also fix two issues with the SPARC v8 data layout string: SPARC v8 is a big endian target with a 64-bit aligned stack. llvm-svn: 179596
* [Mips] Support -mmicromips / -mno-micromips command line options.Simon Atanasyan2013-04-141-1/+10
| | | | llvm-svn: 179489
* [Mips] Follow-up to r179481. Consider "single-float" as a separateSimon Atanasyan2013-04-141-6/+8
| | | | | | independent of float ABI feature in the MipsTargetInfoBase class. llvm-svn: 179486
* The PNaCl target no longer permits __attribute__((regparm)).Eli Bendersky2013-04-081-2/+2
| | | | | | | Remove the custom lowering code dealing with it, disallow it in PNaclTargetInfo and adjust tests accordingly. llvm-svn: 179059
* AArch64: bring predefines in line with most recent ACLE documentTim Northover2013-04-051-16/+16
| | | | | | | | | | | The prefixes and names used are now identical to 32-bit ARM, which is also expected to remain unchanged. If we made this change after a release, we'd probably have to support both variants for a while, but I think since AArch64 exists only on trunk now, it's acceptable to simply swap them now. llvm-svn: 178870
* Add support for __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1,2,4,8} on x86.Michael J. Spencer2013-04-041-0/+8
| | | | | | This fixes std::thread with libstdc++. llvm-svn: 178816
* R600: Add missing Southern Islands GPU to setCPU() functionTom Stellard2013-04-011-1/+1
| | | | llvm-svn: 178498
* Remove old NVPTX cpus and add new NVPTX cpusJustin Holewinski2013-03-301-1/+8
| | | | llvm-svn: 178419
* Add support for gcc-compatible -mfprnd -mno-fprnd PPC optionsHal Finkel2013-03-301-2/+2
| | | | | | | gcc provides -mfprnd and -mno-fprnd for controlling the fprnd target feature; support these options as well. llvm-svn: 178414
* Add RDSEED intrinsic support defined in AVX2 extensionMichael Liao2013-03-291-1/+16
| | | | llvm-svn: 178331
* Add support for gcc-compatible -mpopcntd -mno-popcntd PPC optionsHal Finkel2013-03-281-1/+2
| | | | | | | gcc provides -mpopcntd and -mno-popcntd for controlling the popcntd target feature; support these options as well. llvm-svn: 178235
* Add support for gcc-compatible -mmfcrf -mno-mfcrf PPC optionsHal Finkel2013-03-281-1/+1
| | | | | | | | gcc provides -mmfcrf and -mno-mfcrf for controlling what we call the mfocrf target feature. Also, PPC is now making use of the static function AddTargetFeature used by the Mips Driver code. llvm-svn: 178227
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