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* [AArch64] Add some CPU targets for "generic", A-53 and A-57.Amara Emerson2013-10-311-0/+7
| | | | | | | | | | Enables the clang driver to begin targeting specific CPUs. Introduced a "generic" CPU which will ensure that the optional FP feature is enabled by default when it gets to LLVM, without needing any extra arguments. Cortex-A53 and A-57 are also introduced with tests, although backend handling of them does not yet exist. llvm-svn: 193740
* [mips] Delete unused functions.Akira Hatanaka2013-10-301-10/+0
| | | | llvm-svn: 193674
* [mips] Align the stack to 16-bytes for -mfp64.Akira Hatanaka2013-10-291-6/+27
| | | | llvm-svn: 193640
* [mips] Move setDescriptionString to base class MipsTargetInfoBase and call itAkira Hatanaka2013-10-291-21/+29
| | | | | | | | at the end of handleTargetFeatures. No intended functionality change. llvm-svn: 193636
* R600: Add Sea Islands GPUsTom Stellard2013-10-291-1/+6
| | | | llvm-svn: 193622
* ARM: Add -m[no-]crc to dis/enable CRC subtargetfeature from clangBernard Ogden2013-10-291-1/+7
| | | | | | | | Allow users to disable or enable CRC subtarget feature. Differential Revision: http://llvm-reviews.chandlerc.com/D2037 llvm-svn: 193600
* Add driver support for FP, SIMD and crypto defaults.Bernard Ogden2013-10-241-6/+13
| | | | | | | | | Although we wire up a bit for v8fp for macro setting purposes, we don't set a macro yet. Need to ask list about that. Change-Id: Ic9819593ce00882fbec72757ffccc6f0b18160a0 llvm-svn: 193367
* Clean up char/numeric comparisons in ARM getTargetDefinesBernard Ogden2013-10-241-6/+9
| | | | | Change-Id: Ie07228411b68252adcd5cf80b27ccd2eb3b031d9 llvm-svn: 193366
* Teach clang driver about Cortex-A53 and Cortex-A57.Bernard Ogden2013-10-241-1/+2
| | | | | | | | | | | Adds some Cortex-A53 strings where they were missing before. Cortex-A57 is entirely new to clang. Doesn't touch code only used by Darwin, in consequence of which one of the A53 lines has been removed. Change-Id: I5edb58f6eae93947334787e26a8772c736de6483 llvm-svn: 193364
* ARM-Darwin: Use the *-*-darwin-eabi triple for v6m & v7m archsTim Northover2013-10-241-1/+3
| | | | | | | These arch arguments are used for embedded targets (obviously) which need a different calling convention to iOS. llvm-svn: 193328
* Set the default hardware division features for ARM cpus. Also set it as ↵Silviu Baranga2013-10-211-2/+17
| | | | | | default for A32 armv8. llvm-svn: 193075
* Add the __ARM_ARCH_EXT_IDIV__ predefine. It is set to 1 if we have hardware ↵Silviu Baranga2013-10-211-0/+16
| | | | | | divide in the mode that we are compiling in (depending on the target features), not defined if we don't. Should be compatible with the GCC conterpart. Also adding a -hwdiv option to overide the default behavior. llvm-svn: 193074
* [Mips] Define __mips_fpr and _MIPS_FPSET macros.Simon Atanasyan2013-10-181-1/+11
| | | | llvm-svn: 192969
* Rename HandleTargetFeatures->handleTargetFeatures to matchEric Christopher2013-10-161-11/+11
| | | | | | everything else in the class. llvm-svn: 192851
* Add preprocessor support for powerpc vsx.Eric Christopher2013-10-161-2/+34
| | | | | | The test should be expanded upon for more powerpc checking. llvm-svn: 192849
* Fix comments.Eric Christopher2013-10-161-2/+2
| | | | llvm-svn: 192847
* Enabling 3DNow! prefetch instruction support for a few AMD processors in theYunzhong Gao2013-10-161-0/+11
| | | | | | | | | | clang front end. This change will allow the __PRFCHW__ macro to be set on these processors and hence include prfchwintrin.h in x86intrin.h header. Support for the intrinsic itself seems to have already been added in r178041. Differential Revision: http://llvm-reviews.chandlerc.com/D1934 llvm-svn: 192829
* Add support for -mcx16, and predefine __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 whenNick Lewycky2013-10-051-2/+25
| | | | | | it is enabled. Also enable it on the same architectures that GCC does. llvm-svn: 192045
* Fix PR 12730: Add _GCC_HAVE_SYNC_COMPARE_AND_SWAP macros for ARMWeiming Zhao2013-09-301-0/+7
| | | | llvm-svn: 191707
* Add character set related __STDC_* definitions.Ed Schouten2013-09-291-0/+5
| | | | | | | | | | | | | Clang uses UTF-16 and UTF-32 for its char16_t's and char32_t's exclusively. This means that we can define __STDC_UTF_16__ and __STDC_UTF_32__ unconditionally. While there, define __STDC_MB_MIGHT_NEQ_WC__ for FreeBSD. FreeBSD's wchar_t's don't encode characters as ISO-10646; the encoding depends on the locale used. Because the character set used might not be a superset of ASCII, we must define __STDC_MB_MIGHT_NEQ_WC__. llvm-svn: 191631
* Adding -mtbm and -mno-tbm command line options to the clang front end for theYunzhong Gao2013-09-241-2/+13
| | | | | | | | | x86 TBM instruction set. Also adding a __TBM__ macro if the TBM feature is enabled. Otherwise there should be no functionality change to existing features. Phabricator code review is located here: http://llvm-reviews.chandlerc.com/D1693 llvm-svn: 191326
* [Mips] Support -mnan=2008 option. Define "__mips_nan2008" macros and passSimon Atanasyan2013-09-241-3/+13
| | | | | | this option to the assembler. llvm-svn: 191282
* [Mips] Allocate NaClTargetInfo for MIPSEL NaClPetar Jovanovic2013-09-211-0/+2
| | | | | | | | A patch to AllocateTarget function to recognize llvm::Triple::NaCl for MIPSEL and return NaClTargetInfo. Additional test has been added to check if the expected macros get defined. llvm-svn: 191124
* Add C intrinsics for Intel SHA ExtensionsBen Langmuir2013-09-191-2/+16
| | | | | | | | | Intrinsics added shaintrin.h, which is included from x86intrin.h if __SHA__ is enabled. SHA implies SSE2, which is needed for the __m128i type. Also add the -msha/-mno-sha option. llvm-svn: 190999
* Use curly braces all the way through long if/else chain for consistency and ↵Craig Topper2013-09-191-14/+14
| | | | | | readability. llvm-svn: 190982
* Disabling sse2 should disable aes and pclmul support.Craig Topper2013-09-191-1/+1
| | | | llvm-svn: 190977
* [ARMv8] Add builtins for CRC instructions.Joey Gouly2013-09-181-0/+3
| | | | | | Patch by Bradley Smith! llvm-svn: 190931
* Push contents of X86TargetInfo::setFeatureEnabled down to a static function ↵Craig Topper2013-09-171-85/+89
| | | | | | called by the virtual version and all the places in getDefaultFeatures. This way getDefaultFeatures doesn't make so many virtual calls. llvm-svn: 190847
* Mark setSSELevel/setMMXLevel/setXOPLevel as static since they don't access ↵Craig Topper2013-09-171-9/+9
| | | | | | anything in the class. llvm-svn: 190846
* Add error checking to reject neon_vector_type attribute on targets without NEON.Amara Emerson2013-09-161-3/+1
| | | | | | Patch by Artyom Skrobov. llvm-svn: 190801
* Make F16C feature imply AVX. Matches GCC behavior.Craig Topper2013-09-161-1/+4
| | | | llvm-svn: 190776
* Clean up some Triple usage in clang.Cameron Esfahani2013-09-141-2/+2
| | | | llvm-svn: 190737
* Update Atom Silvermont (SLM) support by adding enabled features.Preston Gurd2013-09-131-5/+9
| | | | llvm-svn: 190718
* Add more Cortex CPUs and testsRenato Golin2013-09-131-4/+5
| | | | llvm-svn: 190703
* Fix Neon detection for Cortex-A class, plus adds some more CPUs to default ↵Renato Golin2013-09-131-5/+8
| | | | | | features llvm-svn: 190702
* Certain multi-platform languages, such as OpenCL, have the concept ofDavid Tweed2013-09-131-0/+4
| | | | | | | | | | | | | | address spaces which is both (1) a "semantic" concept and (2) possibly a hardware level restriction. It is desirable to be able to discard/merge the LLVM-level address spaces on arguments for which there is no difference to the current backend while keeping track of the semantic address spaces in a funciton prototype. To do this enable addition of the address space into the name-mangling process. Add some tests to document this behaviour against inadvertent changes. Patch by Michele Scandale! llvm-svn: 190684
* Fix a bug where -msse followed by -mno-sse would leave MMX enabled.Craig Topper2013-09-111-2/+4
| | | | llvm-svn: 190496
* Delete unused static class membersAlexey Samsonov2013-09-101-2/+0
| | | | llvm-svn: 190394
* Separate popcnt and sse4.2 feature control somewhat to match gcc behavior.Craig Topper2013-09-101-2/+11
| | | | | | | Enabling sse4.2 will implicitly enable popcnt unless popcnt is explicitly disabled. Disabling sse4.2 will not disable popcnt if popcnt is explicitly enabled. llvm-svn: 190387
* Fix the profile of the function (fix commit 190048)Sylvestre Ledru2013-09-051-2/+1
| | | | llvm-svn: 190051
* Fix bug #17104 - Target info for GNU/kFreeBSD were missing.Sylvestre Ledru2013-09-051-0/+28
| | | | | | | | | As a result, Clang doesn't define the pre-processor macros that are expected on this platform. Thanks to Robert Millan for the patch llvm-svn: 190048
* Add support for -march=slm, aka Intel Atom Silvermont.Benjamin Kramer2013-08-301-0/+7
| | | | llvm-svn: 189670
* Add ms_abi and sysv_abi attribute handling.Charles Davis2013-08-301-1/+8
| | | | | | Based on a patch by Benno Rice! llvm-svn: 189644
* Delete CC_Default and use the target default CC everywhereReid Kleckner2013-08-271-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Makes functions with implicit calling convention compatible with function types with a matching explicit calling convention. This fixes things like calls to qsort(), which has an explicit __cdecl attribute on the comparator in Windows headers. Clang will now infer the calling convention from the declarator. There are two cases when the CC must be adjusted during redeclaration: 1. When defining a non-inline static method. 2. When redeclaring a function with an implicit or mismatched convention. Fixes PR13457, and allows clang to compile CommandLine.cpp for the Microsoft C++ ABI. Excellent test cases provided by Alexander Zinenko! Reviewers: rsmith Differential Revision: http://llvm-reviews.chandlerc.com/D1231 llvm-svn: 189412
* R600: Add local address pointer size to DataLayoutTom Stellard2013-08-271-0/+1
| | | | llvm-svn: 189302
* Update now that llvm uses the same feature names as the driver.Rafael Espindola2013-08-231-18/+14
| | | | llvm-svn: 189142
* Move -mfpmath handling to -cc1 and implement it for x86.Rafael Espindola2013-08-211-9/+87
| | | | | | | | | | | | | | | | | | | | | | | The original idea was to implement it all on the driver, but to do that the driver needs to know the sse level and to do that it has to know the default features of a cpu. Benjamin Kramer pointed out that if one day we decide to implement support for ' __attribute__ ((__target__ ("arch=core2")))', then the frontend needs to keep its knowledge of default features of a cpu. To avoid duplicating which part of clang handles default cpu features, it is probably better to handle -mfpmath in the frontend. For ARM this patch is just a small improvement. Instead of a cpu list, we check if neon is enabled, which allows us to reject things like -mcpu=cortex-a9 -mfpu=vfp -mfpmath=neon For X86, since LLVM doesn't support an independent ssefp feature, we just make sure the selected -mfpmath matches the sse level. llvm-svn: 188939
* Remove dead code.Rafael Espindola2013-08-211-10/+0
| | | | | | | setFeatureEnabled is never called with "32" or "64". The driver never passes it and mips' getDefaultFeatures sets the Features map directly. llvm-svn: 188913
* Move the logic for selecting the last feature in the command line to the driver.Rafael Espindola2013-08-211-16/+0
| | | | | | | This is a partial revert of r188817 now that the driver handles -target-feature in a single place. llvm-svn: 188910
* Don't disable SSE4A when disabling AVX.Rafael Espindola2013-08-211-1/+1
| | | | | | Thanks for Craig Topper for noticing it. llvm-svn: 188902
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