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* [PowerPC] Support ELFv1/ELFv2 ABI selection via -mabi= optionUlrich Weigand2014-07-281-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While Clang now supports both ELFv1 and ELFv2 ABIs, their use is currently hard-coded via the target triple: powerpc64-linux is always ELFv1, while powerpc64le-linux is always ELFv2. These are of course the most common scenarios, but in principle it is possible to support the ELFv2 ABI on big-endian or the ELFv1 ABI on little-endian systems (and GCC does support that), and there are some special use cases for that (e.g. certain Linux kernel versions could only be built using ELFv1 on LE). This patch implements the Clang side of supporting this, based on the LLVM commit 214072. The command line options -mabi=elfv1 or -mabi=elfv2 select the desired ABI if present. (If not, Clang uses the same default rules as now.) Specifically, the patch implements the following changes based on the presence of the -mabi= option: In the driver: - Pass the appropiate -target-abi flag to the back-end - Select the correct dynamic loader version (/lib64/ld64.so.[12]) In the preprocessor: - Define _CALL_ELF to the appropriate value (1 or 2) In the compiler back-end: - Select the correct ABI in TargetInfo.cpp - Select the desired ABI for LLVM via feature (elfv1/elfv2) llvm-svn: 214074
* R600: Add processor type for MullinsTom Stellard2014-07-261-0/+1
| | | | llvm-svn: 213999
* Revert part of r206963James Molloy2014-07-251-0/+27
| | | | | | | | Specifically the part where we removed a warning to be compatible with GCC, which has been widely regarded as a bad idea. I'm not quite happy with how obtuse this warning is, especially in the fairly common case of a 32-bit integer literal, so I've got another patch awaiting review that adds a fixit to reduce confusion. llvm-svn: 213935
* AArch64: update Clang for merged arm64/aarch64 triples.Tim Northover2014-07-231-2/+0
| | | | | | | | | | | | | | The main subtlety here is that the Darwin tools still need to be given "-arch arm64" rather than "-arch aarch64". Fortunately this already goes via a custom function to handle weird edge-cases in other architectures, and it tested. I removed a few arm64_be tests because that really isn't an interesting thing to worry about. No-one using big-endian is also referring to the target as arm64 (at least as far as toolchains go). Mostly they date from when arm64 was a separate target and we *did* need a parallel name simply to test it at all. Now aarch64_be is sufficient. llvm-svn: 213744
* [X86 inline-asm] Error out on inline-asm constraint "=f".Akira Hatanaka2014-07-181-1/+7
| | | | | | <rdar://problem/17476689> llvm-svn: 213428
* [AArch64] Implement Clang CLI interface proposal about "-march".Kevin Qin2014-07-181-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Revert "Add default feature for CPUs on AArch64 target in Clang" at r210625. Then, all enabled feature will by passed explicitly by -target-feature in -cc1 option. 2. Get "-mfpu" deprecated. 3. Implement support of "-march". Usage is: -march=armv8-a+[no]feature For instance, "-march=armv8-a+neon+crc+nocrypto". Here "armv8-a" is necessary, and CPU names are not acceptable. Candidate features are fp, neon, crc and crypto. Where conflicting feature modifiers are specified, the right-most feature is used. 4. Implement support of "-mtune". Usage is: -march=CPU_NAME For instance, "-march=cortex-a57". This option will ONLY get micro-architectural feature enabled specifying to target CPU, like "+zcm" and "+zcz" for cyclone. Any architectural features WON'T be modified. 5. Change usage of "-mcpu" to "-mcpu=CPU_NAME+[no]feature", which is an alias to "-march={feature of CPU_NAME}+[no]feature" and "-mtune=CPU_NAME" together. Where this option is used in conjunction with -march or -mtune, those options take precedence over the appropriate part of this option. llvm-svn: 213353
* Driver: bifurcate extended and basic MSC versioningSaleem Abdulrasool2014-07-161-3/+4
| | | | | | | | | | | | | | | | | | | | | | | This restores the original behaviour of -fmsc-version. The older option remains as a mechanism for specifying the basic version information. A secondary option, -fms-compatibility-version permits the user to specify an extended version to the driver. The new version takes the value as a dot-separated value rather than the major * 100 + minor format that -fmsc-version format. This makes it easier to specify the value as well as a more flexible manner for specifying the value. Specifying both values is considered an error. The older parameter is left solely as a driver option, which is normalised into the newer parameter. This allows us to retain a single code path in the compiler itself whilst preserving the semantics of the old parameter as well as avoid having to determine which of two formats are being used by the invocation. The test changes are due to the fact that the compiler no longer supports the old option, and is a direct conversion to the new option. llvm-svn: 213119
* Drop separate UIntMaxType and just derive it from IntMaxType.Joerg Sonnenberger2014-07-141-17/+2
| | | | llvm-svn: 212987
* Introduce getCorrespondingUnsignedType() in TargetInfo to work like theJoerg Sonnenberger2014-07-141-2/+4
| | | | | | | | corresponding AST context function, only restricted to basic integer types. Use this to ensure getUIntPtrType() gives types consistent with getIntPtrType(). Fix NVPTX backend to give signed intptr_t. llvm-svn: 212982
* Fix typosAlp Toker2014-07-141-1/+1
| | | | | | Also consolidate 'backward compatibility' llvm-svn: 212974
* Remove use of uniform initialization ({}) introduced in r212725 since this ↵David Blaikie2014-07-101-1/+1
| | | | | | isn't supported in MSVC. llvm-svn: 212754
* [x32] Adding X32 target support to driver, including ↵Zinovy Nis2014-07-101-5/+11
| | | | | | | | | | TargetInfo,DescriptionString, flags, paths lookup, etc. Cover changes with new tests. The author of the patch is Pavel Chupin (@pavel.v.chupin). The changes enable "hello world" on x32 target (x86_64-*-linux-gnux32). s/isX32/IsX32/ also fixed. Differential Revision: http://reviews.llvm.org/D4180 llvm-svn: 212725
* [mips][mips64r6] Define _MIPS_FPSET, __mips_fpr, and __mips_nan2008 ↵Daniel Sanders2014-07-091-2/+12
| | | | | | | | | | | | correctly on MIPS32r6/MIPS64r6 Summary: This removes the need to pass -mnan=2008 explicitly to be able to compile the test-suite for MIPS32r6/MIPS64r6. Differential Revision: http://reviews.llvm.org/D4433 llvm-svn: 212619
* [mips] clz is defined to give 32 for zero. Similarly, dclz gives 64.Daniel Sanders2014-07-091-0/+2
| | | | | | | | | | | | | | | Summary: While debugging another issue, I noticed that Mips currently specifies that the count leading zero builtins are undefined when the input is zero. The architecture specifications say that the clz and dclz instructions write 32 or 64 respectively when given zero. This doesn't fix any bugs that I'm aware of but it may improve optimisation in some cases. Differential Revision: http://reviews.llvm.org/D4431 llvm-svn: 212618
* ARM: use LLVM's atomicrmw instructions when ldrex/strex are available.Tim Northover2014-07-091-17/+11
| | | | | | | | | | | | | | Having some kind of weird kernel-assisted ABI for these when the native instructions are available appears to be (and should be) the exception; OSs have been gradually opting in for years and the code was getting silly. So let LLVM decide whether it's possible/profitable to inline them by default. Patch by Phoebe Buckheister. llvm-svn: 212598
* Use non-intrusive refcounting for TargetOptionsAlp Toker2014-07-061-3/+4
| | | | llvm-svn: 212388
* [Driver][Mips] Support one more MIPS CPU name - octeon.Simon Atanasyan2014-07-041-1/+5
| | | | llvm-svn: 212339
* [Driver][Mips] Support more MIPS CPU names: mips1 - mips5.Simon Atanasyan2014-07-041-0/+5
| | | | llvm-svn: 212338
* [Driver][Mips] Check MIPS CPU name provided to the Clang driver.Simon Atanasyan2014-07-031-1/+10
| | | | llvm-svn: 212260
* CodeGen: make target builtins support languagesSaleem Abdulrasool2014-07-021-0/+1
| | | | | | | | | | This extends the target builtin support to allow language specific annotations (i.e. LANGBUILTIN). This is to allow MSVC compatibility whilst retaining the ability to have EABI targets use a __builtin_ prefix. This is merely to allow uniformity in the EABI case where the unprefixed name is provided as an alias in the header. llvm-svn: 212196
* X86: inline all atomic operations up to 128-bits.Tim Northover2014-07-021-3/+1
| | | | | | | | | | The backend *can* cope with all of these now, so Clang should give it the chance. On CPUs without cmpxchg16b (e.g. the original athlon64) LLVM can reform the libcalls. rdar://problem/13496295 llvm-svn: 212173
* Driver: Handle /GR- in a compatible way with MSVCDavid Majnemer2014-07-011-1/+1
| | | | | | | | | | | | | | | | | There are slight differences between /GR- and -fno-rtti which made mapping one to the other inappropriate. -fno-rtti disables dynamic_cast, typeid, and does not emit RTTI related information for the v-table. /GR- does not generate complete object locators and thus will not reference them in vftables. However, constructs like dynamic_cast and typeid are permitted. This should bring our implementation of RTTI up to semantic parity with MSVC modulo bugs. llvm-svn: 212138
* [Driver][Mips] MIPS ABI names "32" and "64" used as arguments of the "-mabi"Simon Atanasyan2014-07-011-6/+2
| | | | | | | | | command line option only. Internally we convert them to the "o32" and "n64" respectively. So we do not need to refer them anywhere after that conversion. No functional changes. llvm-svn: 212096
* Basic: correct the va_list type on Windows on ARMSaleem Abdulrasool2014-06-291-0/+3
| | | | | | | | | Windows on ARM defines va_list as a typedef for char *. Although the semantics of argument passing for variadic functions matches AAPCS VFP, the wrapped struct __va_list type is unused. This makes the intrinsic definition for va_list match that of Visual Studio. llvm-svn: 212004
* Basic: fix handling for Windows Itanium environmentSaleem Abdulrasool2014-06-281-0/+1
| | | | | | | This corrects the handling for i686-windows-itanium. This environment is nearly identical to Windows MSVC, except it uses the itanium ABI for C++. llvm-svn: 211991
* Basic: whitespace cleanupSaleem Abdulrasool2014-06-281-3/+0
| | | | | | Remove unnecessary separation of anonymous namespace. NFC. llvm-svn: 211990
* [Driver][Mips] Fix else-after-return.Simon Atanasyan2014-06-281-4/+6
| | | | | | No functional changes. llvm-svn: 211984
* [Driver][Mips] Remove redundant brackets.Simon Atanasyan2014-06-281-1/+1
| | | | | | No functional changes. llvm-svn: 211983
* [Driver][Mips] Remove redundant abstract/override function.Simon Atanasyan2014-06-281-1/+0
| | | | | | No functional changes. llvm-svn: 211982
* Introduce arm_acle.h supporting existing LLVM builtin intrinsicsYi Kong2014-06-271-0/+3
| | | | | | | | | | | | | | Summary: This patch introduces ACLE header file, implementing extensions that can be directly mapped to existing Clang intrinsics. It implements for both AArch32 and AArch64. Reviewers: t.p.northover, compnerd, rengolin Reviewed By: compnerd, rengolin Subscribers: rnk, echristo, compnerd, aemerson, mroth, cfe-commits Differential Revision: http://reviews.llvm.org/D4296 llvm-svn: 211962
* ARM: Correctly identify cortex-m4 as v7em.Jim Grosbach2014-06-261-1/+2
| | | | | | | | | | | Get the predefined macro for the architecture correct. cortex-m4: __ARM_ARCH_7EM__ cortex-m3: __ARM_ARCH_7M__ cortex-m0: __ARM_ARCH_6M__ rdar://17420090 llvm-svn: 211792
* Add ppc64/power8 as a targetWill Schmidt2014-06-261-4/+16
| | | | llvm-svn: 211778
* Add R600 builtin codegen.Matt Arsenault2014-06-241-3/+10
| | | | llvm-svn: 211631
* Driver: enhance MSC version compatibilitySaleem Abdulrasool2014-06-201-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | The version information for Visual Studio is spread over multiple variables. The newer Windows SDK has started making use of some of the extended versioning variables that were previously undefined. Enhance our compatibility definitions for these cases. _MSC_VER is defined to be the Major * 100 + Minor. _MSC_FULL_VER is defined to be Major * 10000000 + Minor * 100000 + Build. And _MSC_BUILD is the build revision of the compiler. Extend the -fmsc-version option in a compatible manner. If the value is the previous form of MMmm, then we assume that the build number is 0. Otherwise, a specific build number may be passed by using the form MMmmbbbbb. Due to bitwidth limitations of the option, it is currently not possible to define a revision value. The version information can be passed as either the decimal encoded value (_MSC_FULL_VER or _MSC_VER) or as a dot-delimited value. The change to the TextDiagnostic is to deal with the updated encoding of the version information. llvm-svn: 211420
* Preprocessor: improve ACLE 6.4.1, 6.4.2 supportSaleem Abdulrasool2014-06-151-7/+42
| | | | | | | | | | | | | | | | | | This improves conformance with ACLE 6.4.1. Define additional macros that indicate support for the ARM and Thumb instruction set architecture. This includes the following set of macros: __ARM_ARCH __ARM_ARCH_ISA_ARM __ARM_ARCH_ISA_THUMB __ARM_32BIT_STATE These help identify the environment that the code is intended to execute on. Adjust the handling for ACLE 6.4.2 to be more correct. We would define the profile as a free-standing token rather than a quoted single character. llvm-svn: 210991
* [AArch64] Add default features for CPUs on AArch64 target.Kevin Qin2014-06-111-0/+20
| | | | | | | | | | For ARM target, we can use CRYPTO and CRC features if we select cortex-a57 by '-mcpu', but for AArch64 target, it doesn't work unless adding with '-mfpu=crypto-neon-fp-armv8'. To keep consistency between front-end and back-end and get end-users more easier to use, we'd better add default feature for CPUs on AArch64 target as well. llvm-svn: 210625
* StringRefize TargetInfo::getABI()Alp Toker2014-06-071-4/+4
| | | | llvm-svn: 210402
* [mips] Add macros _MIPS_ISA and __mips_isa_rev (same expansion as defined by ↵Matheus Almeida2014-06-051-0/+15
| | | | | | | | | | | | | | GCC). Summary: The Linux Kernel is one example of a piece of software that relies on them. Reviewers: atanasyan Reviewed By: atanasyan Differential Revision: http://reviews.llvm.org/D3756 llvm-svn: 210270
* AArch64: combine arm64 & aarch64 cases in switchTim Northover2014-05-301-23/+5
| | | | | | | | There shouldn't be any difference in behaviour here, at least not in any configurations people care about and possibly not in any reachable configurations. llvm-svn: 209899
* AArch64/ARM64: rename ARM64 components to AArch64Tim Northover2014-05-241-34/+34
| | | | | | This keeps Clang consistent with backend naming conventions. llvm-svn: 209579
* AArch64/ARM64: update Clang after AArch64 removal.Tim Northover2014-05-241-293/+22
| | | | | | | | | | | A few (mostly CodeGen) parts of Clang were tightly coupled to the AArch64 backend. Now that it's gone, they will not even compile. I've also deduplicated RUN lines in many of the AArch64 tests. This might improve "make check-all" time noticably: some of those NEON tests were monsters. llvm-svn: 209578
* Update R600 datalayoutMatt Arsenault2014-05-221-1/+1
| | | | llvm-svn: 209464
* Add __ARM_DWARF_EH__ to signify the use of Itanium ABI for unwindJoerg Sonnenberger2014-05-131-0/+11
| | | | | | instructions. llvm-svn: 208719
* [C++11] Use 'nullptr'.Craig Topper2014-05-081-23/+23
| | | | llvm-svn: 208280
* [mips] Pass nan2008 info to the back-end.Matheus Almeida2014-05-071-3/+0
| | | | | | | | | | | | Summary: The initial support for NaN2008 was added to the back-end in r206396. Reviewers: atanasyan Reviewed By: atanasyan Differential Revision: http://reviews.llvm.org/D3448 llvm-svn: 208220
* Target: fix wchar_t definition for Windows on ARMSaleem Abdulrasool2014-05-041-2/+9
| | | | | | | | Windows on ARM uses AAPCS, but has some deviations. wchar_t remains an unsigned short on WoA, which does not conform to AAPCS. Ensure that wchar_t is defined accordingly. llvm-svn: 207929
* Add support for -march=bdver4.Benjamin Kramer2014-05-021-0/+10
| | | | llvm-svn: 207848
* [ARM64/AArch64] Define the correct value for __ARM_NEON_FPBradley Smith2014-05-021-2/+2
| | | | llvm-svn: 207842
* [ARM64/AArch64] Hook up CRC32 subtarget feature to the driverBradley Smith2014-05-021-0/+14
| | | | llvm-svn: 207841
* Bitrig now supports TLS, so enable TLS support when targeting it. Patch by ↵Richard Smith2014-05-011-1/+0
| | | | | | Patrick Wildt! llvm-svn: 207812
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