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* AMDGPU: Use ImmLeafMatt Arsenault2020-01-071-2/+2
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* AMDGPU: Fix not using v_cvt_f16_[iu]16Matt Arsenault2020-01-076-31/+59
| | | | | We weren't treating i16->f16 casts as legal on targets with these instructions, and always using a pair of casts through i32.
* [lldb/Lua] Add string conversion operator for SBTarget.Jonas Devlieghere2020-01-074-12/+12
| | | | | | | Extend the SBTarget class with a string conversion operator and reuse the same code between Python and Lua. This should happen for all the SB classes, but I'm doing just this one as an example and for use in a test case.
* [cmake] Use relative cmake binary dir for processing pass plugins.Michael Kruse2020-01-071-10/+12
| | | | | | | | | | | | | https://reviews.llvm.org/D61446 introduced a new function to process pass plugins that used CMAKE_BINARY_DIR. This is problematic when LLVM is a subproject. Instead use LLVM_BINARY_DIR to get the right relative directory for cmake. Patch by Alan Baker <alanbaker@google.com> Reviewed By: Meinersbur Differential Revision: https://reviews.llvm.org/D72109
* [PowerPC][Triple] Use elfv2 on freebsd>=13 and linux-muslFangrui Song2020-01-078-13/+20
| | | | | | | | | | | | | | | | | | | Summary: Every powerpc64le platform uses elfv2. For powerpc64, the environments "elfv1" and "elfv2" were added for FreeBSD ELFv1->ELFv2 migration in D61950. FreeBSD developers have decided to use OS versions to select ABI, and no one is relying on the environments. Also use elfv2 on powerpc64-linux-musl. Users can always use -mabi=elfv1 and -mabi=elfv2 to override the default ABI. Reviewed By: adalava Differential Revision: https://reviews.llvm.org/D72352
* [test] Move ppc64 tests from test/Preprocessor/init.c to init-ppc64.cFangrui Song2020-01-072-1072/+1068
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* [OPENMP]Reduce calls for the mangled names.Alexey Bataev2020-01-072-8/+9
| | | | | | Use canonical decls instead of mangled names in the set of already emitted decls. This allows to reduce the number of function calls for getting declarations mangled names and speedup the compilation.
* [MachineOutliner][AArch64] Save + restore LR in noreturn functionsJessica Paquette2020-01-074-63/+114
| | | | | | | | | | | | | | Conservatively always save + restore LR in noreturn functions. These functions do not end in a RET, and so they aren't guaranteed to have an instruction which uses LR in any way. So, as a result, you can end up in unfortunate situations where you can't backtrace out of these functions in a debugger. Remove the old noreturn test, and add a new one which is more descriptive. Remove the restriction that we can't outline from noreturn functions as well since we now do the right thing.
* [X86] Improve lowering of (v2i64 (setgt X, -1)) on pre-SSE2 targets. Enable ↵Craig Topper2020-01-072-13/+21
| | | | | | | | v2i64 in foldVectorXorShiftIntoCmp. Similar to D72302 but for the canonical form for the opposite case. I've changed foldVectorXorShiftIntoCmp to form a target independent setcc node instead of PCMPGT now and enabled its for v2i64 on pre-SSE4.2 targets. The setcc should eventually get lowered to PCMPGT or the new v2i64 sequence. Differential Revision: https://reviews.llvm.org/D72318
* [X86] Improve lowering of v2i64 sign bit tests on pre-sse4.2 targetsCraig Topper2020-01-076-1456/+963
| | | | | | Without sse4.2 a v2i64 setlt needs to expand into a pcmpgtd, pcmpeqd, 3 shuffles, and 2 logic ops. But if we're only interested in the sign bit of the i64 elements, we can just use one pcmpgtd and shuffle the odd elements to the even elements. Differential Revision: https://reviews.llvm.org/D72302
* [gn build] Port 1d94fb21118LLVM GN Syncbot2020-01-071-0/+1
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* [gicombiner] Add GIMatchTree and use it for the code generationDaniel Sanders2020-01-0713-17/+1928
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: GIMatchTree's job is to build a decision tree by zipping all the GIMatchDag's together. Each DAG is added to the tree builder as a leaf and partitioners are used to subdivide each node until there are no more partitioners to apply. At this point, the code generator is responsible for testing any untested predicates and following any unvisited traversals (there shouldn't be any of the latter as the getVRegDef partitioner handles them all). Note that the leaves don't always fit into partitions cleanly and the partitions may overlap as a result. This is resolved by cloning the leaf into every partition it belongs to. One example of this is a rule that can match one of N opcodes. The leaf for this rule would end up in N partitions when processed by the opcode partitioner. A similar example is the getVRegDef partitioner where having rules (add $a, $b), and (add ($a, $b), $c) will result in the former being in the partition for successfully following the vreg-def and failing to do so as it doesn't care which happens. Depends on D69151 Fixed the issues with the windows bots which were caused by stdout/stderr interleaving. Reviewers: bogner, volkan Reviewed By: volkan Subscribers: lkail, mgorny, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69152
* Fix issues reported by -Wrange-loop-analysis when building with latest Clang ↵Alexandre Ganea2020-01-073-3/+3
| | | | | | (trunk). NFC. Fixes warning: loop variable 'E' of type 'const llvm::StringRef' creates a copy from type 'const llvm::StringRef' [-Wrange-loop-analysis]
* [OPENMP]Allow using of members in standalone declaration pragmas.Alexey Bataev2020-01-077-9/+127
| | | | | | | | | If standalone OpenMP declaration pragma, like declare mapper or declare reduction, is declared in the class context, it may reference a member (data or function) in its internal expressions/statements. So, the parsing of such pragmas must be dalayed just like the parsing of the member initializers/definitions before the completion of the class declaration.
* [clangd] Heuristically resolve dependent call through smart pointer typeNathan Ridge2020-01-072-17/+59
| | | | | | | | | | | | Summary: Fixes https://github.com/clangd/clangd/issues/227 Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D71644
* [clangd] Assert that the testcases in LocateSymbol.All have no diagnosticsNathan Ridge2020-01-071-22/+62
| | | | | | | | | | Summary: Also fix some bugs in the testcases which this exposed. Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72066
* [lldb] Initialize some bitfields in FuncUnwinders.cppPavel Labath2020-01-071-0/+2
| | | | This got flagged by msan.
* [ARM] Regenerate bfi.ll test casesSimon Pilgrim2020-01-071-27/+74
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* [X86] Pull out repeated SrcVT.getVectorNumElements() call. NFCI.Simon Pilgrim2020-01-071-2/+2
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* [analyzer] Update help text to reflect sarif supportGabor Horvath2020-01-071-1/+1
| | | | Differential Revision: https://reviews.llvm.org/D72289
* [LifetimeAnalysis] Do not forbid void deref type in gsl::Pointer/gsl::Owner ↵Gabor Horvath2020-01-074-10/+10
| | | | | | | | | | | annotations It turns out it is useful to be able to define the deref type as void. In case we have a type erased owner, we want to express that the pointee can be basically any type. It should not be unnatural to have a void deref type as we already familiar with "pointers to void". Differential Revision: https://reviews.llvm.org/D72097
* [AIX][XCOFF]Implement mergeable constdiggerlin2020-01-073-3/+168
| | | | | | | | | | SUMMARY: In this patch, we map mergeable const objects to the read-only section in the same manner as const objects that are not mergeable. Reviewers: hubert.reinterpretcast,jasonliu Subscribers: wuzish, nemanjai, hiraditya Differential Revision: https://reviews.llvm.org/D71551
* [HIP] Add option --gpu-max-threads-per-block=nYaxun (Sam) Liu2020-01-077-8/+49
| | | | | | Add this option to change the default launch bounds. Differential Revision: https://reviews.llvm.org/D71221
* [ARM][MVE] Renamed VPT Block tests and files to something more informative. NFCSjoerd Meijer2020-01-078-27/+27
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* AMDGPU/GlobalISel: Fix readfirstlane pattern importMatt Arsenault2020-01-073-2/+65
| | | | | The imm folding optimization pattern failed to import. The instruction pattern was already working, but failing to fail on SGPR inputs.
* Remove extraneous spacesMed Ismail Bennani2020-01-071-1/+1
| | | | Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
* [InstCombine] try to pull 'not' of select into compare operandsSanjay Patel2020-01-072-4/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | not (select ?, (cmp TPred, ?, ?), (cmp FPred, ?, ?) --> select ?, (cmp TPred', ?, ?), (cmp FPred', ?, ?) If both sides of the select are cmps, we can remove an instruction. The case where only side is a cmp is deferred to a possible follow-on patch. We have a more general 'isFreeToInvert' analysis, but I'm not seeing a way to use that more widely without inducing infinite looping (opposing transforms). Here, we flip the compare predicates directly, so we should not have any danger by creating extra intermediate 'not' ops. Alive proofs: https://rise4fun.com/Alive/jKa Name: both select values are compares - invert predicates %tcmp = icmp sle i32 %x, %y %fcmp = icmp ugt i32 %z, %w %sel = select i1 %cond, i1 %tcmp, i1 %fcmp %not = xor i1 %sel, true => %tcmp_not = icmp sgt i32 %x, %y %fcmp_not = icmp ule i32 %z, %w %not = select i1 %cond, i1 %tcmp_not, i1 %fcmp_not Name: false val is compare - invert/not %fcmp = icmp ugt i32 %z, %w %sel = select i1 %cond, i1 %tcmp, i1 %fcmp %not = xor i1 %sel, true => %tcmp_not = xor i1 %tcmp, -1 %fcmp_not = icmp ule i32 %z, %w %not = select i1 %cond, i1 %tcmp_not, i1 %fcmp_not Differential Revision: https://reviews.llvm.org/D72007
* AMDGPU/GlobalISel: Fix import of s_abs_i32 patternMatt Arsenault2020-01-072-1/+106
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* AMDGPU/GlobalISel: Select llvm.amdgcn.wqm.voteMatt Arsenault2020-01-073-8/+20
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* OpaquePtr: print byval types containing anonymous types correctly.Tim Northover2020-01-072-6/+53
| | | | | | | | | | Attribute::getAsString doesn't have enough information to print anonymous Module-level types correctly, so they come back as "%type 0xabcd". This results in broken IR when printing as text. Instead, print type-attributes (currently just byval) using the TypePrinting infrastructure available in AsmWriter. This only applies to function argument attributes.
* llc: Change behavior of -mcpu with existing attributeMatt Arsenault2020-01-0711-38/+38
| | | | | | | | | | | Don't overwrite existing target-cpu attributes. I've often found the replacement behavior annoying, and this is inconsistent with how the fast math command line flags interact with the function attributes. Does not yet change target-features, since I think that should behave as a concatenation.
* AMDGPU/GlobalISel: Partially fix llvm.amdgcn.kill pattern importMatt Arsenault2020-01-071-4/+4
| | | | | Tests deferred since the existing DAG test depends on some other operations, but isn't far from working as-is.
* [docs] NFC: Fix typos in documentsHans Wennborg2020-01-079-10/+10
| | | | | | | | | "the the" -> "the" "an" -> "a" Patch by Kazuaki Ishizaki <ishizaki@jp.ibm.com>! Differential revision: https://reviews.llvm.org/D72091
* [TypePromotion] Use SetVectors instead of PtrSetsSam Parker2020-01-071-40/+30
| | | | | | | | | | | Remove the chance of non-deterministic insertion of zexts of the sources by using a SetVector instead of SmallPtrSet. Do the same for sinks for consistency and to negate the small issue from possibly happening. The SafeWrap instructions are now also stored in a SmallVector. The IRPromoter members of these structures have been changed to references. Differential Revision: https://reviews.llvm.org/D72322
* [DAGCombiner] reduce shuffle of concat of same vectorSanjay Patel2020-01-072-20/+37
| | | | | | | | | | | | | | | | | This is possibly a small part towards solving PR42024: https://bugs.llvm.org/show_bug.cgi?id=42024 The vectorizer is creating shuffles of concat like this: %63 = shufflevector <4 x i64> %x, <4 x i64> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> %64 = shufflevector <8 x i64> %63, <8 x i64> undef, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7> That might be fixable in the vectorizers, but we're not allowed to fold that into a single shuffle in instcombine, so we should have a backend backstop to convert that into the likely simpler form: %64 = shufflevector <4 x i64> %x, <4 x i64> undef, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3> Differential Revision: https://reviews.llvm.org/D72300
* [OPENMP]Do not diagnose references to non-integral types for ref inAlexey Bataev2020-01-072-3/+4
| | | | | | declare simd. According to the standard, a list-item that appears in a linear clause without the ref modifier must be of integral or pointer type, or must be a reference to an integral or pointer type. Added check that this restriction is applied only to non-ref items.
* [clangd] Introduce bulletlistsKadir Cetinkaya2020-01-073-1/+125
| | | | | | | | | | Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D71422
* [ARM][MVE] VPT Blocks: findVCMPToFoldIntoVPSSjoerd Meijer2020-01-075-33/+245
| | | | | | | | | | | | | | | | | | | This is a recommit of D71330, but with a few things fixed and changed: 1) ReachingDefAnalysis: this was not running with optnone as it was checking skipFunction(), which other analysis passes don't do. I guess this is a copy-paste from a codegen pass. 2) VPTBlockPass: here I've added skipFunction(), because like most/all optimisations, we don't want to run this with optnone. This fixes the issues with the initial/previous commit: the VPTBlockPass was running with optnone, but ReachingDefAnalysis wasn't, and so VPTBlockPass was crashing querying ReachingDefAnalysis. I've added test case mve-vpt-block-optnone.mir to check that we don't run VPTBlock with optnone. Differential Revision: https://reviews.llvm.org/D71470
* [X86] Standardize shuffle match/lowering function names. NFC.Simon Pilgrim2020-01-071-38/+39
| | | | We mainly use lowerShuffle*/matchShuffle* - replace the (few) lowerVectorShuffle*/matchVectorShuffle* cases to be consistent.
* Fix "pointer is null" static analyzer warning. NFCI.Simon Pilgrim2020-01-071-3/+3
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* [ARM] Improve codegen of volatile load/store of i64Victor Campos2020-01-077-6/+342
| | | | | | | | | | | | | | | | | | Summary: Instead of generating two i32 instructions for each load or store of a volatile i64 value (two LDRs or STRs), now emit LDRD/STRD. These improvements cover architectures implementing ARMv5TE or Thumb-2. Reviewers: dmgreen, efriedma, john.brawn, nickdesaulniers Reviewed By: efriedma, nickdesaulniers Subscribers: nickdesaulniers, vvereschaka, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70072
* Fix "use of uninitialized variable" static analyzer warning. NFCI.Simon Pilgrim2020-01-071-1/+1
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* [lldb][NFC] Use static_cast instead of reinterpret_cast where possibleRaphael Isemann2020-01-0716-69/+67
| | | | | | | | | | | | | | Summary: There are a few places in LLDB where we do a `reinterpret_cast` for conversions that we could also do with `static_cast`. This patch moves all this code to `static_cast`. Reviewers: shafik, JDevlieghere, labath Reviewed By: labath Subscribers: arphaman, usaxena95, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D72161
* [SystemZ] Extend fp-strict-alias test caseUlrich Weigand2020-01-071-14/+85
| | | | Explicitly add test for fpexcept.maytrap intrinsics.
* [gn build] Port c69ae835d0eLLVM GN Syncbot2020-01-072-0/+2
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* [clangd] Add path mappings functionalitySam McCall2020-01-078-1/+574
| | | | | | | | | | | | | | | | Summary: Add path mappings to clangd which translate file URIs on inbound and outbound LSP messages. This mapping allows clangd to run in a remote environment (e.g. docker), where the source files and dependencies may be at different locations than the host. See http://lists.llvm.org/pipermail/clangd-dev/2019-January/000231.htm for more. Patch by William Wagner! Reviewers: sammccall, ilya-biryukov Reviewed By: sammccall Subscribers: usaxena95, ormris, mgorny, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D64305
* [RISCV][Docs] Add RISC-V asm template argument modifiersLuís Marques2020-01-071-0/+7
| | | | | | Adds the RISC-V asm template argument modifiers currently supported by LLVM. Additional ones supported by GCC will be added to the documentation when we start supporting them.
* Fix Wdocumentation warnings. NFCI.Simon Pilgrim2020-01-071-6/+6
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* Fix "use of uninitialized variable" static analyzer warnings. NFCI.Simon Pilgrim2020-01-071-2/+2
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* Fix "use of uninitialized variable" static analyzer warnings. NFCI.Simon Pilgrim2020-01-071-2/+2
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