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* [clang-tidy] Refresh the add_new_check.py now that we use a table + autofixSylvestre Ledru2020-01-091-12/+67
| | | | | | | | | | | | Reviewers: alexfh Reviewed By: alexfh Subscribers: njames93, xazax.hun, mgorny, cfe-commits Tags: #clang, #clang-tools-extra Differential Revision: https://reviews.llvm.org/D72421
* [libc++] Explicitly enumerate std::string external instantiations.Eric Fiselier2020-01-094-4/+62
| | | | | | | | | | | | | | | | | | | | | | | | The external instantiation of std::string is a problem for libc++. Additions and removals of inline functions in string can cause ABI breakages, including introducing new symbols. This patch aims to: (1) Make clear which functions are explicitly instatiated. (2) Prevent new functions from being accidentally instantiated. (3) Allow a migration path for adding or removing functions from the explicit instantiation over time. Although this new formulation is uglier, it is preferable from a maintainability and readability standpoint because it explicitly enumerates the functions we've chosen to expose in our ABI. Changing this list is non-trivial and requires thought and planning. (3) is achieved by making it possible to control the extern template declaration separately from it's definition. Meaning we could add a new definition to the dylib, wait for it to roll out, then add the extern template declaration to the header. Similarly, we could remove existing extern template declarations while still keeping the definition to prevent ABI breakages.
* [mlir] NFC: Move the state for managing SSA value names out of ↵River Riddle2020-01-091-510/+571
| | | | | | | | | | | | | OperationPrinter and into a new class SSANameState. Summary: This reduces the complexity of OperationPrinter and simplifies the code by quite a bit. The SSANameState is now held by ModuleState. This is in preparation for a future revision that molds ModuleState into something that can be used by users for caching the printer state, as well as for implementing printAsOperand style methods. Depends On D72292 Reviewed By: antiagainst Differential Revision: https://reviews.llvm.org/D72293
* MipsDelaySlotFiller: Update registers def-uses for BUNDLE instructionsAlex Richardson2020-01-092-2/+114
| | | | | | | | | | | | | | | Summary: In commit b91f239485fb7bb8d29be3e0b60660a2de7570a9 I updated the MipsDelaySlotFiller to skip BUNDLE instructions. However, in addition to not considering BUNDLE instructions for the delay slot, we also need to ensure that the register def-use information is updated. Not updating this information caused run-time crashes (when using the out-of-tree CHERI backend) since later definitions could be overwritten with earlier register values. Reviewers: atanasyan Reviewed By: atanasyan Differential Revision: https://reviews.llvm.org/D72254
* Re-apply "[ELF] Allow getErrPlace() to work before Out::bufferStart is set"Alex Richardson2020-01-092-6/+12
| | | | | | This time with a fix for the UBSAN failure. Differential Revision: https://reviews.llvm.org/D70659
* [X86] Add ueq/one fp128 quiet compare tests. NFCCraig Topper2020-01-092-2/+230
| | | | | | | | | | The ONE expansion calls OGT/OLT libcalls which will signal for QNAN. The UEQ expansion uses unord and eq libcalls which won't signal. We should probably use those libcalls for ONE with appropriate logic. Quiet OGT/OLT/OLE/OGE have similar issue, but not sure how to fix those yet.
* [GlobalISel][AArch64] Import + select LDR*roW and STR*roW patternsJessica Paquette2020-01-094-46/+665
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for selecting a large chunk of the load/store *roW patterns. This is pretty much a straight port of AArch64DAGToDAGISel::SelectAddrModeWRO into GISel. The code is very similar to the XRO code. The main difference is that in the *roW patterns, we want to try and fold in an extend, and *possibly* a shift along with it. A good portion of this patch is refactoring the existing XRO code. - Add selectAddrModeWRO - Factor out the code from selectAddrModeShiftedExtendXReg which is used by both selectAddrModeXRO and selectAddrModeWRO into selectExtendedSHL. This is similar to the function of the same name in AArch64DAGToDAGISel. - Add support for extends to the factored out code in selectExtendedSHL. - Teach getExtendTypeForInst how to handle AND masks that are intended to be used in loads/stores (necessary for this addressing mode.) - Make getExtendTypeForInst not static because moving it made an annoying diff and I wanted to have the WRO/XRO functions close to each other while I was writing the code. Differential Revision: https://reviews.llvm.org/D72426
* [clang] Enforce triple in mempcpy testserge-sans-paille2020-01-091-1/+1
| | | | Fixes http://lab.llvm.org:8011/builders/llvm-clang-win-x-armv7l/builds/2597
* [ms] [X86] Use "P" modifier on all branch-target operands in inline X86 ↵Eric Astor2020-01-0910-97/+101
| | | | | | | | | | | | | | | | | | | assembly. Summary: Extend D71677 to apply to all branch-target operands, rather than special-casing call instructions. Also add a regression test for llvm.org/PR44272, since this finishes fixing it. Reviewers: thakis, rnk Reviewed By: thakis Subscribers: merge_guards_bot, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D72417
* [X86] AMD Znver2 (Rome) Scheduler enablementGanesh Gopalasubramanian2020-01-1059-8/+14151
| | | | | | | | | | | | The patch gives out the details of the znver2 scheduler model. There are few improvements with respect to execution units, latencies and throughput when compared with znver1. The tests that were present for znver1 for llvm-mca tool were replicated. The latencies, execution units, timeline and throughput information are updated for znver2. Reviewers: craig.topper, Simon Pilgrim Differential Revision: https://reviews.llvm.org/D66088
* [PowerPC] The VK_PLT symbolref modifier is only used on 32-bit ELF. [NFC]Sean Fertile2020-01-091-2/+2
| | | | | | | | | Fix a conditional that guarded code for execution only on 32-bit ELF by checking that the Subtarget was not 64-bit and not-Darwin. By adding a new target ABI (AIX), the condition is no longer correct. This code is dead for AIX, due to a 'report_fatal_error' for thread local storage usage earlier in the pipeline, but needs to be modifed as part of Darwins removal from the PowerPC backend.
* [demangle] Copy back some NFC commits from LLVMErik Pilkington2020-01-092-8/+8
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* [TargetLowering][X86] TeachSimplifyDemandedBits to handle cases where only ↵Craig Topper2020-01-092-49/+67
| | | | | | | | the sign bit is demanded from a SETCC and can be passed through If we're doing a compare that only tests the sign bit and only the sign bit is demanded, we can just bypass the node. This removes one of the blend dependencies in our v2i64->v2f32 uint_to_fp codegen on pre-sse4.2 targets. Differential Revision: https://reviews.llvm.org/D72356
* [Support][NFC] Add an explicit unit test for Process::getPageSize()Bruno Ricci2020-01-091-0/+38
| | | | | It turns out that it was only tested indirectly. For now test only on Linux X86-64 and aarch64.
* [x86] add tests for 2-way splat copy; NFCSanjay Patel2020-01-091-0/+190
| | | | | Based on code in PR42024: https://bugs.llvm.org/show_bug.cgi?id=42024
* [SystemZ] Fix matching another pattern for nxgrk (PR44496)Ulrich Weigand2020-01-092-2/+29
| | | | | | | | SystemZDAGToDAGISel::Select will attempt to split logical instruction with a large immediate constant. This must not happen if the result matches one of the z15 combined operations, so the code checks for those. However, one of them was missed, causing invalid code to be generated in the test case for PR44496.
* [lldb/SWIG] Undo incorrect substitutionJonas Devlieghere2020-01-091-1/+1
| | | | The Python directory for the script interpreter is still capitalized.
* [Support][NFC] Make some helper functions "static" in Memory.incBruno Ricci2020-01-092-11/+3
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* [NFC,format] Sort switch cases alphabeticallySimon Moll2020-01-091-133/+133
| | | | | | | | | This patch brings the switch cases of `llvm/lib/Support/Triple.cpp` back into alphabetical order. This was noted during the the review of https://reviews.llvm.org/D69103 Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D72452
* [Support][NFC] Add a comment about the semantics of MF_HUGE_HINT flagBruno Ricci2020-01-091-0/+11
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* [Clang] Handle target-specific builtins returning aggregates.Simon Tatham2020-01-092-3/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: A few of the ARM MVE builtins directly return a structure type. This causes an assertion failure at code-gen time if you try to assign the result of the builtin to a variable, because the `RValue` created in `EmitBuiltinExpr` from the `llvm::Value` produced by codegen is always made by `RValue::get()`, which creates a non-aggregate `RValue` that will fail an assertion when `AggExprEmitter::withReturnValueSlot` calls `Src.getAggregatePointer()`. A similar failure occurs if you try to use the struct return value directly to extract one field, e.g. `vld2q(address).val[0]`. The existing code-gen tests for those MVE builtins pass the returned structure type directly to the C `return` statement, which apparently managed to avoid that particular code path, so we didn't notice the crash. Now `EmitBuiltinExpr` checks the evaluation kind of the builtin's return value, and does the necessary handling for aggregate returns. I've added two extra test cases, both of which crashed before this change. Reviewers: dmgreen, rjmccall Reviewed By: rjmccall Subscribers: kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72271
* [lldb/SWIG] Fix capitalization for case sensitive file systems.Jonas Devlieghere2020-01-091-4/+4
| | | | | When moving the Python directory I renamed it to python (lowercase) but didn't update the python.swig file.
* [clangd] Adjust diagnostic range to be inside main fileKadir Cetinkaya2020-01-092-8/+43
| | | | | | | | | | | | | | | | | | | | | | | Summary: LSP requires diagnostics to lay inside main file. In clangd we keep diagnostics in three different cases: - already in main file - adjusted to a header included in main file - has a note covering some range in main file In the last case, we were not adjusting the diagnostics range to be in main file, therefore these diagnostics ended up pointing some arbitrary locations. This patch fixes that issue by adjusting the range of diagnostics to be the first note inside main file when converting to LSP. Reviewers: ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72458
* [lldb/Bindings] Move bindings into their own subdirectoryJonas Devlieghere2020-01-0980-18/+17
| | | | | | | | | | | | All the code required to generate the language bindings for Python and Lua lives under scripts, even though the majority of this code aren't scripts at all, and surrounded by scripts that are totally unrelated. I've reorganized these files and moved everything related to the language bindings into a new top-level directory named bindings. This makes the corresponding files self contained and much more discoverable. Differential revision: https://reviews.llvm.org/D72437
* [OpenCL][Docs] Rename C++ for OpenCL labelSven van Haastregt2020-01-091-2/+3
| | | | To avoid potential confusion with OpenCL C++.
* Improve support of GNU mempcpyserge-sans-paille2020-01-096-4/+39
| | | | | | | - Lower to the memcpy intrinsic - Raise warnings when size/bounds are known Differential Revision: https://reviews.llvm.org/D71374
* [NFCI][LoopUnrollAndJam] Changing LoopUnrollAndJamPass to a functionWhitney Tsang2020-01-098-50/+70
| | | | | | | | | | | | | | | | | | | pass. Summary: This patch changes LoopUnrollAndJamPass to a function pass, and keeps the loops traversal order same as defined in FunctionToLoopPassAdaptor LoopPassManager.h. The next patch will change the loop traversal to outer to inner order, so more loops can be transform. Discussion in llvm-dev mailing list: https://groups.google.com/forum/#!topic/llvm-dev/LF4rUjkVI2g Reviewer: dmgreen, jdoerfert, Meinersbur, kbarton, bmahjour, etiotto Reviewed By: dmgreen Subscribers: hiraditya, zzheng, llvm-commits Tag: LLVM Differential Revision: https://reviews.llvm.org/D72230
* [lldb/Lua] Make lldb.debugger et al available to LuaJonas Devlieghere2020-01-0910-3/+89
| | | | | | | | The Python script interpreter makes the current debugger, target, process, thread and frame available to interactive scripting sessions through convenience variables. This patch does the same for Lua. Differential revision: https://reviews.llvm.org/D71801
* [lldb/SWIG] Add missing '\' in macros againJonas Devlieghere2020-01-091-2/+2
| | | | | | Making the string conversion operator a macro unintentionally dropped the backslash before '\n' and '\r' and was therefore incorrectly stripping 'n' and 'r' from the object description.
* [clangd] Respect `--sysroot` argument if it is setDavid Goldman2020-01-091-1/+3
| | | | | | | | | | | | | | Summary: - Since `--sysroot` is a superset of the `-isysroot` argument, we shouldn't add the `-isysroot` if we detect a `--sysroot` flag. Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D72415
* [libcxxabi] Allow tests to link with static libc++abi/libc++ even if the ↵Sergej Jaskiewicz2020-01-093-3/+33
| | | | | | | | | | | | | | | | | | | | | | | shared version is present Summary: Right now the only way to force libc++abi tests to link with the static version of libc++abi is to set `LIBCXXABI_ENABLE_SHARED` to `OFF`. However, this doesn't work when libc++abi is built as standalone project because of [this](https://github.com/llvm/llvm-project/blob/54c522420347e58aa7bae1892cf5c5672b57c875/libcxxabi/CMakeLists.txt#L503-L519). This change allows specifying the version of the library for tests to link with. This is useful for remote testing, for example, with `SSHExecutor`, where we _have_ to link with libc++abi statically. Two new CMake options are introduced here: `LIBCXXABI_LINK_TESTS_WITH_SHARED_LIBCXXABI` and `LIBCXXABI_LINK_TESTS_WITH_SHARED_LIBCXX`. They can be set to `OFF` to tell the test utility to link tests with the static libraries. It shouldn't break anything, because the default values of these options are set such that the test utility will behave the same way. Reviewers: EricWF, mclow.lists, phosek, mehdi_amini, ldionne, jroelofs, bcraig Subscribers: mgorny, christof, ldionne, libcxx-commits Tags: #libc Differential Revision: https://reviews.llvm.org/D71894
* [InstCombine] Z / (1.0 / Y) => (Y * Z)@raghesh (Raghesh Aloor)2020-01-092-2/+10
| | | | | | | | | This is a special case of Z / (X / Y) => (Y * Z) / X, with X = 1.0. The m_OneUse check is avoided because even in the case of the multiple uses for 1.0/Y, the number of instructions remain the same and a division is replaced by a multiplication. Differential Revision: https://reviews.llvm.org/D72319
* [ELF][Hexagon] Add support for IE relocationsSid Manning2020-01-093-1/+103
| | | | Differential Revision: https://reviews.llvm.org/D71143
* TableGen: Remove unused codeMatt Arsenault2020-01-091-6/+0
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* AMDGPU/GlobalISel: Fix import of integer med3Matt Arsenault2020-01-096-32/+646
| | | | | This isn't too useful now, since nothing is currently trying to form min/max from cmp+select.
* AMDGPU: Eliminate more legacy codepred address space PatFragsMatt Arsenault2020-01-094-93/+24
| | | | These should now be limited to R600 code.
* AMDGPU: Use new PatFrag system for d16 storesMatt Arsenault2020-01-092-15/+9
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* AMDGPU: Use new PatFrag system for d16 load nodesMatt Arsenault2020-01-091-32/+23
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* AMDGPU/GlobalISel: Fix import of zext of s16 op patternsMatt Arsenault2020-01-096-15/+143
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* AMDGPU/GlobalISel: Add IMMPopCount xformMatt Arsenault2020-01-093-0/+12
| | | | Partially fixes BFE pattern import.
* AMDGPU/GlobalISel: Add selectVOP3Mods_nnanMatt Arsenault2020-01-093-0/+20
| | | | | | This doesn't enable any new imports yet, but moves the fmed patterns from failing on this to hitting the "complex suboperand referenced more than once" limitation in tablegen.
* AMDGPU/GlobalISel: Add equiv xform for bitcast_fpimm_to_i32Matt Arsenault2020-01-093-0/+17
| | | | Only partially fixes one pattern import.
* AMDGPU/GlobalISel: Fix add of neg inline constant patternMatt Arsenault2020-01-095-1/+139
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* TableGen/GlobalISel: Fix slightly wrong generated commentMatt Arsenault2020-01-092-2/+2
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* AMDGPU: Add register class to DS_SWIZZLE_B32 patternMatt Arsenault2020-01-091-1/+1
| | | | Reduces diff for a future patch.
* [ARM,MVE] Add missing IntrNoMem flag on IR intrinsics.Simon Tatham2020-01-091-14/+13
| | | | | | | | | | | | | | | | A lot of the IR-level intrinsics we've been defining for MVE recently accidentally had `props = []` instead of `props = [IntrNoMem]`, so that optimization would have been overcautious about reordering them. All the affected cases were due to instantiating the multiclasses `MVEPredicated` and `MVEMXPredicated` without filling in the `props` parameter, because I //thought// I remembered having set the defaults in those multiclasses to `[IntrNoMem]`. In fact I hadn't done that. Now I have. (The IR intrinsics that //do// read and write memory are all explicitly marked as `[IntrReadMem]` or `[IntrWriteMem]` already, so they will override these defaults.)
* [ARM,MVE] Fix valid immediate range for vsliq_n.Simon Tatham2020-01-092-1/+94
| | | | | | | | | | | In common with most MVE immediate shift instructions, the left shift takes an immediate in the range [0,n-1], while the right shift takes one in the range [1,n]. I had absent-mindedly made them both the latter. While I'm here, I've added a set of regression tests checking both ends of the immediate range for a representative sample of the immediate shifts.
* IR: remove "else" after "return". NFCI.Tim Northover2020-01-091-2/+2
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* [OPENMP]Remove unused code, NFC.Alexey Bataev2020-01-092-102/+2
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* [DAGCombiner] reduce extract subvector of concatSanjay Patel2020-01-094-74/+45
| | | | | | | | | | | | | | If we are extracting a chunk of a vector that's a fraction of an operand of the concatenated vector operand, we can extract directly from one of those original operands. This is another suggestion from PR42024: https://bugs.llvm.org/show_bug.cgi?id=42024#c2 But I'm not sure yet if it will make any difference on those patterns. It seems to help a few existing AVX512 tests though. Differential Revision: https://reviews.llvm.org/D72361
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