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* Implement xfer:libraries-svr4:read packetAntonio Afonso2019-06-1816-4/+362
| | | | | | | | | | | | | | | | | | | Summary: This is the fourth patch to improve module loading in a series that started here (where I explain the motivation and solution): D62499 Implement the `xfer:libraries-svr4` packet by adding a new function that generates the list and then in Handle_xfer I generate the XML for it. The XML is really simple so I'm just using string concatenation because I believe it's more readable than having to deal with a DOM api. Reviewers: clayborg, xiaobai, labath Reviewed By: labath Subscribers: emaste, mgorny, srhines, krytarowski, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D62502 llvm-svn: 363707
* [scudo][standalone] Fuchsia related changesKostya Kortchinsky2019-06-183-38/+37
| | | | | | | | | | | | | | | | | | | | | | Summary: Fuchsia wants to use mutexes with PI in the Scudo code, as opposed to our own implementation. This required making `lock` & `unlock` platform specific (as opposed to `wait` & `wake`) [code courtesy of John Grossman]. There is an additional flag required now for mappings as well: `ZX_VM_ALLOW_FAULTS`. Reviewers: morehouse, mcgrathr, eugenis, vitalybuka, hctim Reviewed By: morehouse Subscribers: delcypher, jfb, #sanitizers, llvm-commits Tags: #llvm, #sanitizers Differential Revision: https://reviews.llvm.org/D63435 llvm-svn: 363705
* [x86] add test for load splitting with extracted store (PR42305); NFCSanjay Patel2019-06-181-0/+48
| | | | llvm-svn: 363704
* [mips] Add more strict predicates to the RSQRT_S_MM and TAILCALL_MMSimon Atanasyan2019-06-182-2/+3
| | | | | | | This patch is one of a series of patches. The goal is to make P5600 scheduler model complete and turn on the `CompleteModel` flag. llvm-svn: 363703
* [mips] Add PTR_64 and GPR_64 predicates to some MIPS 64-bit instructionsSimon Atanasyan2019-06-182-15/+17
| | | | | | | | | | | | | | | Add `IsGP64bit` and `IsPTR64bit` to the list of `UnsupportedFeatures` of the P5600 scheduling definitions. Also mark some MIPS 64-bit instructions by PTR_64 and GPR_64 predicates. This reduces number of "No schedule information for" and "lacks information for" errors in case of marking this scheduler model as complete. This patch is one of a series of patches. The goal is to make P5600 scheduler model complete and turn on the `CompleteModel` flag. Differential Revision: https://reviews.llvm.org/D63237 llvm-svn: 363702
* [mips] Set the hasNoSchedulingInfo flag for the `MipsAsmPseudoInst`Simon Atanasyan2019-06-181-0/+1
| | | | | | | | | | | | | | Set the hasNoSchedulingInfo flag for the`MipsAsmPseudoInst`. These pseudo-instructions are never used by codegen. This flag allows to reduce number of "No schedule information for" and "lacks information for" errors in case of marking a scheduler model as complete. This patch is one of a series of patches. The goal is to make P5600 scheduler model complete and turn on the `CompleteModel` flag. Differential Revision: https://reviews.llvm.org/D63236 llvm-svn: 363701
* Fix some lit test ResourceWarnings on WindowsAdrian McCarthy2019-06-181-0/+1
| | | | | | | | | | | | | | | | | | When running LLDB lit tests on Windows, the system selects a debug version of Python, which was issuing lots of ResourceWarnings about files that weren't closed. There are two kinds of them, and each test triggered one of each. This patch fixes one kind by ensuring TestRunner explicitly close the temporary files created for routing stderr. This is important on Windows but has no net effect on Posix systems. The remaining ResourceWarnings are more elusive; the bug may lie in the Python library subprocess.py, and it may be Windows-specific. Differential Revision: https://reviews.llvm.org/D63102 llvm-svn: 363700
* Add test cases for dumping AST decl nodes to JSON; NFC.Aaron Ballman2019-06-181-0/+1671
| | | | llvm-svn: 363699
* [Syntax] Add a helper to find expansion by its first spelled tokenIlya Biryukov2019-06-183-0/+123
| | | | | | | | | | | | | | | | Summary: Used in clangd for a code tweak that expands a macro. Reviewers: sammccall Reviewed By: sammccall Subscribers: kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D62954 llvm-svn: 363698
* [Reproducers] Make reproducer relocatableJonas Devlieghere2019-06-187-11/+32
| | | | | | | | | | | | | | Before this patch, reproducers weren't relocatable. The reproducer contained hard coded paths in the VFS mapping, as well in the yaml file listing the different input files for the command interpreter. This patch changes that: - Use relative paths for the DataCollector. - Use an overlay prefix for the FileCollector. Differential revision: https://reviews.llvm.org/D63467 llvm-svn: 363697
* [ARM] Add MVE vector shift instructions.Simon Tatham2019-06-186-4/+1816
| | | | | | | | | | | | | | | | | | | This includes saturating and non-saturating shifts, both with immediate shift count and with the shift counts given by another vector register; VSHLC (in which the bits shifted out of each active vector lane are shifted in to the next active lane); and also VMOVL, which is enough like an immediate shift that it didn't fit too badly in this category. Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62672 llvm-svn: 363696
* [ARM] Add MVE integer vector min/max instructions.Simon Tatham2019-06-184-1/+134
| | | | | | | | | | | | | | | | | | | | | Summary: These form a small family of their own, to go with the floating-point VMINNM/VMAXNM instructions added in a previous commit. They introduce the first of many special cases in the mnemonic recognition code, because VMIN with the E suffix used by the VPT predication system needs to avoid being interpreted as the nonexistent instruction 'VMI' with an ordinary 'NE' condition suffix. Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62671 llvm-svn: 363695
* [TargetLowering] SimplifyDemandedVectorElts - support MUL and ↵Simon Pilgrim2019-06-182-1/+9
| | | | | | | | | | ANY_EXTEND_VECTOR_INREG Also fold ANY_EXTEND_VECTOR_INREG -> BITCAST if we only need the bottom element. Fixes temporary regression introduced in rL363693. llvm-svn: 363694
* [X86][AVX] extract_subvector(any_extend(x)) -> any_extend_vector_inreg(x)Simon Pilgrim2019-06-182-4/+11
| | | | | | Part of fixing the X86 regression noted in D63281 - I've split this into X86 and generic parts - the generic commit will be coming shortly and will fix the vector-reduce-mul-widen.ll regression introduced here. llvm-svn: 363693
* [libc++] Implement P0608R3 - A sane variant converting constructorZhihao Yuan2019-06-186-6/+238
| | | | | | | | | | | | | | | | | | Summary: Prefer user-defined conversions over narrowing conversions and conversions to bool. References: http://wg21.link/p0608 Reviewers: EricWF, mpark, mclow.lists Reviewed By: mclow.lists Subscribers: zoecarver, ldionne, libcxx-commits, cfe-commits, christof Differential Revision: https://reviews.llvm.org/D44865 llvm-svn: 363692
* [clangd] Return vector<TextEdit> from applyTweak. NFCIlya Biryukov2019-06-183-5/+19
| | | | | | | | | For the same reasons as r363150, which got overwritten by changes in r363680. Sending without review to unbreak our integrate. llvm-svn: 363691
* [ARM] Rename MVE instructions in Tablegen for consistency.Simon Tatham2019-06-186-246/+259
| | | | | | | | | | | | | | | | | | | Summary: Their names began with a mishmash of `MVE_`, `t2` and no prefix at all. Now they all start with `MVE_`, which seems like a reasonable choice on the grounds that (a) NEON is the thing they're most at risk of being confused with, and (b) MVE implies Thumb-2, so a prefix indicating MVE is strictly more specific than one indicating Thumb-2. Reviewers: ostannard, SjoerdMeijer, dmgreen Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63492 llvm-svn: 363690
* [libc++] Re-apply XFAIL to is_base_of test that was inadvertently revertedLouis Dionne2019-06-181-4/+5
| | | | llvm-svn: 363689
* [libc++] Revert the addition of map/multimap CTADLouis Dionne2019-06-189-775/+3
| | | | | | | | | | | | | This was found to be broken on Clang trunk. This is a revert of the following commits (the subsequent commits added XFAILs to the tests that were missing from the original submission): r362986: Implement deduction guides for map/multimap. r363014: Add some XFAILs r363097: Add more XFAILs r363197: Add even more XFAILs llvm-svn: 363688
* [CodeGen][ARM] Fix FP16 vector coercionMikhail Maltsev2019-06-182-3/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When a function argument or return type is a homogeneous aggregate which contains an FP16 vector but the target does not support FP16 operations natively, the type must be converted into an array of integer vectors by then front end (otherwise LLVM will handle FP16 vectors incorrectly by scalarizing them and promoting FP16 to float, see https://reviews.llvm.org/D50507). Currently the logic for checking whether or not a given homogeneous aggregate contains FP16 vectors is incorrect: it only looks at the type of the first vector. This patch fixes the issue by adding a new method ARMABIInfo::containsAnyFP16Vectors and using it. The traversal logic of this method is largely the same as in ABIInfo::isHomogeneousAggregate. Reviewers: eli.friedman, olista01, ostannard Reviewed By: ostannard Subscribers: ostannard, john.brawn, javed.absar, kristof.beyls, pbarrio, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63437 llvm-svn: 363687
* [RISCV] Lower calls through PLTLewis Revill2019-06-184-4/+142
| | | | | | | | | | This patch adds support for generating calls through the procedure linkage table where required for a given ExternalSymbol or GlobalAddress callee. Differential Revision: https://reviews.llvm.org/D55304 llvm-svn: 363686
* Fix -Wunused-but-set-variable warning. NFCI.Simon Pilgrim2019-06-181-0/+1
| | | | llvm-svn: 363685
* AMDGPU: Add GWS instruction builtinsMatt Arsenault2019-06-182-0/+14
| | | | llvm-svn: 363684
* [llvm-readobj] Allow --hex-dump/--string-dump to dump multiple sectionsFangrui Song2019-06-1811-172/+229
| | | | | | | | | | | | | | | | | | 1) `-x foo` currently dumps one `foo`. This change makes it dump all `foo`. 2) `-x foo -x foo` currently dumps `foo` twice. This change makes it dump `foo` once. In addition, if foo has section index 9, `-x foo -x 9` dumps `foo` once. 3) Give a warning instead of an error if `foo` does not exist. The new behaviors match GNU readelf. Also, print a new line as a separator between two section dumps. GNU readelf uses two lines, but one seems good enough. Reviewed By: grimar, jhenderson Differential Revision: https://reviews.llvm.org/D63475 llvm-svn: 363683
* AMDGPU: Disable errno by defaultMatt Arsenault2019-06-182-0/+8
| | | | llvm-svn: 363682
* [clangd] Remove the extra ";", NFCHaojian Wu2019-06-181-2/+2
| | | | llvm-svn: 363681
* [clangd] Add hidden tweaks to dump AST/selection.Sam McCall2019-06-1814-53/+359
| | | | | | | | | | | | | | | | | | | | | | | Summary: This introduces a few new concepts: - tweaks have an Intent (they don't all advertise as refactorings) - tweaks may produce messages (for ShowMessage notification). Generalized Replacements -> Effect. - tweaks (and other features) may be hidden (clangd -hidden-features flag). We may choose to promote these one day. I'm not sure they're worth their own feature flags though. Verified it in vim-clangd (not yet open source), curious if the UI is ok in VSCode. Reviewers: ilya-biryukov Subscribers: mgorny, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D62538 llvm-svn: 363680
* [compiler-rt][SystemZ] Work around ASAN failures via -fno-partial-inliningUlrich Weigand2019-06-182-0/+10
| | | | | | | | | | | | | | | | | Since updating the SystemZ LLVM build bot system to Ubuntu 18.04, all bots are red due to two ASAN failures. It turns out these are triggered due to building the ASAN support libraries, in particular the interceptor routines using GCC 7. Specifically, at least on our platform, this compiler decides to "partially inline" some of those interceptors, creating intermediate stub routines like "__interceptor_recvfrom.part.321". These will show up in the backtraces at interception points, causing testsuite failures. As a workaround to get the build bots green again, this patch adds the -fno-partial-inlining command line option when building the common sanitizer support libraries on s390x, if that option is supported by the compiler. llvm-svn: 363679
* AMDGPU: Add ds_gws_init / ds_gws_barrier intrinsicsMatt Arsenault2019-06-1812-21/+686
| | | | | | | There may or may not be additional work to handle this correctly on SI/CI. llvm-svn: 363678
* [MCA] Slightly refactor the bottleneck analysis view. NFCIAndrea Di Biagio2019-06-184-72/+93
| | | | | | | | | | | This patch slightly refactors data structures internally used by the bottleneck analysis to track data and resource dependencies. This patch also updates methods used to print out information about dependency edges when in debug mode. This is the last of a sequence of commits done in preparation for an upcoming patch that fixes PR37494. No functional change intended. llvm-svn: 363677
* Require commas to separate multiple GNU-style attributes in the same ↵Aaron Ballman2019-06-182-7/+15
| | | | | | | | attribute list. Fixes PR38352. llvm-svn: 363676
* AMDGPU: Change API for checking for exec modificationMatt Arsenault2019-06-184-27/+55
| | | | | | | | | | | | | | | | | | Invert the name and return value to better reflect the imprecise nature. Force passing in the DefMI, since it's known in the 2 users and could possibly fail for an arbitrary vreg. Allow specifying a specific user instruction. Scan through use instructions, instead of use operands. Add scan thresholds instead of searching infinitely. Stop using a set to track seen uses. I didn't understand this usage, or why it would not check the last use. I don't think the use list has any particular order. llvm-svn: 363675
* MCContext: Delete unused functionsFangrui Song2019-06-182-23/+0
| | | | llvm-svn: 363674
* gn build: Merge r363658Nico Weber2019-06-181-0/+1
| | | | llvm-svn: 363673
* gn build: Merge r363649Nico Weber2019-06-181-1/+0
| | | | | | | This reverts commit "gn build: Merge r363626" because r363626 was reverted in r363649. llvm-svn: 363672
* [SelectionDAG] Legalize vaargs that require vector splittingSimon Pilgrim2019-06-184-0/+155
| | | | | | | | | | This adds vector splitting for vaarg instructions during type legalization Committed on behalf of @luke (Luke Lau) Differential Revision: https://reviews.llvm.org/D60762 llvm-svn: 363671
* AMDGPU: Fold readlane from copy of SGPR or immMatt Arsenault2019-06-185-17/+371
| | | | | | These may be inserted to assert uniformity somewhere. llvm-svn: 363670
* AMDGPU: Remove unnecessary check for virtual registerMatt Arsenault2019-06-181-17/+4
| | | | | | | The copy was found by searching the uses of a virtual register, so it's already known to be virtual. llvm-svn: 363669
* AMDGPU: Fix iterator crash in AMDGPUPromoteAllocaMatt Arsenault2019-06-182-12/+30
| | | | | | The lifetime intrinsic was erased, which was the next iterator. llvm-svn: 363668
* AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.scaleMatt Arsenault2019-06-182-0/+81
| | | | llvm-svn: 363667
* [ARM] Some Thumb2ITBlock clean ups. NFCSjoerd Meijer2019-06-182-48/+41
| | | | | | | | | Some more refactoring, like registering the IT Block pass, less cryptic variable names, and some simplification of loops. Differential Revision: https://reviews.llvm.org/D63419 llvm-svn: 363666
* [SystemZ] Fix AHIMuxK pseudo expansion.Jonas Paulsson2019-06-182-4/+26
| | | | | | | Do not emit a copy if the source and destination registers are the same. Review: Ulrich Weigand llvm-svn: 363665
* [clangd] Add a capability to enable completions with fixes.Sam McCall2019-06-183-0/+8
| | | | | | | | | | | | Reviewers: ilya-biryukov Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63091 llvm-svn: 363664
* [clangd] Parse files without extensions if we don't have a compile command.Haojian Wu2019-06-182-2/+8
| | | | | | | | | | | | | | Summary: This would enable clangd for C++ standard library files. Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63481 llvm-svn: 363663
* [clangd] Detect C++ language based on well-known file path in vscode extensionHaojian Wu2019-06-181-0/+4
| | | | | | | | | | | | | | | | | | | | Summary: Matching the "C++" pattern on the first line of the file doesn't cover all cases, MSVC C++ headers doesn't have such pattern. This patch introduce a new heuristic to detect language based on the file path. MSVC C++ standard headers are in the directory like "c:\Program Files (x86)\Microsoft Visual Studio\2017\BuildTools\VC\Tools\MSVC\14.15.26726\include" Reviewers: sammccall Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63483 llvm-svn: 363662
* [AMDGPU] Speed up live-in virtual register set computaion in ↵Valery Pykhtin2019-06-184-5/+80
| | | | | | | | GCNScheduleDAGMILive. Differential revision: https://reviews.llvm.org/D62401 llvm-svn: 363661
* [SVE][IR] Scalable Vector IR Type with pr42210 fixGraham Hunter2019-06-1819-39/+446
| | | | | | | | | | | | | | | | | | | | | Recommit of D32530 with a few small changes: - Stopped recursively walking through aggregates in the verifier, so that we don't impose too much overhead on large modules under LTO (see PR42210). - Changed tests to match; the errors are slightly different since they only report the array or struct that actually contains a scalable vector, rather than all aggregates which contain one in a nested member. - Corrected an older comment Reviewers: thakis, rengolin, sdesmalen Reviewed By: sdesmalen Differential Revision: https://reviews.llvm.org/D63321 llvm-svn: 363658
* [X86] Regenerate promote.ll. NFC.Simon Pilgrim2019-06-181-7/+3
| | | | llvm-svn: 363657
* [NFC] Improve triple match of scripts that update testsDiogo N. Sampaio2019-06-181-29/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The prior behavior of the triple matcher would stop in the first matched triple. It was not possible to create specific matches for sub-sets of a triple (e.g aarch64-apple-darwin would never be used after aarch64 was matched). This patch: 1) Allows that specialized triples take priority, considering that the string lenght of the triple indentifies how specialized a triple is. If two triples of same lenght match, the one matched first prevails, preserving the old behavior. 2) Remove 20 duplicated triples of arm, thumb, aarch64 options with same arguments, matching the common prefix (aarch64, arm, thumb) of them. 3) Creates three new function matching regexes and five triple options for arm64-apple-ios, (arm|thumb)-apple-ios and thumb(v5)?-macho Reviewers: lebedev.ri, RKSimon, MaskRay, gbedwell Reviewed By: MaskRay Subscribers: javed.absar, kristof.beyls, llvm-commits, carwil Tags: #llvm Differential Revision: https://reviews.llvm.org/D63145 llvm-svn: 363656
* [X86] Replace any_extend* vector extensions with zero_extend* equivalentsSimon Pilgrim2019-06-183-84/+53
| | | | | | | | | | First step toward addressing the vector-reduce-mul-widen.ll regression in D63281 - we should replace ANY_EXTEND/ANY_EXTEND_VECTOR_INREG in X86ISelDAGToDAG to avoid having to add duplicate patterns when treating any extensions as legal. In future patches this will also allow us to keep any extension nodes around a lot longer in the DAG, which should mean that we can keep better track of undef elements that otherwise become zeros that we think we have to keep...... Differential Revision: https://reviews.llvm.org/D63326 llvm-svn: 363655
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