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* CodeGen: Change MachineInstr to use MachineInstr&, NFCDuncan P. N. Exon Smith2016-02-2714-36/+36
| | | | | | | | Change MachineInstr API to prefer MachineInstr& over MachineInstr* whenever the parameter is expected to be non-null. Slowly inching toward being able to fix PR26753. llvm-svn: 262149
* DAGCombiner: Don't unnecessarily swap operands in ReassociateOpsMatt Arsenault2016-02-275-11/+44
| | | | | | | | | | | | | | | | | | In the case where op = add, y = base_ptr, and x = offset, this transform: (op y, (op x, c1)) -> (op (op x, y), c1) breaks the canonical form of add by putting the base pointer in the second operand and the offset in the first. This fix is important for the R600 target, because for some address spaces the base pointer and the offset are stored in separate register classes. The old pattern caused the ISel code for matching addressing modes to put the base pointer and offset in the wrong register classes, which required no-trivial code transformations to fix. llvm-svn: 262148
* [UBSan] Fix isDerivedFromAtOffset on iOS ARM64Filipe Cabecinhas2016-02-276-1/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: iOS on ARM64 doesn't unique RTTI. Ref: clang's iOS64CXXABI::shouldRTTIBeUnique() Due to this, pointer-equality will not necessarily work in this architecture, across dylib boundaries. dynamic_cast<>() will (as expected) still work, since Apple ships with one prepared for this, but we can't rely on the type names being pointer-equal. I've limited the expensive strcmp check to the specific architecture which needs it. Example which triggers this bug: lib.h: struct X { virtual ~X() {} }; X *libCall(); lib.mm: X *libCall() { return new X; } prog.mm: int main() { X *px = libCall(); delete px; } Expected output: Nothing Actual output: <unknown>: runtime error: member call on address 0x00017001ef50 which does not point to an object of type 'X' 0x00017001ef50: note: object is of type 'X' 00 00 00 00 60 00 0f 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ^~~~~~~~~~~~~~~~~~~~~~~ vptr for ‘X’ Reviewers: kubabrecka, samsonov, eugenis, rsmith Subscribers: aemerson, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D11502 llvm-svn: 262147
* CodeGen: Use MachineInstr& in HashMachineInstr, NFCDuncan P. N. Exon Smith2016-02-271-10/+10
| | | | | | Also update HashEndOfMBB to take MachineBasicBlock&. llvm-svn: 262146
* CodeGen: Use MachineInstr& in AntiDepBreaker API, NFCDuncan P. N. Exon Smith2016-02-276-91/+88
| | | | | | | | Take parameters as MachineInstr& instead of MachineInstr* in AntiDepBreaker API, since these are required to be non-null. No functionality change intended. Looking toward PR26753. llvm-svn: 262145
* CodeGen: Assert valid MI in AntiDepBreaker::UpdateDbgValueDuncan P. N. Exon Smith2016-02-271-1/+2
| | | | | | | This already assumes a valid MI, since it dereferences the MI in an assertion before checking for null. At an explicit assert. llvm-svn: 262144
* AArch64: Use MachineInstr& in guaranteesZeroRegInBlock(), NFCDuncan P. N. Exon Smith2016-02-271-6/+6
| | | | llvm-svn: 262143
* CodeGen: Update DFAPacketizer API to take MachineInstr&, NFCDuncan P. N. Exon Smith2016-02-276-98/+98
| | | | | | | | | In all but one case, change the DFAPacketizer API to take MachineInstr& instead of MachineInstr*. In DFAPacketizer::endPacket(), take MachineBasicBlock::iterator. Besides cleaning up the API, this is in search of PR26753. llvm-svn: 262142
* WIP: CodeGen: Use MachineInstr& in MachineInstrBundle.h, NFCDuncan P. N. Exon Smith2016-02-2720-58/+54
| | | | | | | | Update APIs in MachineInstrBundle.h to take and return MachineInstr& instead of MachineInstr* when the instruction cannot be null. Besides being a nice cleanup, this is tacking toward a fix for PR26753. llvm-svn: 262141
* WebAssembly: fix buildJF Bastien2016-02-271-8/+8
| | | | | | It was broken by the work for PR26753. llvm-svn: 262140
* Revert "[sancov] do not instrument nodes that are full pre-dominators"Renato Golin2016-02-271-22/+11
| | | | | | This reverts commit r262103, as it broke all ARM and AArch64 bots. llvm-svn: 262139
* Workaround doxygen bug https://bugzilla.gnome.org/show_bug.cgi?id=506243Alexander Kornienko2016-02-272-2/+2
| | | | llvm-svn: 262138
* Tidyup for loops - don't repeat upper limit evaluation if you don't have to. ↵Simon Pilgrim2016-02-271-5/+5
| | | | | | NFCI. llvm-svn: 262137
* Correcting indentation for an RST code block.Aaron Ballman2016-02-271-3/+4
| | | | llvm-svn: 262136
* Addition of tests to previous check-in. Tests for coprocessor register usage ↵Chris Dewhurst2016-02-271-0/+72
| | | | | | | | | | | | | | | | in Sparc. Previous check-in message was: The patch adds missing registers and instructions to complete all the registers supported by the Sparc v8 manual. These are all co-processor registers, with the exception of the floating-point deferred-trap queue register. Although these will not be lowered automatically by any instructions, it allows the use of co-processor instructions implemented by inline-assembly. Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td, which was formerly causing a problem in the disassembly of the %fq register. llvm-svn: 262135
* [X86][AVX] vpermilvar.pd mask element indices only use bit1Simon Pilgrim2016-02-271-6/+6
| | | | llvm-svn: 262134
* The patch adds missing registers and instructions to complete all the ↵Chris Dewhurst2016-02-277-29/+344
| | | | | | | | | | | | | registers supported by the Sparc v8 manual. These are all co-processor registers, with the exception of the floating-point deferred-trap queue register. Although these will not be lowered automatically by any instructions, it allows the use of co-processor instructions implemented by inline-assembly. Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td, which was formerly causing a problem in the disassembly of the %fq register. llvm-svn: 262133
* [X86][AVX] Added AVX1 target shuffle combine testsSimon Pilgrim2016-02-271-0/+69
| | | | llvm-svn: 262132
* Strip trailing whitespace. NFCI.Simon Pilgrim2016-02-271-9/+9
| | | | llvm-svn: 262131
* [PM] Loosen the regex for the proxy template name even further to copeChandler Carruth2016-02-271-3/+3
| | | | | | with 'class' keywords in the template arguments and other silliness. llvm-svn: 262130
* [PM] Use a boring regex instead of explicitly naming the analysisChandler Carruth2016-02-271-3/+3
| | | | | | | | | | manager as some compilers print the typedef name and others print the "canonical" name of the underlying class template. This isn't really an important artifact of the test anyways so it seems fine to just loosen the test assertions here. llvm-svn: 262129
* [PM] Provide explicit instantiation declarations and definitions for theChandler Carruth2016-02-276-0/+16
| | | | | | PassManager and AnalysisManager template specializations as well. llvm-svn: 262128
* [PM] Provide two templates for the two directionalities of analysisChandler Carruth2016-02-277-602/+147
| | | | | | | | | | | | | | | | | | | | | | | | manager proxies and use those rather than repeating their definition four times. There are real differences between the two directions: outer AMs are const and don't need to have invalidation tracked. But every proxy in a particular direction is identical except for the analysis manager type and the IR unit they proxy into. This makes them prime candidates for nice templates. I've started introducing explicit template instantiation declarations and definitions as well because we really shouldn't be emitting all this everywhere. I'm going to go back and add the same for the other templates like this in a follow-up patch. I've left the analysis manager as an opaque type rather than using two IR units and requiring it to be an AnalysisManager template specialization. I think its important that users retain the ability to provide their own custom analysis management layer and provided it has the appropriate API everything should Just Work. llvm-svn: 262127
* AMDGPU: Add builtins for recently added intrinsicsMatt Arsenault2016-02-273-0/+41
| | | | llvm-svn: 262126
* DAGCombiner: Relax sqrt NaN folding checkMatt Arsenault2016-02-272-9/+21
| | | | | | This is OK for +0 since compares to +/-0 give the same result. llvm-svn: 262125
* AMDGPU: Fix broken/confusing predefined macroMatt Arsenault2016-02-272-1/+19
| | | | | | amdgcn should not be defining __R600__ llvm-svn: 262124
* AMDGPU: Fix inconsistent register name for flat_scratchMatt Arsenault2016-02-272-2/+17
| | | | llvm-svn: 262123
* Add __builtin_canonicalizeMatt Arsenault2016-02-274-0/+35
| | | | llvm-svn: 262122
* AMDGPU: Split vi-insts subtarget featureMatt Arsenault2016-02-273-6/+24
| | | | | | | This will be more useful for marking builtins acceptable for which subtargets. llvm-svn: 262121
* AMDGPU: Add s_sleep intrinsicMatt Arsenault2016-02-274-1/+67
| | | | llvm-svn: 262120
* AMDGPU: Implement readcyclecounterMatt Arsenault2016-02-2712-10/+148
| | | | | | | | | | This matches the behavior of the HSAIL clock instruction. s_realmemtime is used if the subtarget supports it, and falls back to s_memtime if not. Also introduces new intrinsics for each of s_memtime / s_memrealtime. llvm-svn: 262119
* CodeGen: Avoid implicit conversion in MachineInstrBuilder, NFCDuncan P. N. Exon Smith2016-02-271-2/+2
| | | | | | | | Avoid another implicit conversion from MachineInstrBundleIterator to MachineInstr*, this time in MachineInstrBuilder.h (this is in pursuit of PR26753). llvm-svn: 262118
* ScopInfo: Drop some debug statementsTobias Grosser2016-02-271-11/+1
| | | | | | | | | This debug output distracts from the -debug-only=polly-scops output. As it is rather verbose and only really needed for debugging the domain construction I drop this output. The domain construction is meanwhile stable enough to not require regular debugging. llvm-svn: 262117
* CodeGen: Remove implicit iterator to pointer conversions, NFCDuncan P. N. Exon Smith2016-02-271-2/+2
| | | | | | | Remove a couple of implicit conversions from MachineInstrBundleIterator to MachineInstr*. llvm-svn: 262116
* CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFCDuncan P. N. Exon Smith2016-02-2726-223/+229
| | | | | | | | | | | | | | Take MachineInstr by reference instead of by pointer in SlotIndexes and the SlotIndex wrappers in LiveIntervals. The MachineInstrs here are never null, so this cleans up the API a bit. It also incidentally removes a few implicit conversions from MachineInstrBundleIterator to MachineInstr* (see PR26753). At a couple of call sites it was convenient to convert to a range-based for loop over MachineBasicBlock::instr_begin/instr_end, so I added MachineBasicBlock::instrs. llvm-svn: 262115
* LoopGenerators: Expose some parts of the parallel loop generatorTobias Grosser2016-02-271-1/+8
| | | | | | | Some of this functionality is useful beyond the generation of a normal OpenMP loop. llvm-svn: 262114
* ScopInfo: Add function to invalidate ScopArrayInfo objectTobias Grosser2016-02-271-0/+8
| | | | | | | | | | | | In case the underlying basepointer of a ScopArrayInfo object is moved to another module while the scop is still processed is it necessary to free dependent ScopArrayInfo objects as they might otherwise be looked accidentally when a new llvm basepointer value is reassigned the very same memory location as the llvm value that has been moved earlier. This function is not yet used in Polly itself, but is useful for external users. llvm-svn: 262113
* [instrprof] Use __{start,stop}_SECNAME on PS4 too.Sean Silva2016-02-272-1/+6
| | | | | | | | | | | | | | | | | | | | | Summary: The PS4 linker seems to handle this fine. Hi David, it seems that indeed most ELF linkers support __{start,stop}_SECNAME, as our proprietary linker does as well. This follows the pattern of r250679 w.r.t. the testing. Maggie, Phillip, Paul: I've tested this with the PS4 SDK 3.5 toolchain prerelease and it seems to work fine. Reviewers: davidxl Subscribers: probinson, phillip.power, MaggieYi Differential Revision: http://reviews.llvm.org/D17672 llvm-svn: 262112
* [sancov] properly initializing pass.Mike Aizatsky2016-02-271-1/+6
| | | | llvm-svn: 262111
* [libFuzzer] don't emit callbacks to sanitizer run-time in ↵Kostya Serebryany2016-02-273-12/+16
| | | | | | -fsanitize-coverage=trace-pc mode; update libFuzzer doc for previous commit llvm-svn: 262110
* Suppress an uncovered switch warning [NFC]Philip Reames2016-02-271-0/+1
| | | | llvm-svn: 262109
* [LICM] Teach LICM how to handle cases where the alias set tracker wasChandler Carruth2016-02-272-20/+71
| | | | | | | | | | | | | | | | | | | | merged into a loop that was subsequently unrolled (or otherwise nuked). In this case it can't merge in the ASTs for any remaining nested loops, it needs to re-add their instructions dircetly. The fix is very isolated, but I've pulled the code for merging blocks into the AST into a single place in the process. The only behavior change is in the case which would have crashed before. This fixes a crash reported by Mikael Holmen on the list after r261316 restored much of the loop pass pipelining and allowed us to actually do this kind of nested transformation sequenc. I've taken that test case and further reduced it into the somewhat twisty maze of loops in the included test case. This does in fact trigger the bug even in this reduced form. llvm-svn: 262108
* [libFuzzer] fixing the botKostya Serebryany2016-02-271-1/+1
| | | | llvm-svn: 262106
* Fix bug in using shadow decl checking: a using shadow decl should not conflictRichard Smith2016-02-272-0/+29
| | | | | | | | | | | | | | | with a prior UsingDecl -- those should not even really be found by the lookup here, except that we use the same lookup results for two different checks, and the other check needs them. This happens to work in *almost all* cases, because either the lookup results list the UsingDecl first (and the NonTag result gets replaced by something else) or because the problematic declaration is a function (which causes us to use different logic to detect conflicts). This can also be triggered from a state only reachable through modules (where the name lookup results can contain multiple UsingDecls in the same scope). llvm-svn: 262105
* [sancov] print_coverage_points command.Mike Aizatsky2016-02-272-0/+38
| | | | | | Differential Revision: http://reviews.llvm.org/D17670 llvm-svn: 262104
* [sancov] do not instrument nodes that are full pre-dominatorsMike Aizatsky2016-02-271-11/+22
| | | | | | | | | | | Summary: Without tree pruning clang has 2,667,552 points. Wiht only dominators pruning: 1,515,586. With both dominators & predominators pruning: 1,340,534. Differential Revision: http://reviews.llvm.org/D17671 llvm-svn: 262103
* [libFuzzer] speedup path coverage handlingKostya Serebryany2016-02-272-18/+19
| | | | llvm-svn: 262102
* Update the fine-grain dependences analysis test case.Hongbin Zheng2016-02-271-10/+20
| | | | llvm-svn: 262101
* Enable llvm's isa/cast/dyn_cast on MemAccInst.Hongbin Zheng2016-02-273-25/+44
| | | | | | Differential Revision: http://reviews.llvm.org/D17250 llvm-svn: 262100
* Minor code cleanup. NFC.Junmo Park2016-02-271-1/+1
| | | | llvm-svn: 262096
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