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* [asan] Cleanup: Move tid into ErrorBase, add const to BufferedStackTrace, be ↵Filipe Cabecinhas2016-09-124-28/+27
| | | | | | | | | | | | | | | | consistent in constructor arguments and member order. Summary: As mentioned in D24394, I'm moving tid to ErrorBase, since basically all errors need it. Also mentioned in the same review are other cleanups like adding const to BufferedStackTrace and make sure constructor orders are consistent. Reviewers: vitalybuka, kcc, eugenis Subscribers: llvm-commits, kubabrecka Differential Revision: https://reviews.llvm.org/D24455 llvm-svn: 281236
* Store the size of the outermost dimension in case of newly created arrays ↵Roman Gareev2016-09-1213-50/+76
| | | | | | | | | | | | | that require memory allocation. We do not need the size of the outermost dimension in most cases, but if we allocate memory for newly created arrays, that size is needed. Reviewed-by: Michael Kruse <llvm@meinersbur.de> Differential Revision: https://reviews.llvm.org/D23991 llvm-svn: 281234
* llvm-size: Add --totals optionHemant Kulkarni2016-09-122-3/+41
| | | | | | Differential Revision: https://reviews.llvm.org/D24308 llvm-svn: 281233
* llvm-objdump: Add --start-address and --stop-address optionsHemant Kulkarni2016-09-123-4/+143
| | | | | | Differential Revision: https://reviews.llvm.org/D24160 llvm-svn: 281232
* [InstCombine] use m_APInt to allow icmp X, C folds for splat constant vectorsSanjay Patel2016-09-123-7/+6
| | | | | | isSignBitCheck could be changed to take a pointer param to avoid the 'UnusedBit' ugliness. llvm-svn: 281231
* AMDGPU: Do not clobber SCC in SIWholeQuadModeNicolai Haehnle2016-09-123-75/+247
| | | | | | | | | | Reviewers: arsenm, tstellarAMD, mareko Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D22198 llvm-svn: 281230
* [GlobalISel] Fix mismatched "<..)" in intrinsic MO printing. NFC.Ahmed Bougacha2016-09-121-2/+2
| | | | llvm-svn: 281229
* Revert "[ARM] Promote small global constants to constant pools"James Molloy2016-09-125-222/+1
| | | | | | This reverts commit r281213. It made a bot go bang: http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/14625 llvm-svn: 281228
* Trivial documentation fix regarding Obj-C ARC ↵Jonathan Roelofs2016-09-121-2/+2
| | | | | | | | | | | | | objc_arc_weak_reference_unavailable Fixed incorrect docs that referred to: objc_arc_weak_unavailable when it should be: objc_arc_weak_reference_unavailable Patch by: Sean McBride! llvm-svn: 281227
* Move StdStringExtractor to tools/debugserverPavel Labath2016-09-126-7/+4
| | | | | | | | The class is only used in the debugserver. The rest of lldb has the StringExtractor class. Xcode project will need to be updated after this. llvm-svn: 281226
* [SE] RegisteredHostMemory for async device copiesJason Henline2016-09-1211-302/+393
| | | | | | | | | | | | | | | | | | | Summary: Improve the error-prone interface that allows users to pass host pointers that haven't been registered to asynchronous copy methods. In CUDA, this is an extremely easy error to make, and instead of failing at runtime, it succeeds and gives the right answers by turning the async copy into a sync copy. So, you silently get a huge performance degradation if you misuse the old interface. This new interface should prevent that. Reviewers: jlebar Subscribers: jprice, beanz, parallel_libs-commits Differential Revision: https://reviews.llvm.org/D24353 llvm-svn: 281225
* [BranchFolding] Unique added live-ins after hoisting code.Ahmed Bougacha2016-09-122-1/+8
| | | | | | We're not supposed to have duplicate live-ins. llvm-svn: 281224
* [X86] Copy imp-uses when folding tailcall into conditional branch.Ahmed Bougacha2016-09-122-1/+85
| | | | | | | | | | | r280832 added 32-bit support for emitting conditional tail-calls, but dropped imp-used parameter registers. This went unnoticed until r281113, which added 64-bit support, as this is only exposed with parameter passing via registers. Don't drop the imp-used parameters. llvm-svn: 281223
* Simplify handling of /DISCARD/. NFC.Rafael Espindola2016-09-122-11/+8
| | | | llvm-svn: 281222
* [FunctionAttrs] Don't try to infer returned if it is already on an argumentDavid Majnemer2016-09-122-0/+17
| | | | | | | | | | | Trying to infer the 'returned' attribute if an argument is already 'returned' can lead to verification failure: inference might determine that a different argument is passed through which would result in two different arguments marked as 'returned'. This fixes PR30350. llvm-svn: 281221
* fix formatting; NFCSanjay Patel2016-09-121-14/+13
| | | | llvm-svn: 281220
* [InstCombine] add tests to show missing vector foldsSanjay Patel2016-09-122-1/+29
| | | | llvm-svn: 281219
* add select i1 test, reproduser pr30249.Igor Breger2016-09-121-0/+12
| | | | llvm-svn: 281218
* [InstCombine] add helper function for foldICmpUsingKnownBits; NFCISanjay Patel2016-09-122-259/+279
| | | | llvm-svn: 281217
* [AMDGPU] Assembler: Move disabled SDWA and DPP instruction into Disable asm ↵Sam Kolton2016-09-122-0/+12
| | | | | | | | | | | | | | variant Summary: This removes disabled instructions from match tables so we will not match them at all. Reviewers: tstellarAMD, vpykhtin, artem.tamazov Subscribers: wdng, nhaehnle, arsenm Differential Revision: https://reviews.llvm.org/D24452 llvm-svn: 281216
* [Thumb] Teach ISel how to lower compares of AND bitmasks efficientlyJames Molloy2016-09-129-26/+232
| | | | | | | | | | | | | For the common pattern (CMPZ (AND x, #bitmask), #0), we can do some more efficient instruction selection if the bitmask is one consecutive sequence of set bits (32 - clz(bm) - ctz(bm) == popcount(bm)). 1) If the bitmask touches the LSB, then we can remove all the upper bits and set the flags by doing one LSLS. 2) If the bitmask touches the MSB, then we can remove all the lower bits and set the flags with one LSRS. 3) If the bitmask has popcount == 1 (only one set bit), we can shift that bit into the sign bit with one LSLS and change the condition query from NE/EQ to MI/PL (we could also implement this by shifting into the carry bit and branching on BCC/BCS). 4) Otherwise, we can emit a sequence of LSLS+LSRS to remove the upper and lower zero bits of the mask. 1-3 require only one 16-bit instruction and can elide the CMP. 4 requires two 16-bit instructions but can elide the CMP and doesn't require materializing a complex immediate, so is also a win. llvm-svn: 281215
* fix formatting/typos; NFCSanjay Patel2016-09-122-12/+11
| | | | llvm-svn: 281214
* [ARM] Promote small global constants to constant poolsJames Molloy2016-09-125-1/+222
| | | | | | | | | | | | | | | | | | | | | | | | If a constant is unamed_addr and is only used within one function, we can save on the code size and runtime cost of an indirection by changing the global's storage to inside the constant pool. For example, instead of: ldr r0, .CPI0 bl printf bx lr .CPI0: &format_string format_string: .asciz "hello, world!\n" We can emit: adr r0, .CPI0 bl printf bx lr .CPI0: .asciz "hello, world!\n" This can cause significant code size savings when many small strings are used in one function (4 bytes per string). llvm-svn: 281213
* [LoopInterchange] Improve debug output. NFC.Chad Rosier2016-09-121-2/+2
| | | | llvm-svn: 281212
* Fix the Thumb test for vfloat intrinsicsPablo Barrio2016-09-121-55/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This test was not testing the intrinsics. A function like this: define %v4f32 @test_v4f32.floor(%v4f32 %a){ ... %1 = call %v4f32 @llvm.floor.v4f32(%v4f32 %a) ... } is transformed into the following assembly: _test_v4f32.floor: @ @test_v4f32.floor ... bl _floorf ... In each function tested, there are two CHECK: one that checked for the label and another one for the intrinsic that should be used inside the function (in our case, "floor"). However, although the first CHECK was matching the label, the second was not matching the intrinsic, but the second "floor" in the same line as the label. This is fixed by making the first CHECK match the entire line. Reviewers: jmolloy, rengolin Subscribers: rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D24398 llvm-svn: 281211
* Store an ArrayRef for Data in InputSectionData.Rafael Espindola2016-09-125-36/+34
| | | | llvm-svn: 281210
* Revert "Revert "Compact InputSectionData from 64 to 48 bytes. NFC.""Rafael Espindola2016-09-122-5/+9
| | | | | | | | This reverts commit r281096. The previous link errors should be fixed by r281208. llvm-svn: 281209
* Define a dummy zlib::uncompress when zlib is not available.Rafael Espindola2016-09-121-0/+4
| | | | | | Should fix link errors in some bots when it is used. llvm-svn: 281208
* GlobalISel: support translation of global addresses.Tim Northover2016-09-126-0/+63
| | | | llvm-svn: 281207
* [clang-tidy] readability-misplaced-array-index: add new check that warns ↵Daniel Marjamaki2016-09-128-0/+164
| | | | | | | | | | when array index is misplaced. Reviewers: alexfh Differential Revision: https://reviews.llvm.org/D21134 llvm-svn: 281206
* GlobalISel: translate GEP instructions.Tim Northover2016-09-127-1/+216
| | | | | | | | Unlike SDag, we use a separate G_GEP instruction (much simplified, only taking a single byte offset) to preserve the pointer type information through selection. llvm-svn: 281205
* GlobalISel: disambiguate types when printing MIRTim Northover2016-09-1213-102/+139
| | | | | | | | | | | | | | | | | Some generic instructions have multiple types. While in theory these always be discovered by inspecting the single definition of each generic vreg, in practice those definitions won't always be local and traipsing through a big function to find them will not be fun. So this changes MIRPrinter to print out the type of uses as well as defs, if they're known to be different or not known to be the same. On the parsing side, we're a little more flexible: provided each register is given a type in at least one place it's mentioned (and all types are consistent) we accept the MIR. This doesn't introduce ambiguity but makes writing tests manually a bit less painful. llvm-svn: 281204
* clang-format: Make emacs integration work with narrowed buffers.Daniel Jasper2016-09-121-1/+1
| | | | | | | | | Use (call-process region nil ...) instead of (point-min) so that the call works in narrowed buffers. Patch by Philipp Stephani, thank you! llvm-svn: 281203
* [ELF/AArch64] Implement some UABS relocsEugene Leviant2016-09-123-1/+35
| | | | | | Differential revision: https://reviews.llvm.org/D24403 llvm-svn: 281202
* Fix WebAssembly broken build related to interface change in r281172.Eric Liu2016-09-121-2/+1
| | | | | | | | | | Reviewers: bkramer Subscribers: jfb, llvm-commits, dschuff Differential Revision: https://reviews.llvm.org/D24449 llvm-svn: 281201
* [CFG] Add iterator_ranges to CFG and CFGBlock.Martin Bohme2016-09-121-0/+25
| | | | | | | | | | | | Summary: (Needed for D23353.) Reviewers: alexfh Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D23842 llvm-svn: 281200
* Add MiSyntaxTestCase.test_lldbmi_output_grammar test (MI)Ilia K2016-09-122-3/+101
| | | | | | | | | | | | Summary: This patch adds a new test and fixes extra new-line before exit Reviewers: abidh Subscribers: ki.stfu, dawn, lldb-commits, abidh Differential Revision: https://reviews.llvm.org/D9740 llvm-svn: 281199
* Add virtual destructor (necessary due to the switch to shared_ptr).Richard Smith2016-09-121-0/+1
| | | | llvm-svn: 281198
* Attempt #3 to placate MSVC.Richard Smith2016-09-121-4/+6
| | | | llvm-svn: 281197
* AVX-512: Added a test case that should be optimized in the future. NFC.Elena Demikhovsky2016-09-121-13/+48
| | | | llvm-svn: 281196
* Attempt #2 to placate MSVCRichard Smith2016-09-121-0/+2
| | | | llvm-svn: 281195
* Attempt to placate MSVC.Richard Smith2016-09-121-1/+3
| | | | llvm-svn: 281194
* GPGPU: Bail out gracefully in case of invalid IRTobias Grosser2016-09-122-4/+91
| | | | | | | | | | | Instead of aborting, we now bail out gracefully in case the kernel IR we generate is invalid. This can currently happen in case the SCoP stores pointer values, which we model as arrays, as data values into other arrays. In this case, the original pointer value is not available on the device and can consequently not be stored. As detecting this ahead of time is not so easy, we detect these situations after the invalid IR has been generated and bail out. llvm-svn: 281193
* Add a mode to clang-tblgen to generate reference documentation for warning andRichard Smith2016-09-1210-4/+11061
| | | | | | | | remark flags. For now I'm checking in a copy of the built documentation, but we can replace this with a placeholder (as we do for the attributes reference documentation) once we enable building this server-side. llvm-svn: 281192
* Fix about a dozen compile warningsIlia K2016-09-128-23/+25
| | | | | | | | | | | | | | | | | | | | | | Summary: It fixes the following compile warnings: 1. '0' flag ignored with precision and ‘%d’ gnu_printf format 2. enumeral and non-enumeral type in conditional expression 3. format ‘%d’ expects argument of type ‘int’, but argument 4 has type ... 4. enumeration value ‘...’ not handled in switch 5. cast from type ‘const uint64_t* {aka ...}’ to type ‘int64_t* {aka ...}’ casts away qualifiers 6. extra ‘;’ 7. comparison between signed and unsigned integer expressions 8. variable ‘register_operand’ set but not used 9. control reaches end of non-void function Reviewers: jingham, emaste, zturner, clayborg Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D24331 llvm-svn: 281191
* llvm/test/CodeGen/AMDGPU/infinite-loop-evergreen.ll REQUIRES +Asserts.NAKAMURA Takumi2016-09-121-0/+1
| | | | | | This might not *crash* with -Asserts. I saw it caused infinite loop in the codegen. llvm-svn: 281190
* [MS ABI] Add /include directives for dynamic TLSDavid Majnemer2016-09-122-0/+13
| | | | | | | | | MSVC emits /include directives in the .drective section for the __dyn_tls_init function (decorated as ___dyn_tls_init@12 for 32-bit). This fixes PR30347. llvm-svn: 281189
* MC: Move MCSection::begin/end to header, NFCDuncan P. N. Exon Smith2016-09-122-24/+8
| | | | llvm-svn: 281188
* [InstCombine] add helper function for folding {and,or,xor} (cast X), C ; NFCISanjay Patel2016-09-121-28/+41
| | | | llvm-svn: 281187
* [InstCombine] regenerate checksSanjay Patel2016-09-121-52/+55
| | | | llvm-svn: 281186
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