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* [Support] Avoid normalization in sys::getDefaultTargetTriplePetr Hosek2018-05-253-3/+4
| | | | | | | | | | | | | | | | | | | | | | The return value of sys::getDefaultTargetTriple, which is derived from -DLLVM_DEFAULT_TRIPLE, is used to construct tool names, default target, and in the future also to control the search path directly; as such it should be used textually, without interpretation by LLVM. Normalization of this value may lead to unexpected results, for example if we configure LLVM with -DLLVM_DEFAULT_TARGET_TRIPLE=x86_64-linux-gnu, normalization will transform that value to x86_64--linux-gnu. Driver will use that value to search for tools prefixed with x86_64--linux-gnu- which may be confusing. This is also inconsistent with the behavior of the --target flag which is taken as-is without any normalization and overrides the value of LLVM_DEFAULT_TARGET_TRIPLE. Users of sys::getDefaultTargetTriple already perform their own normalization as needed, so this change shouldn't impact existing logic. Differential Revision: https://reviews.llvm.org/D47153 llvm-svn: 333307
* [MemorySanitizer] fix mmap test for oses not implementing MAP_NORESERVE flagDavid Carlier2018-05-251-1/+5
| | | | | | | | | | Reviewers: krytarowski, eugenis Reviewed By: eugenis Differential Revision: https://review.llvm.org/D47146 llvm-svn: 333306
* [CodeGenPrepare] Revert r331783Guozhi Wei2018-05-255-172/+20
| | | | | | The patch r331783 caused regression in one of our internal application. So revert it now, will investigate it further. llvm-svn: 333305
* Move SystemInitializerFull header to source/APIAlex Langford2018-05-253-2/+4
| | | | | | | | | | | | | | | | | | | Summary: It seems to me that files in include/lldb/API/ are headers that should be exposed to liblldb users. Because SystemInitializerFull.h exposes details of lldb_private, I think having it there is not the right thing to do. Since it's only included from files in source/API, we should move it there and treat it as private. Reviewers: labath, clayborg Reviewed By: labath, clayborg Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D47342 llvm-svn: 333304
* [AMDGPU][Waitcnt] Remove obsolete waitcnt optionMark Searles2018-05-252-8/+2
| | | | | | | | With the removal of the old waitcnt pass, the '-enable-si-insert-waitcnts' option is obsolete. Remove it. Differential Revision: https://reviews.llvm.org/D47378 llvm-svn: 333303
* Convert clang-interpreter to ORC JIT APIStephane Sezer2018-05-256-506/+84
| | | | | | | | | | | | | | Summary: This mostly re-uses code from the KaleidoscopeJIT example. Reviewers: ddunbar, lhames Reviewed By: lhames Subscribers: mgrang, alexshap, mgorny, xiaobai, cfe-commits Differential Revision: https://reviews.llvm.org/D45897 llvm-svn: 333302
* [OPENMP, NVPTX] Fixed codegen for orphaned parallel region.Alexey Bataev2018-05-252-34/+23
| | | | | | | | | | | | | | If orphaned parallel region is found, the next code must be emitted: ``` if(__kmpc_is_spmd_exec_mode() || __kmpc_parallel_level(loc, gtid)) Serialized execution. else if (IsMasterThread()) Prepare and signal worker. else Outined function call. ``` llvm-svn: 333301
* Recommit r333226 "[ValueTracking] Teach computeKnownBits that the result of ↵Craig Topper2018-05-253-8/+25
| | | | | | | | | | | | | | | | an absolute value pattern that uses nsw flag is always positive." Libfuzzer tests have been fixed to prevent being optimized. Original commit message: If the nsw flag is used in the absolute value then it is undefined for INT_MIN. For all other value it will produce a positive number. So we can assume the result is positive. This breaks some InstCombine abs/nabs combining tests because we simplify the second compare from known bits rather than as the whole pattern. Looks like we can probably fix it by adding a neg+abs/nabs combine to just swap the select operands. N Differential Revision: https://reviews.llvm.org/D47041 llvm-svn: 333300
* Fix typo in CMake commentsAlex Langford2018-05-251-2/+2
| | | | llvm-svn: 333299
* [AMDGPU] Fixed test failure with AMDGPUPerfHintStanislav Mekhanoshin2018-05-251-8/+7
| | | | | | | We shall not keep iterator to a map while map is modified, this leads to a broken map. llvm-svn: 333298
* [llvm-mca] Update the header's guard name. NFC.Matt Davis2018-05-251-3/+3
| | | | | | This patch also places a comment at the end of the header guard. llvm-svn: 333297
* [llvm-mca] Update DispatchStage header comment. NFC.Matt Davis2018-05-252-3/+10
| | | | | | Updated the comment to be a wee bit more descriptive. llvm-svn: 333296
* [libFuzzer] Avoid optimization of "abs(x) < 0"Vitaly Buka2018-05-252-2/+4
| | | | llvm-svn: 333295
* Fix a bug that we truncated GOTPLT entries to 32 bits.Rui Ueyama2018-05-252-1/+17
| | | | llvm-svn: 333294
* [Tablegen][SubtargetEmitter] Add a default case to the auto-generated switch ↵Andrea Di Biagio2018-05-251-1/+3
| | | | | | in MCSubtargetInfo::resolveVariantSchedClass(). NFC llvm-svn: 333293
* [llvm-mca] Add the RetireStage. Matt Davis2018-05-2511-82/+175
| | | | | | | | | | | | | | | | | Summary: This class maintains the same logic as the original RetireControlUnit. This is just an intermediate patch to make the RCU a Stage. Future patches will remove the dependency on the DispatchStage, and then more properly populate the pre/execute/post Stage interface. Reviewers: andreadb, RKSimon, courbet Reviewed By: andreadb, courbet Subscribers: javed.absar, mgorny, tschuett, gbedwell, llvm-commits Differential Revision: https://reviews.llvm.org/D47244 llvm-svn: 333292
* Fix -Winconsistent-missing-overrides in AMDGPU codeReid Kleckner2018-05-251-1/+1
| | | | llvm-svn: 333291
* Follow-up fix for nonnull atomic non-member functionsJF Bastien2018-05-252-3/+68
| | | | | | | | Handling of the third parameter was only checking for *_n and not for the C11 variant, which means that cmpxchg of a 'desired' 0 value was erroneously warning. Handle C11 properly, and add extgensive tests for this as well as NULL pointers in a bunch of places. Fixes r333246 from D47229. llvm-svn: 333290
* [AMDGPU] Add perf hints to functionsStanislav Mekhanoshin2018-05-2512-12/+605
| | | | | | | | | | | | | | | This is adoption of HSAIL perfhint pass. Two types of hints are produced: 1. Function is memory bound. 2. Kernel can use wave limiter. Currently these hints are used in the scheduler. If a function is suspected to be memory bound we allow occupancy to decrease to 4 waves in the course of scheduling. Differential Revision: https://reviews.llvm.org/D46992 llvm-svn: 333289
* [mips] Fix the definitions of lwp, swpSimon Dardis2018-05-255-68/+26
| | | | | | | | | | | | | Rather than using a regpair operand of these instructions, use two seperate operands and a custom converter to handle the implicit second register operand. Additionally, remove the microMIPS32R6 definition as its redundant. Reviewers: atanasyan, abeserminji, smaksimovic Differential Revision: https://reviews.llvm.org/D47255 llvm-svn: 333288
* Remove DWARFUnit::ClearDIEs parameter keep_compile_unit_dieJan Kratochvil2018-05-253-7/+6
| | | | | | | It has been now always passed as true and during planned D46810 it would no longer make sense. llvm-svn: 333287
* [RFC][Patch 2/3] Add a MCSubtargetInfo hook to resolve variant scheduling ↵Andrea Di Biagio2018-05-253-1/+86
| | | | | | | | | | | | | | | | | | | | classes. This patch is the second of a sequence of three patches related to LLVM-dev RFC "MC support for varinat scheduling classes". https://lists.llvm.org/pipermail/llvm-dev/2018-May/123181.html The goal of this patch is to enable the resolution of variant classes in MC with the help of a new method named `MCSubtargetInfo::resolveVariantSchedClass()`. This patch also teaches the SubtargetEmitter how to automatically generate the definition of method resolveVariantSchedClass(). That definition is emitted within a sub-class of MCSubtargetInfo named XXXGenMCSubtargetInfo (where XXX is the name of the Target). Differential Revision: https://reviews.llvm.org/D47077 llvm-svn: 333286
* [libomptarget-nvptx] loop: Determine if runtime uninitializedJonas Hahnfeld2018-05-251-38/+42
| | | | | | | | | | | | | | | | | | | | The generic entry points for static loop scheduling previously hardcoded that the runtime was initialized. This can be wrong if the compiler analyzes that the runtime is not needed and calls the init functions accordingly. This didn't affect clang-ykt because they have entry points for different combinations of SPMD x Runtime not needed. I didn't do measurements yet but with inlining we might get away with always calling the generic interface and letting compiler and runtime figure out the rest. In any case, a correct runtime is always better than having functions that may only be called if previous calls passed in a specific set of arguments! Differential Revision: https://reviews.llvm.org/D47131 llvm-svn: 333285
* [CMake] Unify install path for librariesJonas Hahnfeld2018-05-256-12/+14
| | | | | | | | | | Introduce OPENMP_INSTALL_LIBDIR and use in all install() commands. This also fixes installation of libomptarget-nvptx that previously didn't honor {OPENMP,LLVM}_LIBDIR_SUFFIX. Differential Revision: https://reviews.llvm.org/D47130 llvm-svn: 333284
* [Sema] Add tests for weak functionsJonas Hahnfeld2018-05-251-0/+3
| | | | | | | | I found these checks to be missing, just add some simple cases. Differential Revision: https://reviews.llvm.org/D47200 llvm-svn: 333283
* [RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes.Andrea Di Biagio2018-05-258-36/+659
| | | | | | | | | | | | | | | | | | | | | | This patch is the first of a sequence of three patches described by the LLVM-dev RFC "MC support for variant scheduling classes". http://lists.llvm.org/pipermail/llvm-dev/2018-May/123181.html The goal of this patch is to introduce a new class of scheduling predicates for SchedReadVariant and SchedWriteVariant. An MCSchedPredicate can be used instead of a normal SchedPredicate to model checks on the instruction (either a MachineInstr or a MCInst). Internally, an MCSchedPredicate encapsulates an MCInstPredicate definition. MCInstPredicate allows the definition of expressions with a well-known semantic, that can be used to generate code for both MachineInstr and MCInst. This is the first step toward teaching to tools like lllvm-mca how to resolve variant scheduling classes. Differential Revision: https://reviews.llvm.org/D46695 llvm-svn: 333282
* [NFC] Restructure linkage name printing in AsmWriterTeresa Johnson2018-05-251-31/+40
| | | | | | | | | This restructuring was suggested in the review for D46699, which prepares the linkage type printer for use in printing the ThinLTO summary index (where we want to print "external" and also don't want a space after the linkage type as it is printed by the caller). llvm-svn: 333281
* [clangd] Temporarily disable the test that crashes under asan.Ilya Biryukov2018-05-251-1/+2
| | | | | | | | | It turns out that our fix did not solve the problem completely and the crash due to stale preamble is still there under asan. Disabling the test for now, will reenable it when landing a proper fix for the problem. llvm-svn: 333280
* [Hexagon] Fix packing source vectors in shufflevector selection Krzysztof Parzyszek2018-05-252-3/+21
| | | | | | | | When the shuffle mask selected a subvector of the second input vector, and aligning of the source was performed, the shuffle mask was updated incorrectly, resulting in an ICE further in the selection process. llvm-svn: 333279
* [analyzer] Added a getLValue method to ProgramState for basesKristof Umann2018-05-251-0/+23
| | | | | | Differential Revision: https://reviews.llvm.org/D46891 llvm-svn: 333278
* Add llvm-bcanalyzer as an LLD test dependencyJames Henderson2018-05-251-1/+1
| | | | | | | | | | | | Recently an LLD test change was made that introduced the use of llvm-bcanalyzer. This change adds the tool to the list of LLD test dependencies. Reviewed by: rdhindsa, ruiu Patch by Owen Reynolds. llvm-svn: 333277
* Fix members initialization order in constructor (fails with -Werror)Ivan Donchevskii2018-05-251-3/+3
| | | | llvm-svn: 333276
* [analyzer] Added template argument lists to the Pathdiagnostic outputKristof Umann2018-05-253-2/+133
| | | | | | | | | | | Because template parameter lists were not displayed in the plist output, it was difficult to decide in some cases whether a given checker found a true or a false positive. This patch aims to correct this. Differential Revision: https://reviews.llvm.org/D46933 llvm-svn: 333275
* [MustExecute] Fix a debug invariant issue in isGuaranteedToExecute()David Stenberg2018-05-252-1/+54
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: Look past debug intrinsics when querying whether an instruction is the first instruction in the header block. The commit includes a reproducer for a case where LICM would not hoist an instruction, due to the presence of the intrinsic. A caveat with this commit is that the check will not work properly if the instruction at hand is a debug intrinsic. I assume that no one depends on isGuaranteedToExecute() to return true for debug intrinsics for these cases (and that this might be an indication of another debug invariant issue), so I thought that it was not worth adding that extra bit of complexity. Reviewers: reames, anna Reviewed By: anna Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D47197 llvm-svn: 333274
* Fix format stringBenjamin Kramer2018-05-251-1/+1
| | | | | | | PRIx64 already has the x inside, so this was creating a nonsensical format string. llvm-svn: 333273
* Optionally add code completion results for arrow instead of dotIvan Donchevskii2018-05-2510-93/+251
| | | | | | | | | | | | | Currently getting such completions requires source correction, reparsing and calling completion again. And if it shows no results and rollback is required then it costs one more reparse. With this change it's possible to get all results which can be later filtered to split changes which require correction. Differential Revision: https://reviews.llvm.org/D41537 llvm-svn: 333272
* [X86][SNB] Fix differences between vex/non-vex XMM vector moves (PR37286)Simon Pilgrim2018-05-254-32/+24
| | | | | | | | As confirmed by llvm-exegesis, there is no scheduler difference between MOVDQA/MOVDQU and VMOVDQA/VMOVDQU xmm reg-reg moves Another chapter in the never ending crusade to remove useless InstRW overrides from the x86 scheduler models...... llvm-svn: 333271
* Fix ubsan errors introduced by r333263 re. left-shifting negative values.Sander de Smalen2018-05-251-2/+3
| | | | llvm-svn: 333270
* [ASTImporter] Fix ClassTemplateSpecialization in wrong DCGabor Marton2018-05-252-3/+7
| | | | | | | | | | | | | | Summary: ClassTemplateSpecialization is put in the wrong DeclContex if implicitly instantiated. This patch fixes it. Reviewers: a.sidorin, r.stahl, xazax.hun Subscribers: rnkovacs, dkrupp, cfe-commits Differential Revision: https://reviews.llvm.org/D47058 llvm-svn: 333269
* [IPSCCP] Use PredicateInfo to propagate facts from cmp instructions.Florian Hahn2018-05-259-15/+223
| | | | | | | | | | | | | | | | | This patch updates IPSCCP to use PredicateInfo to propagate facts to true branches predicated by EQ and to false branches predicated by NE. As a follow up, we should be able to extend it to also propagate additional facts about nonnull. Reviewers: davide, mssimpso, dberlin, efriedma Reviewed By: davide, dberlin Differential Revision: https://reviews.llvm.org/D45330 llvm-svn: 333268
* [llvm-objcopy] Add --strip-unneeded optionPaul Semel2018-05-255-3/+179
| | | | | | Differential Revision: https://reviews.llvm.org/D46896 llvm-svn: 333267
* ManualDWARFIndex: Fix misclassification of methods in unionsPavel Labath2018-05-254-8/+39
| | | | | | | Apple index was already treating them as methods. Not doing the same seems like an omission. llvm-svn: 333266
* Fix ODR violation from r333230Krasimir Georgiev2018-05-251-6/+2
| | | | | | This is an ODR violation, for example in ExecutionEngine/MCJIT/MCJIT.o: multiple definition of 'LLVMCreateIntelJITEventListener'. llvm-svn: 333265
* ManualDWARFIndex: reduce long parameter listsPavel Labath2018-05-252-117/+93
| | | | | | | | | Several functions were passing a list of 8 NameToDIE arguments around. This puts those variables in a struct and passes that instead, reducing code duplication and the possibility of error (swapping two arguments accidentally). llvm-svn: 333264
* [AArch64][SVE] Asm: Support for DUP (immediate) instructions.Sander de Smalen2018-05-2513-30/+746
| | | | | | | | | | | | | | | | | | | | | | | | | | Unpredicated copy of optionally-shifted immediate to SVE vector, along with MOV-aliases. This patch contains parsing and printing support for cpy_imm8_opt_lsl_(i8|i16|i32|i64). This operand allows a signed value in the range -128 to +127. For element widths of 16 bits or higher it may also be a signed multiple of 256 in the range -32768 to +32512. For element-width of 8 bits a range of -128 to 255 is accepted, since a copy of a byte can be considered either signed/unsigned. Note: This patch renames tryParseAddSubImm() -> tryParseImmWithOptionalShift() and moves the behaviour of trying to shift a plain immediate by an allowed shift-value to its addImmWithOptionalShiftOperands() method, so that the parsing itself is generic and allows immediates from multiple shifted operands. This is done because an immediate can be divisible by both shifted operands. Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar Reviewed By: fhahn Differential Revision: https://reviews.llvm.org/D47309 llvm-svn: 333263
* [SystemZ] Bugfix in combineSTORE().Jonas Paulsson2018-05-252-1/+20
| | | | | | | | Remember to check if store is truncating before calling combineTruncateExtract(). Review: Ulrich Weigand llvm-svn: 333262
* [RegUsageInfoCollector] Bugfix for callee saved registers.Jonas Paulsson2018-05-252-11/+93
| | | | | | | | | | | | | | | | | | | | | | | Previously, this pass would look at the (static) set returned by getCallPreservedMask() and add those back as preserved in the case when isSafeForNoCSROpt() returns false. A problem is that a target may have to save some registers even when NoCSROpt takes place. For instance, on SystemZ, the return register is needed upon return from a function. Furthermore, getCallPreservedMask() only includes the registers that the target actually wishes to emit save/restore instructions for. This means that subregs and (fully saved) superregs are missing. This patch instead takes the (dynamic) set returned by target for the function from determineCalleeSaves() and then adds sub/super regs to build the set to be used when building the RegMask for the function. Review: Quentin Colombet, Ulrich Weigand https://reviews.llvm.org/D46315 llvm-svn: 333261
* [AMDGPU] Fixed incorrect break from loopTim Renouf2018-05-254-5/+141
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Lower control flow did not correctly handle the case that a loop break in if/else was on a condition that was not guaranteed to be masked by exec. The first test kernel shows an example of this going wrong; after exiting the loop, exec is all ones, even if it was not before the loop. The fix is for lowering of if-break and else-break to insert an S_AND_B64 to mask the break condition with exec. This commit also includes the optimization of not inserting that S_AND_B64 if it is obviously not needed because the break condition is the result of a V_CMP in the same basic block. V2: Addressed some review comments. V3: Test fixes. Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D44046 Change-Id: I0fc56a01209a9e99d1d5c9b0ffd16f111caf200c llvm-svn: 333258
* Revert "[libFuzzer] [NFC] Generalize DSO tests to work even when files are ↵Vitaly Buka2018-05-252-8/+8
| | | | | | | | | | moved." Breaks libFuzzer tests. This reverts commit r333243. llvm-svn: 333257
* [x86] invpcid intrinsicGabor Buella2018-05-2512-0/+88
| | | | | | | | | | | | An intrinsic for an old instruction, as described in the Intel SDM. Reviewers: craig.topper, rnk Reviewed By: craig.topper, rnk Differential Revision: https://reviews.llvm.org/D47142 llvm-svn: 333256
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