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* Added gdb-remote tests around $qSupported.Todd Fiala2014-06-101-1/+77
| | | | | | | Right now it just checks that qSupported returns at least one recognized gdb stub feature. llvm-svn: 210573
* Fix error in tablegen when either operand of !if is an empty list.Matt Arsenault2014-06-103-7/+16
| | | | | | !if([Something], []) would error with "No type for list". llvm-svn: 210572
* Fix typos.Eric Christopher2014-06-102-2/+2
| | | | llvm-svn: 210571
* Fix mangling of __uuidof after two levels of template instantiationReid Kleckner2014-06-102-0/+17
| | | | llvm-svn: 210570
* R600: Use BCNT_INT for evergreenMatt Arsenault2014-06-105-5/+67
| | | | llvm-svn: 210569
* R600/SI: Implement i64 ctpopMatt Arsenault2014-06-106-1/+155
| | | | llvm-svn: 210568
* R600/SI: Use bcnt instruction for ctpopMatt Arsenault2014-06-107-11/+230
| | | | llvm-svn: 210567
* Use an enum class now that they are available.Rafael Espindola2014-06-101-20/+12
| | | | llvm-svn: 210566
* Objective-C. Don't ignore availability attribute whenFariborz Jahanian2014-06-102-1/+22
| | | | | | | doing Objective-C subscript access. // rdar://16842487 PR19682. llvm-svn: 210565
* R600: Handle fcopysignMatt Arsenault2014-06-107-3/+114
| | | | llvm-svn: 210564
* R600/SI: Handle sign_extend and zero_extend to i64 with patterns.Matt Arsenault2014-06-104-49/+92
| | | | llvm-svn: 210563
* Mark assign to be constepr only in c++14; can't have constexpr fns that ↵Marshall Clow2014-06-101-1/+1
| | | | | | return void in C++11 llvm-svn: 210562
* Make the helper routines in string really be constexpr. This required a bit ↵Marshall Clow2014-06-102-48/+60
| | | | | | of refacoring in algorithm as well. Give them better names while we're at it. All of these are internal rotines; no visible functionality change. llvm-svn: 210561
* A bunch of the char.traits tests were using unicode literals. #ifdef those ↵Marshall Clow2014-06-1018-0/+36
| | | | | | bits out on c++03, since it doesn't support u"" and U "" style strings. llvm-svn: 210560
* Add a FIXME.Eric Christopher2014-06-101-0/+2
| | | | llvm-svn: 210559
* Update Arcanist config to point to reviews.llvm.orgDavid Blaikie2014-06-101-1/+1
| | | | llvm-svn: 210558
* Move AArch64SelectionDAGInfo down to the subtarget.Eric Christopher2014-06-104-4/+6
| | | | llvm-svn: 210557
* [FastISel] Collect statistics about failing intrinsic calls.Juergen Ributzka2014-06-101-1/+50
| | | | | | | Add more instruction-specific statistics about failing intrinsic calls during FastISel. llvm-svn: 210556
* Remove the cached little endian variable. We can get it easily offEric Christopher2014-06-102-7/+4
| | | | | | of the DataLayout. llvm-svn: 210555
* Have AArch64SelectionDAGInfo take a DataLayout parameter ratherEric Christopher2014-06-103-4/+4
| | | | | | than a TargetMachine. llvm-svn: 210554
* Remove caching of the subtarget for AArch64SelectionDAGInfo.Eric Christopher2014-06-102-7/+4
| | | | llvm-svn: 210553
* Move DataLayout onto the AArch64 subtarget.Eric Christopher2014-06-104-11/+15
| | | | llvm-svn: 210552
* Test commit, wraps some lines to fit in 80 columns.Zachary Turner2014-06-101-2/+4
| | | | llvm-svn: 210551
* Don't inherit dll attributes to deleted methods (PR19988)Hans Wennborg2014-06-102-3/+10
| | | | | | | | | | | | | We would previously end up with an error when instantiating the following template: template <typename> struct __declspec(dllimport) S { void foo() = delete; }; S<int> s; error: attribute 'dllimport' cannot be applied to a deleted function llvm-svn: 210550
* Move AArch64FrameLowering into the subtarget.Eric Christopher2014-06-104-5/+11
| | | | llvm-svn: 210549
* Remove the uses of AArch64TargetMachine and AArch64Subtarget fromEric Christopher2014-06-105-16/+9
| | | | | | AArch64FrameLowering. llvm-svn: 210548
* Objective-C IRGen. Patch to generate a weak symbol reference whenFariborz Jahanian2014-06-102-4/+19
| | | | | | | | 'super' dispatches a class method in category for OBJC_METACLASS. This is when class is a weak_import class. // rdar://16529125 llvm-svn: 210547
* Do Materialize Floating Point in Mips Fast-IselReed Kotler2014-06-102-2/+61
| | | | | | | | | | | | | | | | | Summary: Implement materialize of floating point literals in Mips Fast-Isel Reopened version of D3659 Test Plan: simplestorefp1.ll Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4071 llvm-svn: 210546
* [X86] Improved target combine rules for selecting horizontal add/sub.Andrea Di Biagio2014-06-102-3/+105
| | | | | | | | | | | | | This patch slightly changes the algorithm introduced at revision 210477 to fix a problem where the algorithm was producing incorrect code for the VEX.256 encoded versions of horizontal add/sub. For these cases, we now try to split the two 256-bit vectors into 128-bit chunks before emitting horizontal add/sub dag nodes. Added a new test case into haddsub-2.ll. llvm-svn: 210545
* Hexagon: Expand i1 SELECT_CCTom Stellard2014-06-101-0/+1
| | | | | | | | il is legal for Hexagon, so I should have marked this as Expand for SELECT_CC when I removed setOperationAction(ISD::SELECT_CC, MVT::Other, Expand); in r210541. llvm-svn: 210544
* [X86] AVX512: Add vmovntdqaAdam Nemet2014-06-104-0/+30
| | | | | | Along with the corresponding intrinsic and tests. llvm-svn: 210543
* Fix a bug in the Thumb1 ARM Load/Store optimizerRenato Golin2014-06-102-7/+24
| | | | | | | | | | | | | | Previously, the basic block was searched for future uses of the base register, and if necessary any writeback to the base register was reset using a SUB instruction (e.g. before calling a function) just before such a use. However, this step happened *before* the merged LDM/STM instruction was built. So if there was (e.g.) a function call directly after the not-yet-formed LDM/STM, the pass would first insert a SUB instruction to reset the base register, and then (at the same location, incorrectly) insert the LDM/STM itself. This patch fixes PR19972. Patch by Moritz Roth. llvm-svn: 210542
* SelectionDAG: Don't use MVT::Other to determine legality of ISD::SELECT_CCTom Stellard2014-06-107-33/+25
| | | | | | | | | | | | | The SelectionDAG bad a special case for ISD::SELECT_CC, where it would allow targets to specify: setOperationAction(ISD::SELECT_CC, MVT::Other, Expand); to indicate that they wanted to expand ISD::SELECT_CC for all types. This wasn't applied correctly everywhere, and it makes writing new DAG patterns with ISD::SELECT_CC difficult. llvm-svn: 210541
* SelectionDAG: Enable (and (setcc x), (setcc y)) -> (setcc (and x, y)) for ↵Tom Stellard2014-06-101-4/+4
| | | | | | | | | | vectors This prevents a future commit from regressing: test/CodeGen/R600/setcc-equivalent.ll llvm-svn: 210540
* SelectionDAG: Expand SELECT_CC to SELECT + SETCCTom Stellard2014-06-109-58/+34
| | | | | | | | This consolidates code from the Hexagon, R600, and XCore targets. No functionality change intended. llvm-svn: 210539
* Test delinearization of 2D diagonal matrixTobias Grosser2014-06-101-0/+39
| | | | llvm-svn: 210538
* clang-format: [JS] Treat dict literals similar to objc method exprs.Daniel Jasper2014-06-104-13/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before: return { link: function() { f(); // } }; return { a: a, link: function() { f(); // } } After: return { link: function() { f(); // } }; return { a: a, link: function() { f(); // } }; llvm-svn: 210537
* [PPC64LE] Recognize shufflevector patterns for little endianBill Schmidt2014-06-104-84/+342
| | | | | | | | | | | | | | | | | Various masks on shufflevector instructions are recognizable as specific PowerPC instructions (vector pack, vector merge, etc.). There is existing code in PPCISelLowering.cpp to recognize the correct patterns for big endian code. The masks for these instructions are different for little endian code due to the big-endian numbering employed by these instructions. This patch adds the recognition code for little endian. I've added a new test case test/CodeGen/PowerPC/vec_shuffle_le.ll for this. The existing recognizer test (vec_shuffle.ll) is unnecessarily verbose and difficult to read, so I felt it was better to add a new test rather than modify the old one. llvm-svn: 210536
* [AArch64] Emit .ident compiler version attribute.Chad Rosier2014-06-102-0/+14
| | | | | | Patch by Ana Pazos<apazos@codeaurora.org>! llvm-svn: 210535
* Add detection of OS X relocatable SDK to compiler-rt as a lit.util functionAlexander Potapenko2014-06-103-15/+21
| | | | | | | | | | | | Clang's lit cfg already detects the currently selected SDK via "xcrun --show-sdk-path". The same thing should be done for compiler-rt tests, to make them work on recent OS X versions. Instead of duplicating the detection code, this patch extracts the detection function into a lit.util method. Patch by Kuba Brecka (kuba.brecka@gmail.com), reviewed at http://reviews.llvm.org/D4072 llvm-svn: 210534
* [sanitizer] Relax sanity checks in ioctl decoding.Evgeniy Stepanov2014-06-102-4/+29
| | | | | | Standard KVM ioctls don't pass currect ioctl_decode(). llvm-svn: 210533
* [ReaderWriter] Simplify initialization of class fields.Simon Atanasyan2014-06-101-2/+2
| | | | | | No functional changes. llvm-svn: 210532
* [ELF] Fix typo in the type name of the range-based loop item.Simon Atanasyan2014-06-101-1/+1
| | | | | | No functional changes. llvm-svn: 210531
* [ELF] Fix the bug -- LLD crashes if the --whole-archive optionSimon Atanasyan2014-06-102-1/+64
| | | | | | is around non-archive. llvm-svn: 210530
* clang-format: Increase penalty for wrapping array subscript expressionsDaniel Jasper2014-06-102-1/+5
| | | | | | | | | | | | | Before: aaaaaaaaaaa aaaaaaaaaaaaaaa = aaaaaaaaaaaaaaaaaaaaaaaaaa->aaaaaaaaa[0].aaaaaaa [0].aaaaaaaaaaaaaaaaaaaaaa(); After: aaaaaaaaaaa aaaaaaaaaaaaaaa = aaaaaaaaaaaaaaaaaaaaaaaaaa->aaaaaaaaa[0] .aaaaaaa[0] .aaaaaaaaaaaaaaaaaaaaaa(); llvm-svn: 210529
* Condition codes AL and NV are invalid in the aliases that useArtyom Skrobov2014-06-106-6/+101
| | | | | | | | | | | | | | inverted condition codes (CINC, CINV, CNEG, CSET, and CSETM). Matching aliases based on "immediate classes", when disassembling, wasn't previously supported, hence adding MCOperandPredicate into class Operand, and implementing the support for it in AsmWriterEmitter. The parsing for those aliases was already custom, so just adding the missing condition into AArch64AsmParser::parseCondCode. llvm-svn: 210528
* Refactoring in AsmWriterEmitter::EmitPrintAliasInstruction()Artyom Skrobov2014-06-101-11/+6
| | | | llvm-svn: 210527
* Anonymous definitions in foreach blocks triggered a 'def already exists'Artyom Skrobov2014-06-102-3/+32
| | | | llvm-svn: 210526
* AArch64: disallow x30 & x29 as the destination for indirect tail callsTim Northover2014-06-102-1/+15
| | | | | | | | As Ana Pazos pointed out, these have to be restored to their incoming values before a function returns; i.e. before the tail call. So they can't be used correctly as the destination register. llvm-svn: 210525
* Revert "X86: elide comparisons after cmpxchg instructions."Tim Northover2014-06-103-188/+57
| | | | | | | This reverts commit r210523. It was committed prematurely without waiting for review. llvm-svn: 210524
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