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* gn build: Merge r371103Nico Weber2019-09-051-0/+1
| | | | llvm-svn: 371105
* [X86] Override BuildSDIVPow2 for X86.Craig Topper2019-09-056-56/+104
| | | | | | | | | | | | | | | | | | | | | | | As noted in PR43197, we can use test+add+cmov+sra to implement signed division by a power of 2. This is based off the similar version in AArch64, but I've adjusted it to use target independent nodes where AArch64 uses target specific CMP and CSEL nodes. I've also blocked INT_MIN as the transform isn't valid for that. I've limited this to i32 and i64 on 64-bit targets for now and only when CMOV is supported. i8 and i16 need further investigation to be sure they get promoted to i32 well. I adjusted a few tests to enable cmov to demonstrate the new codegen. I also changed twoaddr-coalesce-3.ll to 32-bit mode without cmov to avoid perturbing the scenario that is being set up there. Differential Revision: https://reviews.llvm.org/D67087 llvm-svn: 371104
* [Support] Add writeFileAtomically() to FileUtilitiesJan Korous2019-09-054-0/+95
| | | | | | Differential Revision: https://reviews.llvm.org/D66859 llvm-svn: 371103
* gn build: (manually) merge r358706Nico Weber2019-09-051-18/+24
| | | | llvm-svn: 371102
* [InstCombine] foldICmpBinOp(): consider inverted check in 'unsigned sub ↵Roman Lebedev2019-09-053-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | overflow' check A follow-up for r329011. This may be changed to produce @llvm.sub.with.overflow in a later patch, but for now just make things more consistent overall. A few observations stem from this: * There does not seem to be a similar one-instruction fold for uadd-overflow * I'm not sure we'll want to canonicalize `B u> A` as `usub.with.overflow`, so since the `icmp` here no longer refers to `sub`, reconstructing `usub.with.overflow` will be problematic, and will likely require standalone pass (similar to DivRemPairs). https://rise4fun.com/Alive/Zqs Name: (A - B) u> A --> B u> A %t0 = sub i8 %A, %B %r = icmp ugt i8 %t0, %A => %r = icmp ugt i8 %B, %A Name: (A - B) u<= A --> B u<= A %t0 = sub i8 %A, %B %r = icmp ule i8 %t0, %A => %r = icmp ule i8 %B, %A Name: C u< (C - D) --> C u< D %t0 = sub i8 %C, %D %r = icmp ult i8 %C, %t0 => %r = icmp ult i8 %C, %D Name: C u>= (C - D) --> C u>= D %t0 = sub i8 %C, %D %r = icmp uge i8 %C, %t0 => %r = icmp uge i8 %C, %D llvm-svn: 371101
* [InstCombine] foldICmpBinOp(): consider inverted check in 'unsigned add ↵Roman Lebedev2019-09-052-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | overflow' check A follow-up for r342004. This will be changed to produce @llvm.add.with.overflow in a later patch, but for now just make things more consistent overall. https://rise4fun.com/Alive/qxE Name: (Op1 + X) u< Op1 --> ~Op1 u< X %t0 = add i8 %Op1, %X %r = icmp ult i8 %t0, %Op1 => %n = xor i8 %Op1, -1 %r = icmp ult i8 %n, %X Name: (Op1 + X) u>= Op1 --> ~Op1 u>= X %t0 = add i8 %Op1, %X %r = icmp uge i8 %t0, %Op1 => %n = xor i8 %Op1, -1 %r = icmp uge i8 %n, %X ;------------------------------------------------------------------------------- Name: Op0 u> (Op0 + X) --> X u> ~Op0 %t0 = add i8 %Op0, %X %r = icmp ugt i8 %Op0, %t0 => %n = xor i8 %Op0, -1 %r = icmp ugt i8 %X, %n Name: Op0 u<= (Op0 + X) --> X u<= ~Op0 %t0 = add i8 %Op0, %X %r = icmp ule i8 %Op0, %t0 => %n = xor i8 %Op0, -1 %r = icmp ule i8 %X, %n llvm-svn: 371100
* [InstCombine][NFC] Tests for 'unsigned sub overflow' checkRoman Lebedev2019-09-052-0/+313
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------- Name: unsigned sub, overflow, v0 %sub = sub i8 %x, %y %ov = icmp ugt i8 %sub, %x => %agg = usub_overflow i8 %x, %y %sub = extractvalue {i8, i1} %agg, 0 %ov = extractvalue {i8, i1} %agg, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned sub, no overflow, v0 %sub = sub i8 %x, %y %ov = icmp ule i8 %sub, %x => %agg = usub_overflow i8 %x, %y %sub = extractvalue {i8, i1} %agg, 0 %not.ov = extractvalue {i8, i1} %agg, 1 %ov = xor %not.ov, -1 Done: 1 Optimization is correct! llvm-svn: 371099
* [InstCombine][NFC] Tests for 'unsigned add overflow' checkRoman Lebedev2019-09-052-0/+398
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ---------------------------------------- Name: unsigned add, overflow, v0 %add = add i8 %x, %y %ov = icmp ult i8 %add, %x => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %ov = extractvalue {i8, i1} %agg, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned add, overflow, v1 %add = add i8 %x, %y %ov = icmp ult i8 %add, %y => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %ov = extractvalue {i8, i1} %agg, 1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned add, no overflow, v0 %add = add i8 %x, %y %ov = icmp uge i8 %add, %x => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %not.ov = extractvalue {i8, i1} %agg, 1 %ov = xor %not.ov, -1 Done: 1 Optimization is correct! ---------------------------------------- Name: unsigned add, no overflow, v1 %add = add i8 %x, %y %ov = icmp uge i8 %add, %y => %agg = uadd_overflow i8 %x, %y %add = extractvalue {i8, i1} %agg, 0 %not.ov = extractvalue {i8, i1} %agg, 1 %ov = xor %not.ov, -1 Done: 1 Optimization is correct! llvm-svn: 371098
* [TextAPI] update interface file for filtered iterCyndy Ishida2019-09-051-71/+22
| | | | | | | | | | | | | | | | | | Summary: This is a simple change that allows easy iterator semantics for symbols held in interface file. Not being used, so harmless change right now, but will be once TBD-v4 is submitted. Reviewers: ributzka, steven_wu Reviewed By: ributzka Subscribers: javed.absar, kristof.beyls, dexonsmith, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67204 llvm-svn: 371097
* Docs: Move Documentation sections to separate pages.DeForest Richards2019-09-054-415/+433
| | | | | | Updates the links on the homepage by moving the User Guides, Programming Documentation, and Subsystem Documentation sections to separate pages. Also changes "Overview" to "About" at the top of the LLVM Docs homepage. This work is part of the Google Season of Docs project. llvm-svn: 371096
* [x86] fix horizontal math bug exposed by improved demanded elements analysis ↵Sanjay Patel2019-09-052-8/+27
| | | | | | | | (PR43225) https://bugs.llvm.org/show_bug.cgi?id=43225 llvm-svn: 371095
* [X86] Add a FIXME about why the CWD/CDQ/CQO have a bogus implicit def of the ↵Craig Topper2019-09-051-6/+5
| | | | | | | | | A register. NFC The instructions copy the sign bit of the A register to every bit of the D register. But they don't write to the A register. llvm-svn: 371094
* [X86] Remove unneeded CHECK lines from a test. NFCCraig Topper2019-09-051-250/+0
| | | | llvm-svn: 371093
* [X86] Fix stale comment. NFCCraig Topper2019-09-051-2/+2
| | | | | | | We aren't checking for a concat here. We're just always splitting 256-bit stores. llvm-svn: 371092
* gn build: (manually) merge r371003Nico Weber2019-09-051-0/+3
| | | | llvm-svn: 371091
* Fix windows-x86-debug compilation with python enabled using multi-target ↵Adrian McCarthy2019-09-051-40/+92
| | | | | | | | | | | | | | | generator [Patch by Leonid Mashinskiy] Visual Studio CMake generator is multi-target and does not define CMAKE_BUILD_TYPE, so Debug build on VS was failing due selection of release python library. This patch reverts back some of latest changes and fixes building by raw VS using CMake expression generators. Differential Revision: https://reviews.llvm.org/D66994 llvm-svn: 371090
* [MergedLoadStoreMotion] Sink stores to BB with more than 2 predecessorsDenis Bakhvalov2019-09-056-72/+235
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we have: bb5: br i1 %arg3, label %bb6, label %bb7 bb6: %tmp = getelementptr inbounds i32, i32* %arg1, i64 2 store i32 3, i32* %tmp, align 4 br label %bb9 bb7: %tmp8 = getelementptr inbounds i32, i32* %arg1, i64 2 store i32 3, i32* %tmp8, align 4 br label %bb9 bb9: ; preds = %bb4, %bb6, %bb7 ... We can't sink stores directly into bb9. This patch creates new BB that is successor of %bb6 and %bb7 and sinks stores into that block. SplitFooterBB is the parameter to the pass that controls that behavior. Change-Id: I7fdf50a772b84633e4b1b860e905bf7e3e29940f Differential: https://reviews.llvm.org/D66234 llvm-svn: 371089
* [x86] add test for horizontal math bug (PR43225); NFCSanjay Patel2019-09-051-0/+26
| | | | llvm-svn: 371088
* [MemorySSA] Verify MSSAUpdater exists.Alina Sbirlea2019-09-051-1/+2
| | | | llvm-svn: 371087
* [PGO][CHR] Speed up following long, interlinked use-def chains.Hiroshi Yamauchi2019-09-052-5/+165
| | | | | | | | | | | | | | | | | | | Summary: Avoid visiting an instruction more than once by using a map. This is similar to https://reviews.llvm.org/rL361416. Reviewers: davidxl Reviewed By: davidxl Subscribers: llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67198 llvm-svn: 371086
* [ELF] Initialize PhdrEntry::p_align to maxPageSize for PT_LOADFangrui Song2019-09-052-10/+8
| | | | | | | | | | | | | | | | | | | | | ``` Writer<ELFT>::run assignFileOffsets setFileOffset computeFileOffset os->ptLoad->p_align may be smaller than config->maxPageSize setPhdrs p_align = max(p_align, config->maxPageSize) ``` If we move the config->maxPageSize logic to the constructor of PhdrEntry, computeFileOffset can be simplified. Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D67211 llvm-svn: 371085
* [MemorySSA] Update MemorySSA when removing debug.value calls.Alina Sbirlea2019-09-052-1/+47
| | | | llvm-svn: 371084
* [Hexagon] Fix type in HexagonTargetLowering::ReplaceNodeResultsKrzysztof Parzyszek2019-09-052-1/+20
| | | | llvm-svn: 371083
* [Alignment][NFC] Change internal representation of TargetLowering.hGuillaume Chatelet2019-09-052-16/+12
| | | | | | | | | | | | | | | | | Summary: This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67226 llvm-svn: 371082
* [clangd] Initialize int field to zero. NFCIlya Biryukov2019-09-051-1/+1
| | | | | | To make sure we do not have uninitialized values and undefined behavior. llvm-svn: 371081
* [DebugInfo] Add debug location to stubs generated by CGDeclCXX and mark them ↵Alexandre Ganea2019-09-057-20/+75
| | | | | | | | as artificial Differential Revision: https://reviews.llvm.org/D66328 llvm-svn: 371080
* [ARM] Add support for the s,j,x,N,O inline asm constraintsDavid Candler2019-09-053-8/+396
| | | | | | | | | | | | | | | | | | | | | | A number of inline assembly constraints are currently supported by LLVM, but rejected as invalid by Clang: Target independent constraints: s: An integer constant, but allowing only relocatable values ARM specific constraints: j: An immediate integer between 0 and 65535 (valid for MOVW) x: A 32, 64, or 128-bit floating-point/SIMD register: s0-s15, d0-d7, or q0-q3 N: An immediate integer between 0 and 31 (Thumb1 only) O: An immediate integer which is a multiple of 4 between -508 and 508. (Thumb1 only) This patch adds support to Clang for the missing constraints along with some checks to ensure that the constraints are used with the correct target and Thumb mode, and that immediates are within valid ranges (at least where possible). The constraints are already implemented in LLVM, but just a couple of minor corrections to checks (V8M Baseline includes MOVW so should work with 'j', 'N' and 'O' shouldn't be valid in Thumb2) so that Clang and LLVM are in line with each other and the documentation. Differential Revision: https://reviews.llvm.org/D65863 Change-Id: I18076619e319bac35fbb60f590c069145c9d9a0a llvm-svn: 371079
* [X86][SSE] EltsFromConsecutiveLoads - ignore non-zero offset base loads ↵Simon Pilgrim2019-09-052-8/+17
| | | | | | | | | | (PR43227) As discussed on D64551 and PR43227, we don't correctly handle cases where the base load has a non-zero byte offset. Until we can properly handle this, we must bail from EltsFromConsecutiveLoads. llvm-svn: 371078
* [lldb][NFC] Add dimensions to pexpect tests failing on sanitizer botRaphael Isemann2019-09-052-2/+2
| | | | | | | | | | I'm still unable to reproduce this locally, so let's see if this is enough to make the bots happy. The missing dimension parameter seems to be the biggest difference between these tests and TestIOHandlerCompletion.py which runs just fine on the same bot, so that's the motivation for trying this out. llvm-svn: 371077
* [clang-tidy] Make most ArgumentCommentCheck options local, as they should beAlexander Kornienko2019-09-053-15/+25
| | | | llvm-svn: 371076
* Add a bugprone-argument-comment option: IgnoreSingleArgument.Alexander Kornienko2019-09-054-1/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Add bugprone-argument-comment option: IgnoreSingleArgument. When true, the check will ignore the single argument. Sometimes, it's not necessary to add comment to single argument. For example: > std::string name("Yubo Xie"); > pScreen->SetWidth(1920); > pScreen->SetHeight(1080); This option can ignore such single argument in bugprone-argument-comment check. Reviewers: alexfh Reviewed By: alexfh Subscribers: cfe-commits Tags: #clang Patch by Yubo Xie. Differential Revision: https://reviews.llvm.org/D67056 llvm-svn: 371075
* [yaml2obj] Write the section header table after section contentsFangrui Song2019-09-0536-143/+142
| | | | | | | | | | | | | | | | | Linkers (ld.bfd/gold/lld) place the section header table at the very end. This allows tools to strip it, which is optional in executable/shared objects. In addition, if we add or section, the size of the section header table will change. Placing the section header table in the end keeps section offsets unchanged. yaml2obj currently places the section header table immediately after the program header. Follow what linkers do to make offset updating easier. Reviewed By: grimar Differential Revision: https://reviews.llvm.org/D67221 llvm-svn: 371074
* [LLVM][Alignment][NFC] Fixing wrong documentationGuillaume Chatelet2019-09-051-1/+1
| | | | llvm-svn: 371073
* [clang-tidy] Fix bugprone-argument-comment bug: negative literal number is ↵Alexander Kornienko2019-09-052-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | not checked. Summary: For example: ``` void foo(int a); foo(-2); ``` should be fixed as: ``` foo(/*a=*/-2); ``` This change tries to fix this issue. Reviewers: alexfh, hokein, aaron.ballman Reviewed By: alexfh, aaron.ballman Subscribers: xazax.hun, cfe-commits Tags: #clang, #clang-tools-extra Patch by Yubo Xie. Differential Revision: https://reviews.llvm.org/D67084 llvm-svn: 371072
* [llvm-readelf] - Allow dumping dynamic symbols when there is no program headers.George Rimar2019-09-052-9/+151
| | | | | | | | | | | | | | | | | | | | | | | | | D62179 introduced a regression. llvm-readelf lose the ability to dump the dynamic symbols when there is .dynamic section with a DT_SYMTAB, but there are no program headers: https://reviews.llvm.org/D62179#1652778 Below is a program flow before the D62179 change: 1) Find SHT_DYNSYM. 2) Find there is no PT_DYNAMIC => don't try to parse it. 3) Print dynamic symbols using information about them found on step (1). And after the change it became: 1) Find SHT_DYNSYM. 2) Find there is no PT_DYNAMIC => find SHT_DYNAMIC. 3) Parse dynamic table, but fail to handle the DT_SYMTAB because of the absence of the PT_LOAD. Report the "Virtual address is not in any segment" error. This patch fixes the issue. For doing this it checks that the value of DT_SYMTAB was mapped to a segment. If not - it ignores it. Differential revision: https://reviews.llvm.org/D67078 llvm-svn: 371071
* [libc++] Revert "Make `vector` unconditionally move elements when exceptions ↵Louis Dionne2019-09-053-82/+10
| | | | | | | | | | are disabled." This reverts r370502, which broke the use case of a copy-only T (with a deleted move constructor) when exceptions are disabled. Until we figure out the right behavior, I'm reverting the commit. llvm-svn: 371068
* [libc++] Add a test for resizing of a vector with copy-only elementsLouis Dionne2019-09-051-0/+45
| | | | | | See https://reviews.llvm.org/D62228#1658620 llvm-svn: 371067
* Add -m(no)-spe to clangJustin Hibbits2019-09-056-2/+22
| | | | | | | | | | | | | | Summary: r337347 added support for the Signal Processing Engine (SPE) to LLVM. This follows that up with the clang side. This adds -mspe and -mno-spe, to match GCC. Subscribers: nemanjai, kbarton, cfe-commits Differential Revision: https://reviews.llvm.org/D49754 llvm-svn: 371066
* [mips] Make a few test cases more tolerant to exact symbol addresses. NFCSimon Atanasyan2019-09-055-89/+75
| | | | llvm-svn: 371065
* [ARM] Fixup the creation of VPT blocksDavid Green2019-09-059-51/+54
| | | | | | | | | | This attempts to just fix the creation of VPT blocks, fixing up the iterating, which instructions are considered in the bundle, and making sure that we do not overrun the end of the block. Differential Revision: https://reviews.llvm.org/D67219 llvm-svn: 371064
* [LLVM][Alignment] Convert isLegalNTStore/isLegalNTLoad to llvm::AlignGuillaume Chatelet2019-09-056-16/+18
| | | | | | | | | | | | | | | | | Summary: This is patch is part of a serie to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Reviewers: courbet Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67223 llvm-svn: 371063
* [X86][SSE] Add (failing) test case for PR43227Simon Pilgrim2019-09-051-0/+57
| | | | llvm-svn: 371061
* [MIPS GlobalISel] Select G_FENCEPetar Avramovic2019-09-055-0/+107
| | | | | | | | | | | | G_FENCE comes form fence instruction. For MIPS fence is generated in AtomicExpandPass when atomic instruction gets surrounded with fence instruction when needed. G_FENCE arguments don't have LLT, because of that there is no job for legalizer and regbankselect. Instruction select G_FENCE for MIPS32. Differential Revision: https://reviews.llvm.org/D67181 llvm-svn: 371056
* [MIPS GlobalISel] Select llvm.trap intrinsicPetar Avramovic2019-09-053-1/+50
| | | | | | | | | Select G_INTRINSIC_W_SIDE_EFFECTS for Intrinsic::trap for MIPS32 via legalizeIntrinsic. Differential Revision: https://reviews.llvm.org/D67180 llvm-svn: 371055
* [MIPS GlobalISel] Lower SRet pointer argumentsPetar Avramovic2019-09-053-1/+80
| | | | | | | | | | | Instead of returning structure by value clang usually adds pointer to that structure as an argument. Pointers don't require special handling no matter the SRet flag. Remove unsuccessful exit from lowerCall for arguments with SRet flag if they are pointers. Differential Revision: https://reviews.llvm.org/D67179 llvm-svn: 371054
* Revert rL370996 from llvm/trunk: [AArch64][GlobalISel] Teach ↵Simon Pilgrim2019-09-057-321/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AArch64CallLowering to handle basic sibling calls This adds support for basic sibling call lowering in AArch64. The intent here is to only handle tail calls which do not change the ABI (hence, sibling calls.) At this point, it is very restricted. It does not handle - Vararg calls. - Calls with outgoing arguments. - Calls whose calling conventions differ from the caller's calling convention. - Tail/sibling calls with BTI enabled. This patch adds - `AArch64CallLowering::isEligibleForTailCallOptimization`, which is equivalent to the same function in AArch64ISelLowering.cpp (albeit with the restrictions above.) - `mayTailCallThisCC` and `canGuaranteeTCO`, which are identical to those in AArch64ISelLowering.cpp. - `getCallOpcode`, which is exactly what it sounds like. Tail/sibling calls are lowered by checking if they pass target-independent tail call positioning checks, and checking if they satisfy `isEligibleForTailCallOptimization`. If they do, then a tail call instruction is emitted instead of a normal call. If we have a sibling call (which is always the case in this patch), then we do not emit any stack adjustment operations. When we go to lower a return, we check if we've already emitted a tail call. If so, then we skip the return lowering. For testing, this patch - Adds call-translator-tail-call.ll to test which tail calls we currently lower, which ones we don't, and which ones we shouldn't. - Updates branch-target-enforcement-indirect-calls.ll to show that we fall back as expected. Differential Revision: https://reviews.llvm.org/D67189 ........ This fails on EXPENSIVE_CHECKS builds due to a -verify-machineinstrs test failure in CodeGen/AArch64/dllimport.ll llvm-svn: 371051
* [X86] X86SpeculativeLoadHardeningPass::canHardenRegister - fix out of bounds ↵Simon Pilgrim2019-09-051-2/+5
| | | | | | | | warning. Fixes clang static-analyzer warning. llvm-svn: 371050
* [SystemZ] Recognize INLINEASM_BR in backendJonas Paulsson2019-09-055-20/+34
| | | | | | | | | | Handle the remaining cases also by handling asm goto in SystemZInstrInfo::getBranchInfo(). Review: Ulrich Weigand https://reviews.llvm.org/D67151 llvm-svn: 371048
* [X86] X86InstrInfo::optimizeCompareInstr - fix potential null dereference. Simon Pilgrim2019-09-051-2/+3
| | | | | | | | Fixes clang static-analyzer warning. Technically the MachineInstr *Sub might still be null if we're comparing zero (IsCmpZero == true), although this probably won't happen as SrcReg2 is probably == 0. llvm-svn: 371047
* [OpenCL] Add image type handling for builtinsSven van Haastregt2019-09-053-46/+248
| | | | | | | | | | | | | | | | | | | Image types were previously available, but not working. This patch adds image type handling. Rename the image type definitions in the .td file to make them consistent with other type names. Use abstract types to represent the unqualified types. Instantiate access-qualified image types at the point of use using, e.g. `ImageType<Image2d, "RO">`. Add/update TableGen definitions for the read_image/write_image builtin functions. Patch by Pierre Gondois and Sven van Haastregt. Differential Revision: https://reviews.llvm.org/D63480 llvm-svn: 371046
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