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* [WebAssembly] Remove the -target command-line flag from the ld commandline.Dan Gohman2015-12-212-2/+3
| | | | | | | | This flag isn't needed, or permitted, with the "ld" flavor of lld. Also, add a basic ld commandline test. llvm-svn: 256216
* [Support] Timer: simplify the init() methodVedant Kumar2015-12-211-5/+1
| | | | llvm-svn: 256215
* [AVR] Added configuration file and machine function information classDylan McKay2015-12-212-0/+88
| | | | | | | This commit adds the 'AVRMachineFunctionInfo' class, which simply stores basic properties about generated machine functions. llvm-svn: 256213
* Reduce code duplicationEnrico Granata2015-12-211-64/+16
| | | | llvm-svn: 256212
* Fix line endings after r256155. NFC.Eric Christopher2015-12-211-198/+198
| | | | llvm-svn: 256211
* ScopInfo: Small improvement to schedule construction [NFC]Tobias Grosser2015-12-211-9/+9
| | | | | | | | We clarify that certain code is only executed if LSchedule is != nullptr. Previously some of these functions have been executed, but they only passed a nullptr through. This caused some confusion when reading the code. llvm-svn: 256209
* ScopInfo: Polish the implementation of mapToDimensionTobias Grosser2015-12-211-20/+32
| | | | | | | | Besides improving the documentation and the code we now assert in case the input is invalid (N < 0) and also do not any more return a nullptr in case USet is empty. This should make the code more readable. llvm-svn: 256208
* [asan] Add mincore test.Evgeniy Stepanov2015-12-211-0/+34
| | | | | | | ASan does not really do anything interesting with mincore, but this test verifies that the function still works correctly. llvm-svn: 256207
* Fix test case comment (NFC)Xinliang David Li2015-12-211-2/+2
| | | | llvm-svn: 256206
* [cfi] Fix LowerBitSets on 32-bit targets.Evgeniy Stepanov2015-12-212-1/+22
| | | | | | | This code attempts to truncate IntPtrTy to i32, which may be the same type. llvm-svn: 256205
* [clang-cl] Add support for /BreproDavid Majnemer2015-12-219-3/+61
| | | | | | | | | | | | The /Brepro flag controls whether or not the compiler should embed timestamps into the object file. Object files which do not embed timestamps are not suitable for incremental linking but are suitable for hermetic build systems and staged self-hosts of clang. A normal clang spelling of this flag has been added, -mincremental-linker-compatible. llvm-svn: 256204
* [MC, COFF] Support link /incremental conditionallyDavid Majnemer2015-12-2118-30/+71
| | | | | | | | | | | | | | | | Today, we always take into account the possibility that object files produced by MC may be consumed by an incremental linker. This results in us initialing fields which vary with time (TimeDateStamp) which harms hermetic builds (e.g. verifying a self-host went well) and produces sub-optimal code because we cannot assume anything about the relative position of functions within a section (call sites can get redirected through incremental linker thunks). Let's provide an MCTargetOption which controls this behavior so that we can disable this functionality if we know a-priori that the build will not rely on /incremental. llvm-svn: 256203
* Enhance BranchProbabilityInfo::calcUnreachableHeuristics for InvokeInstJun Bum Lim2015-12-215-4/+61
| | | | | | | | | | | | | | | This is recommit of r256028 with minor fixes in unittests: CodeGen/Mips/eh.ll CodeGen/Mips/insn-zero-size-bb.ll Original commit message: When identifying blocks post-dominated by an unreachable-terminated block in BranchProbabilityInfo, consider only the edge to the normal destination block if the terminator is InvokeInst and let calcInvokeHeuristics() decide edge weights for the InvokeInst. llvm-svn: 256202
* Resubmit r256193 with test fix: assertion failure analyzedXinliang David Li2015-12-212-2/+18
| | | | llvm-svn: 256201
* Drop remaining uses of the Base typedef idiom.Rafael Espindola2015-12-211-16/+7
| | | | llvm-svn: 256200
* Add option to assume single-loop scops with sufficient compute are profitableTobias Grosser2015-12-213-4/+135
| | | | | | | | | | | | | | If a loop has a sufficiently large amount of compute instruction in its loop body, it is unlikely that our rewrite of the loop iterators introduces large performance changes. As Polly can also apply beneficical optimizations (such as parallelization) to such loop nests, we mark them as profitable. This option is currently "disabled" by default, but can be used to run experiments. If enabled by setting it e.g. to 40 instructions, we currently see some compile-time increases on LNT without any significant run-time changes. llvm-svn: 256199
* Revert r256193: build bot failure triggeredXinliang David Li2015-12-212-19/+2
| | | | llvm-svn: 256198
* Simplify types. NFC.Rafael Espindola2015-12-212-4/+4
| | | | llvm-svn: 256197
* Remove unnecessary cast.Rafael Espindola2015-12-211-1/+1
| | | | llvm-svn: 256196
* Remove simple uses of Base::.Rafael Espindola2015-12-211-13/+15
| | | | | | | They have a tendency to get out of date and obscure where the value/type is from. llvm-svn: 256195
* [X86][SSE] Transform truncations between vectors of integers into ↵Cong Hou2015-12-214-163/+353
| | | | | | | | | | | | | | | | | | | X86ISD::PACKUS/PACKSS operations during DAG combine. This patch transforms truncation between vectors of integers into X86ISD::PACKUS/PACKSS operations during DAG combine. We don't do it in lowering phase because after type legalization, the original truncation will be turned into a BUILD_VECTOR with each element that is extracted from a vector and then truncated, and from them it is difficult to do this optimization. This greatly improves the performance of truncations on some specific types. Cost table is updated accordingly. Differential revision: http://reviews.llvm.org/D14588 llvm-svn: 256194
* [PGO] Fix profile var comdat generation problem with COFFXinliang David Li2015-12-212-2/+19
| | | | | | | | | | | When targeting COFF, it is required that a comdat section to have a global obj with the same name as the comdat (except for comdats with select kind to be associative). This fix makes sure that the comdat is keyed on the data variable for COFF. Also improved test coverage for this. llvm-svn: 256193
* [ValueTracking] Properly handle non-sized types in isAligned function.Michael Zolotukhin2015-12-212-1/+25
| | | | | | | | | | Reviewers: apilipenko, reames, sanjoy, hfinkel Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D15597 llvm-svn: 256192
* Tweak myriad-toolchain test.James Y Knight2015-12-211-2/+2
| | | | | | | The test failed when run on a SPARC host, since it was finding the native gcc installation by accident. llvm-svn: 256191
* Reapply "[CodeGen] Fix assignments of inline layouts into the byref structure"Vedant Kumar2015-12-213-0/+20
| | | | | | | | | | | | | | | | | | | When using blocks, a byref structure is created to represent the closure. The "byref.layout" field of this structure is an i8*. However, some 'inline' layouts are represented as i64's, not i8*'s. Prior to r246985 we cast the i64 'inline' layout to an i8* before assigning it into the byref structure. This patch brings the cast back and adds a regression test. The original version of this patch was too invasive. This version only adds the cast to BuildByrefLayout. Differential Revision: http://reviews.llvm.org/D15674 rdar://23713871 llvm-svn: 256190
* Remove unnecessary cast.Rafael Espindola2015-12-211-1/+1
| | | | llvm-svn: 256189
* Fix PR24563 (LiveDebugVariables unconditionally propagates all DBG_VALUEs)Adrian Prantl2015-12-213-54/+138
| | | | | | | | | | | | | | | | LiveDebugVariables unconditionally propagates all DBG_VALUE down the dominator tree, which happens to work fine if there already is another DBG_VALUE or the DBG_VALUE happends to describe a single-assignment vreg but is otherwise wrong if the DBG_VALUE is coming from only one of the predecessors. In r255759 we introduced a proper data flow analysis scheduled after LiveDebugVariables that correctly propagates DBG_VALUEs across basic block boundaries. With the new pass in place, the incorrect propagation in LiveDebugVariables can be retired witout loosing any of the benefits where LiveDebugVariables happened to do the right thing. llvm-svn: 256188
* Convert the CodeGen/ARM/sched-it-debug-nodes.ll testcase from IR -> MIR.Adrian Prantl2015-12-212-88/+160
| | | | | | | NFC PR24563 llvm-svn: 256187
* Revert "[CodeGen] Fix assignments of inline layouts into the byref structure"Vedant Kumar2015-12-213-20/+1
| | | | | | This reverts commit r256185. It breaks CodeGenObjC/fragile-arc.m. llvm-svn: 256186
* [CodeGen] Fix assignments of inline layouts into the byref structureVedant Kumar2015-12-213-1/+20
| | | | | | | | | | | | | | When using blocks, a byref structure is created to represent the closure. The "byref.layout" field of this structure is an i8*. However, some 'inline' layouts are represented as i64's, not i8*'s. Prior to r246985 we cast the i64 'inline' layout to an i8* before assigning it into the byref structure. This patch brings the cast back and adds a regression test. rdar://23713871 llvm-svn: 256185
* [compiler-rt] [tsan] Add support for PIE build on AArch64Adhemerval Zanella2015-12-213-6/+68
| | | | | | | | | | | | | | | | | | | This patch adds PIE executable support for aarch64-linux. It adds two more segments: - 0x05500000000-0x05600000000: 39-bits PIE program segments - 0x2aa00000000-0x2ab00000000: 42-bits PIE program segments Fortunately it is possible to use the same transformation formula for the new segments range with some adjustments in shadow to memory formula (it adds a constant offset based on the VMA size). A simple testcase is also added, however it is disabled on x86 due the fact it might fail on newer kernels [1]. [1] https://git.kernel.org/linus/d1fd836dcf00d2028c700c7e44d2c23404062c90 llvm-svn: 256184
* Teach ARMLoadStoreOptimizer to ignore DBG_VALUE instructions when mergingAdrian Prantl2015-12-212-1/+170
| | | | | | | | | instructions. As noted in PR24563. rdar://problem/23963293 llvm-svn: 256183
* [asan] fix fopen interceptor to not crash if path is NULLKostya Serebryany2015-12-212-1/+7
| | | | llvm-svn: 256182
* Delete dead typedefs.Rafael Espindola2015-12-211-3/+0
| | | | llvm-svn: 256181
* Refactor duplicated code. NFC.Rafael Espindola2015-12-213-14/+24
| | | | llvm-svn: 256180
* fix leak in a test, make the sanitizer bot greenKostya Serebryany2015-12-211-1/+2
| | | | llvm-svn: 256179
* AMDGPU/SI: Fix encoding for FLAT_SCRATCH registers on VITom Stellard2015-12-216-21/+84
| | | | | | | | | | | | | | | Summary: These register has different encodings on CI and VI, so we add pseudo FLAT_SCRACTH registers to be used before MC, and subtarget specific registers to be used by the MC layer. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15661 llvm-svn: 256178
* AMDGPU/SI: Change assembly name for flat scratch registers to flat_scratchTom Stellard2015-12-211-3/+3
| | | | | | This matches what the assembler accepts. llvm-svn: 256177
* [AArch64] Add additional extract-extend patterns for smovMatthew Simpson2015-12-212-9/+15
| | | | | | | | | | | | | This patch adds to the target description two additional patterns for matching extract-extend operations to SMOV. The patterns catch the v16i8-to-i64 and v8i16-to-i64 cases. The existing patterns miss these cases because the extracted elements must first be legalized to i32, resulting in any_extend nodes. This was originally implemented as a DAG combine (r255895), but was reverted due to failing out-of-tree tests. llvm-svn: 256176
* clang-format: Properly set the BlockKind for more blocks.Daniel Jasper2015-12-212-2/+10
| | | | | | | | | | | | | | | Before: void f() { struct Dummy { }; f(); } After: void f() { struct Dummy {}; f(); } llvm-svn: 256175
* Add testcase for r256161 (PR25907)Teresa Johnson2015-12-211-0/+28
| | | | llvm-svn: 256174
* Remove extra whitespace. NFC.Chad Rosier2015-12-211-3/+3
| | | | llvm-svn: 256173
* [ELF][MIPS] Support some of R_MIPS_PCxxx relocationsSimon Atanasyan2015-12-212-0/+96
| | | | | | | The patch adds support for R_MIPS_PC16, R_MIPS_PC19_S2, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PCHI16, R_MIPS_PCLO16 relocations handling. llvm-svn: 256172
* [ThinLTO] Rename variable to reflect bulk importing change (NFC)Teresa Johnson2015-12-211-10/+11
| | | | llvm-svn: 256171
* clang-format: Only consider the first #include that looks right to beDaniel Jasper2015-12-212-3/+17
| | | | | | the main #include. llvm-svn: 256170
* [WebAssembly] Convert a regular for loop to a range-based for loop.Dan Gohman2015-12-211-2/+1
| | | | llvm-svn: 256169
* [WebAssembly] Clean up comments and fix a missing #include dependency.Dan Gohman2015-12-211-13/+7
| | | | llvm-svn: 256168
* [WebAssembly] Remove an unneeded empty destructor.Dan Gohman2015-12-211-4/+0
| | | | llvm-svn: 256167
* [WebAssembly] Enclose the operand variables for load and store instructions ↵Dan Gohman2015-12-211-23/+23
| | | | | | | | | in braces. This allows the AsmMatcherEmitter to properly tokenize the AsmStrings for load and store instructions. This is a step towards asm parsing. llvm-svn: 256166
* [WebAssembly] Mark the ARGUMENT pseudo-instructions as CodeGenOnly.Dan Gohman2015-12-211-1/+1
| | | | llvm-svn: 256165
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