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* Follow-up fix for r254201Artyom Skrobov2015-11-271-1/+1
| | | | llvm-svn: 254202
* [ARM] Generate ABI_optimization_goals build attribute, as described in the ↵Artyom Skrobov2015-11-278-12/+154
| | | | | | | | | | | | | | | | | | | ARM ARM. Summary: Since this build attribute corresponds to a whole module, and different functions in a module may differ in the optimizations enabled for them, this attribute is emitted after all functions, and only in the case that the optimization goals for all functions match. Reviewers: logan, hans Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D14934 llvm-svn: 254201
* [LLGS] Don't forward I/O when process is stoppedPavel Labath2015-11-272-28/+45
| | | | | | | | | | | | | | | | | | | | | Summary: This makes sure we do not attempt to send output over the gdb-remote protocol when the client is not expecting it (i.e., after sending the stop-reply packet). Normally, this should not happen (the process cannot generate output when it is stopped), but due to the fact that pty communication is asynchronous in the linux kernel (llvm.org/pr25652), we may sometimes get this output too late. Instead, we just hold the output, and send it next time we resume. This is not ideal, but at least it makes sure we do not violate the remote protocol. Given that this happens extremely rarely it's not worth trying to work around it with sleeps or something like that. I also remove the m_stdio_communication_mutex, as all of LLGS is now single-threaded anyway. Reviewers: tberghammer, ovyalov Subscribers: lldb-commits Differential Revision: http://reviews.llvm.org/D15019 llvm-svn: 254200
* Revert Sparc and SparcV9 to external assembler. Now that the CPUJoerg Sonnenberger2015-11-273-3/+28
| | | | | | | | handling is corrected, the primary reason for forcing IAS as default is gone and the remaining issues are still somewhat problematic in common situations. llvm-svn: 254199
* [AArch64] Add ARMv8.2-A FP16 scalar instructionsOliver Stannard2015-11-278-128/+915
| | | | | | | | | | | | | | | ARMv8.2-A adds 16-bit floating point versions of all existing VFP floating-point instructions. This is an optional extension, so all of these instructions require the FeatureFullFP16 subtarget feature. Most of these instructions are the same as the 32- and 64-bit versions, but with the type field (bits 23-22) set to 0b11. Previously the top bit of the size field was always 0, so the instruction classes only provided a 1-bit size field, which I have widened to 2 bits. Differential Revision: http://reviews.llvm.org/D15014 llvm-svn: 254198
* [compiler-rt] [dfsan] Unify aarch64 mappingAdhemerval Zanella2015-11-273-41/+138
| | | | | | | | | | | | | | | | This patch reorganize the platform specific mapping information to export the application mask on a external variable. This exported variable will be used by intrumentation phase to create code to be used on architecture with multiple VMA range. The patch creates a new header, dfsan_platform.h, and move all the mapping information and also create function accessors to the mapping value. Also for aarch64 it initialize application exported mask to the value based on runtime VMA detection. llvm-svn: 254197
* [sanitizer] [dfsan] Unify aarch64 mappingAdhemerval Zanella2015-11-272-16/+35
| | | | | | | | | | | | This patch changes the DFSan instrumentation for aarch64 to instead of using fixes application mask defined by SANITIZER_AARCH64_VMA to read the application shadow mask value from compiler-rt. The value is initialized based on runtime VAM detection. Along with this patch a compiler-rt one will also be added to export the shadow mask variable. llvm-svn: 254196
* [x86] Exclusion of incorrect include headers paths for MCU targetAndrey Bokhanko2015-11-272-20/+57
| | | | | | | | Exclusion of /usr/include and /usr/local/include headers paths for MCU target. Differential Revision: http://reviews.llvm.org/D14954 llvm-svn: 254195
* Re-add an xfail removed by r254163Tamas Berghammer2015-11-271-0/+1
| | | | | | | The test is flakey but it fails too often with gcc 4.9.2 on x86_64 to be marked only as expected flakey. llvm-svn: 254194
* [SimplifyLibCalls] Use range-based loop. NFC.Davide Italiano2015-11-271-4/+2
| | | | llvm-svn: 254193
* [TableGen] Sort pattern predicates before concatenating into a string so ↵Craig Topper2015-11-271-4/+11
| | | | | | that different orders of the same set will produce the same string. This can reduce the number of unique predicates in the isel tables. NFC llvm-svn: 254192
* [X86] Pair a NoVLX with HasAVX512 to match the others and remove a unique ↵Craig Topper2015-11-271-1/+1
| | | | | | predicate check in the isel tables. NFC llvm-svn: 254191
* test: bail early if tool_path is NoneAndrew Wilkins2015-11-271-1/+3
| | | | | | tool_path will be None for llvm-go if Go cannot be found llvm-svn: 254190
* test: check if go_executable is setAndrew Wilkins2015-11-271-1/+1
| | | | llvm-svn: 254189
* [llgo] Force exporting __morestack from llgoiAndrew Wilkins2015-11-271-0/+6
| | | | | | | | | | | | | | | | | Summary: Force exporting __morestack from llgoi, so that the symbol is available to the execution engine when linking with libLLVM.so. The engine does not reference __morestack explicitly, so must be provided by the host program. Reviewers: pcc Subscribers: axw, llvm-commits Differential Revision: http://reviews.llvm.org/D12625 llvm-svn: 254188
* Use $GO_EXECUTABLE in Go-based lit testsAndrew Wilkins2015-11-271-0/+2
| | | | | | | | | | | | | | | | Summary: When running tests, pass the GO_EXECUTABLE CMake cache variable to llvm-go. The "go" binary may not be in $PATH, or may be different to the one passed to CMake. Reviewers: pcc Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14041 llvm-svn: 254187
* Test both input file orders.Rafael Espindola2015-11-271-2/+7
| | | | llvm-svn: 254186
* Add missing file.Rafael Espindola2015-11-271-0/+3
| | | | llvm-svn: 254185
* Make the test a bit more interesting.Rafael Espindola2015-11-271-2/+8
| | | | | | It now covers a regular function replacing an available_externally one. llvm-svn: 254184
* MC: Simplify handling of temporary symbols in COFF writer.Peter Collingbourne2015-11-262-81/+44
| | | | | | | | | | | | | | The COFF object writer was previously adding unnecessary symbols to its temporary data structures and cleaning them up later. This made the code harder to understand and caused a bug (aliases classed as temporary symbols would cause an assertion failure). A much simpler way of handling such symbols is to ask the layout for their section-relative position when needed. Tested with a bootstrap on Windows and by building Chrome. Differential Revision: http://reviews.llvm.org/D14975 llvm-svn: 254183
* [clang-tidy] cppcoreguidelines-pro-bounds-pointer-arithmetic: ignore ↵Matthias Gehre2015-11-262-5/+11
| | | | | | | | | | | | | | | | generated pointer arithmetic Summary: Inside a range-based for-loop over an array, the compiler generates pointer arithmetic (end = array + size). Don't flag this. Reviewers: alexfh, sbenza, bkramer, aaron.ballman Subscribers: cfe-commits Differential Revision: http://reviews.llvm.org/D14582 llvm-svn: 254182
* Test commitPierre Gousseau2015-11-261-2/+1
| | | | | | Remove tabs. llvm-svn: 254181
* [X86][FMA] Begun adding AVX512 FMA testsSimon Pilgrim2015-11-262-442/+706
| | | | | | As discussed on D14909 llvm-svn: 254180
* [LoopVectorize] Use MapVector rather than DenseMap for MinBWs.Charlie Turner2015-11-264-7/+62
| | | | | | | | | | | | | | | | | The order in which instructions are truncated in truncateToMinimalBitwidths effects code generation. Switch to a map with a determinisic order, since the iteration order over a DenseMap is not defined. This code is not hot, so the difference in container performance isn't interesting. Many thanks to David Blaikie for making me aware of MapVector! Fixes PR25490. Differential Revision: http://reviews.llvm.org/D14981 llvm-svn: 254179
* [ELF] Lookup INPUT argument in the current directorySimon Atanasyan2015-11-261-0/+2
| | | | | | | | | | | | | If an argument of the INPUT directive is a regular path, linker should lookup it in the current folder first. The fix does not contain any test cases because I think it is not a good idea to pollute a current folder (which in general might be arbitrary) by test files. Differential Revision: http://reviews.llvm.org/D15027 llvm-svn: 254178
* [X86] Now that X86VPermt2 is used in all the avx512_perm_t_sizes just ↵Craig Topper2015-11-261-29/+27
| | | | | | hardcode it into the patterns instead of passing as an argument. NFC llvm-svn: 254177
* [X86] Merge X86VPermt2Fp and X86VPermt2Int back together by weakening them ↵Craig Topper2015-11-262-11/+7
| | | | | | just enough. The SDTCisSameSizeAs introduced in r254138 helps here. llvm-svn: 254176
* Replaced stuff with auto. NFC.George Rimar2015-11-261-1/+1
| | | | llvm-svn: 254175
* Add a few passing lto tests.Rafael Espindola2015-11-2612-0/+168
| | | | | | | | | | | | | | | I found these while trying to get a prototype to bootstrap. They cover things like * Handling of non linker visible stuff (append, available_externally) * Type merging * Alias to dropped globals * Dropping linkage when converting to a declaration. These should hopefully be generally useful for anyone refactoring the plugin. llvm-svn: 254174
* docs: Remove references to the long-defunct LLVM_USED_LIBSJustin Bogner2015-11-262-3/+2
| | | | | | | LLVM_USED_LIBS hasn't done anything since 2012, stop telling people to set it in the docs. llvm-svn: 254173
* [X86] Split ISD node for Vfpclass and Vfpclasss so that we can write strong ↵Craig Topper2015-11-264-7/+15
| | | | | | type constraints for each that don't cause ambiguous isel. llvm-svn: 254172
* [bugpoint] Fix "Alias must point to a definition" problemsHal Finkel2015-11-263-4/+41
| | | | | | | | | | | | | | | | | | GlobalAliases may reference function definitions, but not function declarations. bugpoint would sometimes create invalid IR by deleting a function's body (thus mutating a function definition into a declaration) without first 'fixing' any GlobalAliases that reference that function definition. This change iteratively prevents that issue. Before deleting a function's body, it scans the module for GlobalAliases which reference that function. When found, it eliminates them using replaceAllUsesWith. Fixes PR20788. Patch by Nick Johnson! llvm-svn: 254171
* Disallow aliases to available_externally.Rafael Espindola2015-11-266-45/+29
| | | | | | | | | | | | They are as much trouble as aliases to declarations. They are requiring the code generator to define a symbol with the same value as another symbol, but the second symbol is undefined. If representing this is important for some optimization, we could add support for available_externally aliases. They would be *required* to point to a declaration (or available_externally definition). llvm-svn: 254170
* [X86] Revert part of r254167 to recover bots.Craig Topper2015-11-261-6/+3
| | | | llvm-svn: 254169
* [Hexagon] Lowering of V60/HVX vector typesKrzysztof Parzyszek2015-11-263-89/+469
| | | | llvm-svn: 254168
* [X86] Strengthen more type constraints to reduce isel table size.Craig Topper2015-11-261-12/+24
| | | | llvm-svn: 254167
* Fix TestRegisters.py on armTamas Berghammer2015-11-261-1/+1
| | | | | | | Previously it tried to write a bit in the FPSCR register marked as do not modify what failed on some device. llvm-svn: 254166
* [Hexagon] Hexagon V60 HVX intrinsic defintionsKrzysztof Parzyszek2015-11-268-3/+7930
| | | | | Author: Ron Lieberman <ronl@codeaurora.org> llvm-svn: 254165
* [mips][ias] Range check uimm5 operands and fix several bugs this revealed.Daniel Sanders2015-11-2623-135/+312
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The bugs were: * append, prepend, and balign were not tested * balign takes a uimm2 not a uimm5. * drotr32 was correctly implemented with a uimm5 but the tests expected '52' to be valid. * li/la were implemented with a uimm5 instead of simm32. simm32 isn't completely correct either but I'll fix that when I get to simm32. A notable omission are some of the shift instructions. Several of these have been implemented using a single uimm6 instruction (rather than two uimm5 instructions and a CodeGen-only uimm6 pseudo). These will be updated in the uimm6 patch. Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14712 llvm-svn: 254164
* Remove some xfail-s fixed by r253026Tamas Berghammer2015-11-262-5/+0
| | | | | | | | These tests were fixed by r253026 but they was failing on the linux build bot because of a system setup problem. Remove xfail from them after we fixed the build bot. llvm-svn: 254163
* [AArch64] Add command-line options for Statistical Profiling ExtensionOliver Stannard2015-11-262-0/+8
| | | | | | | | | | This adds the "+profile" and +noprofile" suffixes for the -march and -mcpu options, to allow enabling or disabling the options Statistical Profiling Extension to ARMv8.2-A. Differential Revision: http://reviews.llvm.org/D15023 llvm-svn: 254161
* [AArch64] Add command-line options for ARMv8.2-AOliver Stannard2015-11-262-0/+16
| | | | | | | | | | | This adds new values for the -march option (armv8.2a and armv8.2-a, which are aliases of each other), and new suffixes for the -march and -mcpu options (+fp16 and +nofp16), to allow targeting the ARMv8.2-A architecture and it's optional half-precision floating-point extension. Differential Revision: http://reviews.llvm.org/D15022 llvm-svn: 254160
* [AArch64] Add ARMv8.2-A new AT instruction variantsOliver Stannard2015-11-265-1/+50
| | | | | | | | | | | ARMv8.2-A adds new variants of the "at" (address translate) system instruction, which take the PSTATE.PAN bit (added in ARMv8.1-A). These are a required part of ARMv8.2-A, so no additional subtarget features are required. Differential Revision: http://reviews.llvm.org/D15018 llvm-svn: 254159
* ARM: address WOA unsigned division overflow crashMartell Malone2015-11-265-51/+82
| | | | | | | | | Building on r253865 the crash is not limited to signed overflows. Disable custom handling of unsigned 32-bit and 64-bit integer divide. Add test cases for both 32-bit and 64-bit unsigned integer overflow. llvm-svn: 254158
* [AArch64] Add ARMv8.2-A UAO PSTATE bitOliver Stannard2015-11-267-3/+53
| | | | | | | | | | | | | ARMv8.2-A adds a new PSTATE bit, PSTATE.UAO, which allows the LDTR/STTR instructions to behave the same as LDR/STR with respect to execute-only pages at higher privilege levels. New variants of the MSR/MRS instructions are added to allow reading and writing this bit. It is a required part of ARMv8.2-A, so no additional subtarget features are required. Differential Revision: http://reviews.llvm.org/D15020 llvm-svn: 254157
* [AArch64] Add ARMv8.2-A persistent memory instructionOliver Stannard2015-11-265-3/+30
| | | | | | | | | | | ARMv8.2-A adds the "dc cvap" instruction, which is a system instruction that cleans caches to the point of persistence (for systems that have persistent memory). It is a required part of ARMv8.2-A, so no additional subtarget features are required. Differential Revision: http://reviews.llvm.org/D15016 llvm-svn: 254156
* [AArch64] Add ARMv8.2-A ID_A64MMFR2_EL1 registerOliver Stannard2015-11-264-0/+12
| | | | | | | | | | ARMv8.2-A adds a new ID register, ID_A64MMFR2_EL1, which behaves in the same way as ID_A64MMFR0_EL1 and ID_A64MMFR1_EL1. It is a required part of ARMv8.2-A, so no additional subtarget features are required. Differential Revision: http://reviews.llvm.org/D15017 llvm-svn: 254155
* [AArch64] Add subtarget features for ARMv8.2-AOliver Stannard2015-11-264-5/+20
| | | | | | | | | | | | | | This adds subtarget features for ARMv8.2-A, which builds on (and requires the features from) ARMv8.1-A. Most assembler-visible features of ARMv8.2-A are system instructions, and are all required parts of the architecture, so just depend on the HasV8_2aOps subtarget feature. There is also one large, optional feature, which adds 16-bit floating point versions of all existing floating-point instructions (VFP and SIMD), this is represented by the FeatureFullFP16 subtarget feature. Differential Revision: http://reviews.llvm.org/D15013 llvm-svn: 254154
* Make some of the tests in TestRegisters.py arm compatibleTamas Berghammer2015-11-262-117/+101
| | | | | | Differential revision: http://reviews.llvm.org/D15010 llvm-svn: 254153
* Add 64/128 bit arm neon register definitions on linuxTamas Berghammer2015-11-267-65/+415
| | | | | | Differential revision: http://reviews.llvm.org/D14985 llvm-svn: 254152
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