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* [Support] Complete ISL annotations to IslPtr<>. NFC.Michael Kruse2016-09-301-9/+9
| | | | | | | | | | | Add missing __isl_(give/take/keep) annotations to IslPtr<> and NonowningIslPtr<> methods. Because IslPtr's constructor's annotation would depend on the TakeOwnership parameter, the parameter has been removed. Caller must copy the object themselves if the do not want to take ownership. llvm-svn: 282883
* [compiler-rt] Add support for the dynamic shadow allocationEtienne Bergeron2016-09-309-9/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch is adding support for dynamic shadow allocation. This is a merge and re-commit of the following patches. ``` [compiler-rt] Fix Asan build on Android https://reviews.llvm.org/D24768 [compiler-rt] Add support for the dynamic shadow allocation https://reviews.llvm.org/D23363 ``` This patch needed to re-land at the same time: ``` [asan] Support dynamic shadow address instrumentation https://reviews.llvm.org/D23354 ``` Reviewers: rnk, zaks.anna Subscribers: tberghammer, danalbert, kubabrecka, dberris, chrisha, llvm-commits Differential Revision: https://reviews.llvm.org/D25104 llvm-svn: 282882
* [asan] Support dynamic shadow address instrumentationEtienne Bergeron2016-09-302-7/+85
| | | | | | | | | | | | | | | | | | | Summary: This patch is adding the support for a shadow memory with dynamically allocated address range. The compiler-rt needs to export a symbol containing the shadow memory range. This is required to support ASAN on windows 64-bits. Reviewers: kcc, rnk, vitalybuka Subscribers: zaks.anna, kubabrecka, dberris, llvm-commits, chrisha Differential Revision: https://reviews.llvm.org/D23354 llvm-svn: 282881
* [CUDA] Make lambdas inherit __host__ and __device__ attributes from the ↵Justin Lebar2016-09-305-1/+146
| | | | | | | | | | | | | | scope in which they're created. Summary: NVCC compat. Fixes bug 30567. Reviewers: tra Subscribers: cfe-commits, rnk Differential Revision: https://reviews.llvm.org/D25105 llvm-svn: 282880
* [CUDA] Handle attributes on CUDA lambdas appearing between [...] and (...).Justin Lebar2016-09-302-7/+45
| | | | | | | | | | | | Summary: This is ugh, but it makes us compatible with NVCC. Fixes bug 26341. Reviewers: rnk Subscribers: cfe-commits, tra Differential Revision: https://reviews.llvm.org/D25103 llvm-svn: 282879
* [CUDA] Add missing comment on Sema::CheckCUDAVLA.Justin Lebar2016-09-301-0/+3
| | | | llvm-svn: 282878
* [AMDGPU] Choose VMCNT, EXPCNT, LGKMCNT masks and shifts based on the isa versionKonstantin Zhuravlyov2016-09-305-16/+69
| | | | | | Differential Revision: https://reviews.llvm.org/D24973 llvm-svn: 282877
* [test] Support 'lit' executable nameMichal Gorny2016-09-301-1/+1
| | | | | | | | | Support finding lit as plain 'lit', which is the name used by setup.py in LLVM's utils/lit. Differential Revision: https://reviews.llvm.org/D25072 llvm-svn: 282876
* [AMDGPU] Ask subtarget if waitcnt instruction is needed before barrier ↵Konstantin Zhuravlyov2016-09-302-2/+9
| | | | | | | | instruction Differential Revision: https://reviews.llvm.org/D24985 llvm-svn: 282875
* [Support] Compile fix for gcc. NFC.Michael Kruse2016-09-301-2/+4
| | | | | | | | | | | | gcc 5.4 insists on template specialization to be in a namespace polly { ... } block, instead of being prefixed with 'polly::'. Error message: root/src/llvm/tools/polly/lib/Support/GICHelper.cpp:203:54: error: specialization of ‘template<class T> void polly::IslPtr<T>::dump() const’ in different namespace [-fpermissive] template <> void polly::IslPtr<isl_##TYPE>::dump() const { \ ^ msvc14 and clang 3.8 did not complain. llvm-svn: 282874
* [AMDGPU] Do not run scalar optimization passes at "-O0"Konstantin Zhuravlyov2016-09-301-2/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D25055 llvm-svn: 282873
* CVP. Turn marking adds as no wrap on by default (was turned off by 279082)Artur Pilipenko2016-09-301-1/+1
| | | | | | With 282650 in tree extra no wrap on adds doesn't cause regressions anymore. Reenable the optimzation. llvm-svn: 282872
* Add namespace qualifiers for UTF functions that just moved.Adrian McCarthy2016-09-302-6/+6
| | | | llvm-svn: 282871
* [Support] Add (Nonowning-)IslPtr::dump(). NFC.Michael Kruse2016-09-302-0/+37
| | | | | | | | | | | | The dump() methods can be called from a debugger instead of e.g. isl_*_dump(Var.Obj) where Var is a variable of type IslPtr/NonowningIslPtr. To ensure that the existence of the function pointers do not depdend on whether the methods are used somwhere, they are declared with external linkage. llvm-svn: 282870
* Skip TestRuntimeIvars on i386; the Objective-C V1 runtime doesn't list ivars.Sean Callanan2016-09-301-1/+1
| | | | llvm-svn: 282869
* Fix incorrect OpenMP version in Fortran module.Jonathan Peyton2016-09-303-3/+9
| | | | | | | | | | | | | Add check for "45" version to use "201511" string for OpenMP 4.5, otherwise "200505" is used in Fortran module. Also, fix kmp_openmp_version variable (used for the debugger, e.g.) and kmp_version_omp_api that is used in KMP_VERSION=1 output. Patch by Olga Malysheva Differential Revision: https://reviews.llvm.org/D24761 llvm-svn: 282868
* Resubmit "Add llvm::enumerate() to STLExtras."Zachary Turner2016-09-302-0/+121
| | | | | | | | The CL was originally failing due to the use of some C++14 specific features, so I've removed those. Hopefully this will satisfy the bots. llvm-svn: 282867
* Again fixing windows build breakage like in rL282862Dimitar Vlahovski2016-09-301-2/+2
| | | | llvm-svn: 282866
* [CUDA][OpenMP] Add a generic offload action builderSamuel Antao2016-09-305-285/+682
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch proposes a new class to generate and record action dependences related with offloading. The builder provides three main functionalities: - Add device dependences to host actions. - Add host dependence to device actions. - Register device top-level actions. The constructor of the builder detect the programming models that should be supported, and generates a specialized builder for each. If a new programming model is to be added in the future, only a new specialized builder has to be implemented. When the specialized builder is generated, it produces programming-model-specific diagnostics. A CUDA specialized builder is proposed in the patch that mostly consists of the partition of the current `buildCudaAction` by the three different functionalities. Reviewers: tra, echristo, ABataev, jlebar, hfinkel Subscribers: Hahnfeld, whchung, guansong, jlebar, mehdi_amini, andreybokhanko, tcramer, mkuron, cfe-commits, arpith-jacob, carlo.bertolli, caomhin Differential Revision: https://reviews.llvm.org/D18172 llvm-svn: 282865
* [Support] Call isl_*_free() only on non-null pointers. NFC.Michael Kruse2016-09-301-2/+6
| | | | | | | | | | | | Add a non-NULL check before calling the free function into functions that are supposed to be inlined. First, this is a form of partial inlining of the free function, namely the nullptr test that free has to do. Secondly, and more importantly, it allows the compiler to remove the call to isl_*_free() when it knows that the object is nullptr, for instance because the last call is a take(). "Consuming" the last use of an ISL object using take() (instead of copy()) is a common pattern. llvm-svn: 282864
* [LV] Build all scalar steps for non-uniform induction variablesMatthew Simpson2016-09-302-14/+100
| | | | | | | | | | | | | | | | When building the steps for scalar induction variables, we previously attempted to determine if all the scalar users of the induction variable were uniform. If they were, we would only emit the step corresponding to vector lane zero. This optimization was too aggressive. We generally don't know the entire set of induction variable users that will be scalar. We have isScalarAfterVectorization, but this is only a conservative estimate of the instructions that will be scalarized. Thus, an induction variable may have scalar users that aren't already known to be scalar. To avoid emitting unused steps, we can only check that the induction variable is uniform. This should fix PR30542. Reference: https://llvm.org/bugs/show_bug.cgi?id=30542 llvm-svn: 282863
* Fixing windows build breakage caused by rL282822Dimitar Vlahovski2016-09-301-10/+10
| | | | | | | The breakage was because of the moving of the UTF functions to the llvm namespace llvm-svn: 282862
* [CodeGen] Change 'Scalar' to 'Array' in method names. NFC.Michael Kruse2016-09-302-15/+14
| | | | | | | | | | | | | generateScalarLoad() and generateScalarStore() are used for explicit (MK_Array) memory accesses, therefore the method names were misleading. The names also were similar to generateScalarLoads() and generateScalarStores() (plural forms) which indeed handle scalar accesses. Presumbly, they were originally named to contrast VectorBlockGenerator::generateLoad(). Rename the two methods to generateArrayLoad(), respectively generateArrayStore(). llvm-svn: 282861
* [compiler-rt][asan] Disable a broken test on windows 64-bitsEtienne Bergeron2016-09-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This test is broken on wndows 64-bit. The interception library is not able to hook on the memchr functions. Snippet of the function that is not hookable: ``` --- No source file ------------------------------------------------------------- 000007FEFA1A18CD CC int 3 000007FEFA1A18CE CC int 3 000007FEFA1A18CF CC int 3 --- f:\dd\vctools\crt\vcruntime\src\string\amd64_arm_arm64\memchr.c ------------ while ( cnt && (*(unsigned char *)buf != (unsigned char)chr) ) { 000007FEFA1A18D0 4D 85 C0 test r8,r8 000007FEFA1A18D3 74 0D je memchr+12h (07FEFA1A18E2h) 000007FEFA1A18D5 38 11 cmp byte ptr [rcx],dl 000007FEFA1A18D7 74 09 je memchr+12h (07FEFA1A18E2h) buf = (unsigned char *)buf + 1; 000007FEFA1A18D9 48 FF C1 inc rcx cnt--; 000007FEFA1A18DC 49 83 E8 01 sub r8,1 000007FEFA1A18E0 75 F3 jne memchr+5h (07FEFA1A18D5h) } ``` Reviewers: rnk Subscribers: kubabrecka, dberris, llvm-commits, chrisha Differential Revision: https://reviews.llvm.org/D25037 llvm-svn: 282860
* [compiler-rt][asan] Fix incorrect regexp breaking an asan unittest on win64Etienne Bergeron2016-09-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: On windows, the memcpy and memmove function can be the same. This is correcly detected when hooking, but it's not possible to report the right function name when doing symbolisation. The same fix was applied for the static asan unittest. We forgot to apply the fix for the dynamic asan tests. ``` lvm\projects\compiler-rt\test\asan/TestCases/Windows/.svn/text-base/intercept_memcpy.cc.svn-base:// CHECK-NEXT: __asan_{{.*}}mem{{.*}} ``` This patch is fixing this test (win64): ``` ddressSanitizer-x86_64-windows-dynamic :: TestCases/Windows/dll_intercept_memcpy_indirect.cc ``` Reviewers: rnk, vitalybuka Subscribers: llvm-commits, kubabrecka, chrisha, dberris Differential Revision: https://reviews.llvm.org/D25038 llvm-svn: 282859
* Strip trailing whitespace (NFCI)Simon Pilgrim2016-09-301-167/+167
| | | | llvm-svn: 282858
* Fix int <= bool comparison warning on MSVCSimon Pilgrim2016-09-301-2/+5
| | | | llvm-svn: 282857
* [AVR] Add the ELF object file writerDylan McKay2016-09-302-0/+128
| | | | | | | | | | | | Summary: This adds the ELF32 writer for AVR. Reviewers: kparzysz Subscribers: beanz, mgorny Differential Revision: https://reviews.llvm.org/D25031 llvm-svn: 282856
* Revert "[RegAllocGreedy] Attempt to split unspillable live intervals"Dylan McKay2016-09-302-86/+6
| | | | | | It was accidentally committed. llvm-svn: 282855
* [AVR] Add the assembly instruction printerDylan McKay2016-09-306-2/+260
| | | | | | | | | | | | | | | | | Summary: This change adds the AVR assembly instruction printer. No tests are included in this patch. I have left them downstream so we can add them once `llc` successfully runs (there's very few components left to upstream until this). Reviewers: arsenm, kparzysz Subscribers: wdng, beanz, mgorny Differential Revision: https://reviews.llvm.org/D25028 llvm-svn: 282854
* [CodeGen] Add assertion for partial scalar accesses. NFC.Michael Kruse2016-09-301-0/+18
| | | | | | | The code generator always adds unconditional LoadInst and StoreInst, hence the MemoryAccess must be defined over all statement instances. llvm-svn: 282853
* [RegAllocGreedy] Attempt to split unspillable live intervalsDylan McKay2016-09-302-6/+86
| | | | | | | | | | | | | | | | | | | | | | | Summary: Previously, when allocating unspillable live ranges, we would never attempt to split. We would always bail out and try last ditch graph recoloring. This patch changes this by attempting to split all live intervals before performing recoloring. This fixes LLVM bug PR14879. I can't add test cases for any backends other than AVR because none of them have small enough register classes to trigger the bug. Reviewers: qcolombet Subscribers: MatzeB Differential Revision: https://reviews.llvm.org/D25070 llvm-svn: 282852
* [ELF] - Inlined template argument variable. NFC.George Rimar2016-09-301-3/+2
| | | | llvm-svn: 282851
* [ELF] - Removed excessive variables. NFC.George Rimar2016-09-301-4/+2
| | | | llvm-svn: 282850
* XFAIL TestSBData for gcc-4.9 i386Pavel Labath2016-09-301-0/+1
| | | | | | test broken in r282659. llvm-svn: 282849
* Fix PDB unittests on non-windows platformsPavel Labath2016-09-301-1/+1
| | | | | | | llvm r282788 changed how the presence of windows DIA SDK is signalled. Adjust to that. llvm-svn: 282848
* Fix another --gc-sections crash.Rafael Espindola2016-09-302-0/+9
| | | | | | | The missing case was when a merge section was only referenced from non-alloca sections. llvm-svn: 282847
* Cosmetic fix: deleted unnecessary line break in comment.Victor Leschuk2016-09-301-2/+1
| | | | llvm-svn: 282846
* Fix --gc-sections crash.Rafael Espindola2016-09-302-1/+24
| | | | | | | | | | We would crash when a non-alloca section pointed to a gced part of a merge section. That can happen when a C/c++ constant in put in a merge section and debug info is present. llvm-svn: 282845
* [CMake] Support symlinks even with LLVM_INSTALL_TOOLCHAIN_ONLYPetr Hosek2016-09-301-3/+3
| | | | | | | | | | When LLVM_INSTALL_TOOLCHAIN_ONLY is used and LLVM_TOOLCHAIN_TOOLS contains a tool which is a symlink, it would be ignored. This already worked before but got broken in r282510. Differential Revision: https://reviews.llvm.org/D25067 llvm-svn: 282844
* [AVX-512] Store address operand should be an input operand for the special ↵Craig Topper2016-09-301-4/+4
| | | | | | stack spilling pseudos for XMM16-31 and YMM16-31 without VLX. llvm-svn: 282843
* [AVX-512] Add the special stack spilling pseudos for XMM16-31 and YMM16-31 ↵Craig Topper2016-09-301-0/+8
| | | | | | without VLX to teh isFrameLoadOpcode and isFrameStoreOpcode. llvm-svn: 282842
* Revert r282835 "[AVX-512] Always use the full 32 register vector classes for ↵Craig Topper2016-09-303-81/+98
| | | | | | | | addRegisterClass regardless of whether AVX512/VLX is enabled or not." Turns out this doesn't pass verify-machineinstrs. llvm-svn: 282841
* [libfuzzer] test for c-ares CVE-2016-5180Kostya Serebryany2016-09-303-0/+50
| | | | llvm-svn: 282839
* [LDist] Port to new streaming API for opt remarksAdam Nemet2016-09-301-17/+26
| | | | llvm-svn: 282838
* [change-namespace] fix namespace specifier of global variables.Eric Liu2016-09-302-3/+86
| | | | | | | | | | Reviewers: hokein Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D24963 llvm-svn: 282837
* [X86] Add AVX-512 VTs to findRepresentativeClass as well as v16i16 which was ↵Craig Topper2016-09-301-3/+5
| | | | | | | | also missing. Change register class to include the extra 16 AVX512 registers. I'm not completely sure what this method does or why all the 256-bit VTs returned VR128RegClass when the comments on the method definiton say it should return the largest super register class. I just figured AVX-512 should be similar. llvm-svn: 282836
* [AVX-512] Always use the full 32 register vector classes for ↵Craig Topper2016-09-303-98/+81
| | | | | | | | | | addRegisterClass regardless of whether AVX512/VLX is enabled or not. If AVX512 is disabled, the registers should already be marked reserved. Pattern predicates and register classes on instructions should take care of most of the rest. Loads/stores and physical register copies for XMM16-31 and YMM16-31 without VLX have already been taken care of. I'm a little unclear why this changed the register allocation of the SSE2 run of the sad.ll test, but the registers selected appear to be valid after this change. llvm-svn: 282835
* [LoopUnroll] Port to the new streaming interface for opt remarks.Adam Nemet2016-09-302-31/+41
| | | | llvm-svn: 282834
* [thinlto] Don't decay threshold for hot callsitesPiotr Padlewski2016-09-303-25/+101
| | | | | | | | | | | | | | Summary: We don't want to decay hot callsites to import chains of hot callsites. The same mechanism is used in LIPO. Reviewers: tejohnson, eraman, mehdi_amini Subscribers: llvm-commits, mehdi_amini Differential Revision: https://reviews.llvm.org/D24976 llvm-svn: 282833
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