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* [llvm-objcopy] Add --globalize-symbol optionPaul Semel2018-04-273-3/+86
| | | | llvm-svn: 331068
* [clang-format/ObjC] Use getIdentifierInfo() instead of tok::identifierBen Hamilton2018-04-272-5/+33
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Previously, we checked tokens for `tok::identifier` to see if they were identifiers inside an Objective-C selector. However, this missed C++ keywords like `new` and `delete`. To fix this, this diff uses `getIdentifierInfo()` to find identifiers or keywords inside Objective-C selectors. Test Plan: New tests added. Ran tests with: % make -j16 FormatTests && ./tools/clang/unittests/Format/FormatTests Reviewers: djasper, jolesiak Reviewed By: djasper Subscribers: klimek, cfe-commits Differential Revision: https://reviews.llvm.org/D46143 llvm-svn: 331067
* [CodeGen] Use RegUnits to track register aliases (NFC)Jun Bum Lim2018-04-275-104/+112
| | | | | | | | | | | | | | Summary: Use RegUnits to track register aliases in PostRASink and AArch64LoadStoreOptimizer. Reviewers: thegameg, mcrosier, gberry, qcolombet, sebpop, MatzeB, t.p.northover, javed.absar Reviewed By: thegameg, sebpop Subscribers: javed.absar, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D45695 llvm-svn: 331066
* [X86] Split WriteFBlend/WriteFVarBlend/WriteFVarShuffle into XMM and YMM/ZMM ↵Simon Pilgrim2018-04-2712-106/+93
| | | | | | | | scheduler classes This removes all the WriteFBlend/WriteFVarBlend InstRW overrides - some WriteFVarShuffle remain to be fixed. llvm-svn: 331065
* Split .eh_frame sections in parellel.Rafael Espindola2018-04-275-15/+10
| | | | | | We can now split them in the same spot we split merge sections. llvm-svn: 331064
* [Modules][ObjC] ASTReader should add protocols for class extensionsBruno Cardoso Lopes2018-04-276-0/+43
| | | | | | | | | | | | During deserialization clang is currently missing the merging of protocols into the canonical interface for the class extension. This merging only currently happens during parsing and should also be considered during deserialization. rdar://problem/38724303 llvm-svn: 331063
* [AMDGPU][Waitcnt] Update a few tests to use default waitcnt pass ↵Mark Searles2018-04-274-4/+4
| | | | | | | | (si-insert-waitcnts) rather than old pass (si-insert-waits); this is a small step towards the overall goal of removing the old waitcnt pass, which is no longer maintained. Differential Revision: https://reviews.llvm.org/D46154 llvm-svn: 331062
* [GuardWidening] Add some clarifying comments about heuristics [NFC]Philip Reames2018-04-271-0/+8
| | | | llvm-svn: 331061
* [LoopGuardWidening] Split out a loop pass version of GuardWideningPhilip Reames2018-04-276-9/+128
| | | | | | | | The idea is to have a pass which performs the same transformation as GuardWidening, but can be run within a loop pass manager without disrupting the pass manager structure. As demonstrated by the test case, this doesn't quite get there because of issues with post dom, but it gives a good step in the right direction. the motivation is purely to reduce compile time since we can now preserve locality during the loop walk. This patch only includes a legacy pass. A follow up will add a new style pass as well. llvm-svn: 331060
* [docs] add fp-cast-overflow-workaround options to release notesSanjay Patel2018-04-271-3/+6
| | | | llvm-svn: 331059
* Split merge sections early.Rafael Espindola2018-04-276-23/+13
| | | | | | | | | | | | | | | Now that getSectionPiece is fast (uses a hash) it is probably OK to split merge sections early. The reason I want to do this is to split eh_frame sections in the same place. This does mean that we have to decompress early. Given that the only compressed sections are debug info, I don't think we are missing much. It is a small improvement: 0.5% on the geometric mean. llvm-svn: 331058
* [docs] more dashesSanjay Patel2018-04-271-1/+1
| | | | llvm-svn: 331057
* [docs] add -ffp-cast-overflow-workaround to the release notesSanjay Patel2018-04-271-0/+9
| | | | | | | | | This option was added with: D46135 rL331041 ...copying the text from UsersManual.rst for more exposure. llvm-svn: 331056
* [MC] Undo spurious commit added into r331052.Nirav Dave2018-04-2716-141/+23
| | | | llvm-svn: 331055
* [X86] Split WriteFHadd into XMM and YMM/ZMM scheduler classesSimon Pilgrim2018-04-2711-68/+22
| | | | | | This removes all the HADD/HSUB PS/PD InstRW overrides. llvm-svn: 331054
* Test commit removing trailing whitespaceStuart Brady2018-04-271-1/+1
| | | | llvm-svn: 331053
* [MC] Provide default value for IsResolved.Nirav Dave2018-04-2717-24/+142
| | | | llvm-svn: 331052
* [X86][AVX] Split WriteFLogic into XMM and YMM/ZMM scheduler classesSimon Pilgrim2018-04-2713-125/+92
| | | | | | This removes all the AND/ANDN/OR/XOR PS/PD InstRW overrides. llvm-svn: 331051
* [mips] Analyze and provide selection patterns microMIPSR6 branchesSimon Dardis2018-04-273-5/+51
| | | | | | | | | | | These branches were previously unanalyzable and unselectable. Add them and recognize how to generate their inverses. Reviewers: smaksimovic, atanasyan, abeserminji Differential Revision: https://reviews.llvm.org/D46113 llvm-svn: 331050
* Always normalize FileSpec paths.Greg Clayton2018-04-2712-210/+186
| | | | | | | | Always normalizing lldb_private::FileSpec paths will help us get a consistent results from comparisons when setting breakpoints and when looking for source files. This also removes a lot of complexity from the comparison routines. Modified the DWARF line table parser to use the normalized compile unit directory if needed. Differential Revision: https://reviews.llvm.org/D45977 llvm-svn: 331049
* [MC] Modify MCAsmStreamer to always build MCAssembler. NFCI.Nirav Dave2018-04-276-57/+97
| | | | llvm-svn: 331048
* [MC] Allow MCAssembler to be constructed without all subcomponents. NFCI.Nirav Dave2018-04-274-27/+50
| | | | llvm-svn: 331047
* [PPC64] Add offset to local entry point when calling functions without pltZaara Syeda2018-04-274-1/+135
| | | | | | | | | | | | | | PPC64 V2 ABI describes two entry points to a function. The global entry point sets up the TOC base pointer. When calling a local function, the call should branch to the local entry point rather than the global entry point. Section 3.4.1 describes using the 3 most significant bits of the st_other field to find out how many instructions there are between the local and global entry point. This patch adds the correct offset required to branch to the local entry point of a function. Differential Revision: https://reviews.llvm.org/D45729 llvm-svn: 331046
* Do not set RequiresNullTerminator. NFC.Rui Ueyama2018-04-271-1/+1
| | | | | | When reading object files, we don't need '\0' at end of each file. llvm-svn: 331045
* [AArch64] Place the first ldp at the end when ReverseCSRRestoreSeq is trueFrancis Visoiu Mistrih2018-04-272-30/+78
| | | | | | | | | | Put the first ldp at the end, so that the load-store optimizer can run and merge the ldp and the add into a post-index ldp. This didn't work in case no frame was needed and resulted in code size regressions. llvm-svn: 331044
* Mark test as @skipIfOutOfTreeDebugserverFrederic Riss2018-04-271-0/+1
| | | | | | This test will currently fail for people using the system debugserver. llvm-svn: 331043
* [CMake] Enable warnings for runtimesKostya Kortchinsky2018-04-271-0/+3
| | | | | | | | | | | | | | | | | | | | | Summary: `HandleLLVMOptions` adds `-w` to the cflags if `LLVM_ENABLE_WARNINGS` is not on. With `-w`, `check_cxx_compiler_flag` doesn't error out for unsupported flags (for example `-mcrc` on x86_64), and those flags end up being detected as working - and really they aren't. I am not entirely sure what the best way to solve this is, but setting `LLVM_ENABLE_WARNINGS` prior to including `HandleLLVMOptions` does the job. Reviewers: phosek, beanz Reviewed By: phosek Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D46079 llvm-svn: 331042
* [Driver, CodeGen] add options to enable/disable an FP cast optimizationSanjay Patel2018-04-278-0/+69
| | | | | | | | | | | | | | | | | | | | | | As discussed in the post-commit thread for: rL330437 ( http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20180423/545906.html ) We need a way to opt-out of a float-to-int-to-float cast optimization because too much existing code relies on the platform-specific undefined result of those casts when the float-to-int overflows. The LLVM changes associated with adding this function attribute are here: rL330947 rL330950 rL330951 Also as suggested, I changed the LLVM doc to mention the specific sanitizer flag that catches this problem: rL330958 Differential Revision: https://reviews.llvm.org/D46135 llvm-svn: 331041
* [SystemZ] Remove scheduling info from some Pseudo instructions (NFC).Jonas Paulsson2018-04-277-133/+22
| | | | | | | | If the MachineInstr uses a custom inserter and is then erased after instruction selection, there is no use for mapping it to a sched class. Review: Ulrich Weigand llvm-svn: 331040
* [ARM,AArch64] Add intrinsics for dot product instructionsOliver Stannard2018-04-276-0/+238
| | | | | | | | | | The ACLE spec which describes these intrinsics hasn't been published yet, but this is based on the final draft which will be published soon, and these have already been implemented by GCC. Differential revision: https://reviews.llvm.org/D46109 llvm-svn: 331039
* [ARM] Add __ARM_FEATURE_DOTPROD pre-defined macroOliver Stannard2018-04-273-0/+12
| | | | | | | | | | | | | | This adds a pre-defined macro to test if the compiler has support for the v8.2-A dot rpoduct intrinsics in AArch32 mode. The AAcrh64 equivalent has already been added by rL330229. The ACLE spec which describes this macro hasn't been published yet, but this is based on the final internal draft, and GCC has already implemented this. Differential revision: https://reviews.llvm.org/D46108 llvm-svn: 331038
* [LoopInterchange] Allow some loops with PHI nodes in the exit block.Florian Hahn2018-04-274-93/+259
| | | | | | | | | | | | | | | | | | | | We currently support LCSSA PHI nodes in the outer loop exit, if their incoming values do not come from the outer loop latch or if the outer loop latch has a single predecessor. In that case, the outer loop latch will be executed only if the inner loop gets executed. If we have multiple predecessors for the outer loop latch, it may be executed even if the inner loop does not get executed. This is a first step to support the case described in https://bugs.llvm.org/show_bug.cgi?id=30472 Reviewers: efriedma, karthikthecool, mcrosier Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D43237 llvm-svn: 331037
* [AArch64] Codegen for v8.2A dot product intrinsicsOliver Stannard2018-04-274-13/+174
| | | | | | | | | This adds IR intrinsics for the AArch64 dot-product instructions introduced in v8.2-A. Differential revisioon: https://reviews.llvm.org/D46107 llvm-svn: 331036
* [NVPTX] Turn on Loop/SLP vectorizationBenjamin Kramer2018-04-273-0/+54
| | | | | | | | | | | | | | | | | | | | Since PTX has grown a <2 x half> datatype vectorization has become more important. The late LoadStoreVectorizer intentionally only does loads and stores, but now arithmetic has to be vectorized for optimal throughput too. This is still very limited, SLP vectorization happily creates <2 x half> if it's a legal type but there's still a lot of register moving happening to get that fed into a vectorized store. Overall it's a small performance win by reducing the amount of arithmetic instructions. I haven't really checked what the loop vectorizer does to PTX code, the cost model there might need some more tweaks. I didn't see it causing harm though. Differential Revision: https://reviews.llvm.org/D46130 llvm-svn: 331035
* [X86] Replace some system instruction instregex single matches with instrs ↵Simon Pilgrim2018-04-277-85/+60
| | | | | | entry. NFCI. llvm-svn: 331034
* [mips] Fix how compiler fuse instructions to fmadd/fmsubAleksandar Beserminji2018-04-277-33/+94
| | | | | | | | | | This patch makes compiler does not fuse fmul and fadd/fsub into fmadd/fmsub by default. Instead, -fp-contract=fast option can be used when such behavior is desired. Differential Revision: https://reviews.llvm.org/D46057 llvm-svn: 331033
* [ARM] Codegen for v8.2A dot product intrinsicsOliver Stannard2018-04-273-26/+140
| | | | | | | | | This adds IR intrinsics for the ARM dot-product instructions introduced in v8.2-A. Differential revision: https://reviews.llvm.org/D46106 llvm-svn: 331032
* [clangd] Fix unicode handling, using UTF-16 where LSP requires it.Sam McCall2018-04-2712-111/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The Language Server Protocol unfortunately mandates that locations in files be represented by line/column pairs, where the "column" is actually an index into the UTF-16-encoded text of the line. (This is because VSCode is written in JavaScript, which is UTF-16-native). Internally clangd treats source files at UTF-8, the One True Encoding, and generally deals with byte offsets (though there are exceptions). Before this patch, conversions between offsets and LSP Position pretended that Position.character was UTF-8 bytes, which is only true for ASCII lines. Now we examine the text to convert correctly (but don't actually need to transcode it, due to some nice details of the encodings). The updated functions in SourceCode are the blessed way to interact with the Position.character field, and anything else is likely to be wrong. So I also updated the other accesses: - CodeComplete needs a "clang-style" line/column, with column in utf-8 bytes. This is now converted via Position -> offset -> clang line/column (a new function is added to SourceCode.h for the second conversion). - getBeginningOfIdentifier skipped backwards in UTF-16 space, which is will behave badly when it splits a surrogate pair. Skipping backwards in UTF-8 coordinates gives the lexer a fighting chance of getting this right. While here, I clarified(?) the logic comments, fixed a bug with identifiers containing digits, simplified the signature slightly and added a test. This seems likely to cause problems with editors that have the same bug, and treat the protocol as if columns are UTF-8 bytes. But we can find and fix those. Reviewers: hokein Subscribers: klimek, ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits Differential Revision: https://reviews.llvm.org/D46035 llvm-svn: 331029
* [RISCV] Add remat.ll test caseAlex Bradbury2018-04-271-0/+209
| | | | | | | This test case demonstrates suboptimal codegen due to the fact that simple constants aren't recognised as rematerialisable. llvm-svn: 331028
* [ARM] Enable misched for R52.David Green2018-04-272-1/+2
| | | | | | | | | Back when the R52 schedule was added in rL286949, there was no way to enable machine schedules in ARM for specific cores. Since then a target feature has been added. This enables the feature for R52, removing the need to manually specify compiler flags. llvm-svn: 331027
* [OpenCL] Add separate read_only and write_only pipe IR typesSven van Haastregt2018-04-277-54/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | SPIR-V encodes the read_only and write_only access qualifiers of pipes, so separate LLVM IR types are required to target SPIR-V. Other backends may also find this useful. These new types are `opencl.pipe_ro_t` and `opencl.pipe_wo_t`, which replace `opencl.pipe_t`. This replaces __get_pipe_num_packets(...) and __get_pipe_max_packets(...) which took a read_only pipe with separate versions for read_only and write_only pipes, namely: * __get_pipe_num_packets_ro(...) * __get_pipe_num_packets_wo(...) * __get_pipe_max_packets_ro(...) * __get_pipe_max_packets_wo(...) These separate versions exist to avoid needing a bitcast to one of the two qualified pipe types. Patch by Stuart Brady. Differential Revision: https://reviews.llvm.org/D46015 llvm-svn: 331026
* [IR] Do not assume that function pointers are alignedMikhail Maltsev2018-04-272-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The value tracking analysis uses function alignment to infer that the least significant bits of function pointers are known to be zero. Unfortunately, this is not correct for ARM targets: the least significant bit of a function pointer stores the ARM/Thumb state information (i.e., the LSB is set for Thumb functions and cleared for ARM functions). The original approach (https://reviews.llvm.org/D44781) introduced a new field for function pointer alignment in the DataLayout structure to address this. But it seems unlikely that optimizations based on function pointer alignment would bring much benefit in practice to justify the additional maintenance burden, so this patch simply assumes that function pointer alignment is always unknown. Reviewers: javed.absar, efriedma Reviewed By: efriedma Subscribers: kristof.beyls, llvm-commits, hfinkel, rogfer01 Differential Revision: https://reviews.llvm.org/D46110 llvm-svn: 331025
* [mips] Add support for Virtualization ASEPetar Jovanovic2018-04-2728-24/+679
| | | | | | | | | | | | | | | | | | | This includes Instructions: tlbginv, tlbginvf, tlbgp, tlbgr, tlbgwi, tlbgwr, hypcall mfgc0, mtgc0, mfhgc0, mthgc0, dmfgc0, dmtgc0, Assembler directives: .set virt, .set novirt, .module virt, .module novirt Attribute: virt .MIPS.abiflags: VZ (0x100) Patch by Vladimir Stefanovic. Differential Revision: https://reviews.llvm.org/D44905 llvm-svn: 331024
* tsan: improve "destroy of a locked mutex" reportsDmitry Vyukov2018-04-274-2/+52
| | | | | | | | | | | | | | | 1. Allow to suppress by current stack. We generally allow to suppress by all main stacks. Current is probably the stack one wants to use to suppress such reports. 2. Fix last lock stack restoration. We trimmed shadow value by storing it in u32. This magically worked for the test that provoked the report on the main thread. But this breaks for locks in any other threads. llvm-svn: 331023
* [SCEV] Add trivial case handling for umin utilities. NFC.Serguei Katkov2018-04-271-2/+11
| | | | | | | | | Reviewers: sanjoy, mkazantsev Reviewed By: mkazantsev Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46175 llvm-svn: 331022
* Make MultiplexASTDeserializationListener part of the API [NFC]Raphael Isemann2018-04-272-25/+22
| | | | | | | | | | | | | | | | | | | | | Summary: This patch moves the MultiplexASTDeserializationListener declaration into a public header. We're currently using this multiplexer in the cling interpreter to attach another ASTDeserializationListener during the execution (so, after the MultiplexConsumer is already attached which prevents us from attaching more). So far we're doing this by patching clang and making this class public, but it makes things easier if we make this instead just public in upstream. Reviewers: thakis, v.g.vassilev, rsmith, bruno Reviewed By: bruno Subscribers: llvm-commits, cfe-commits, v.g.vassilev Differential Revision: https://reviews.llvm.org/D37475 llvm-svn: 331021
* [CodeGen] Avoid destructing a callee-destructued struct type in aAkira Hatanaka2018-04-278-5/+157
| | | | | | | | | | | | | | | | | | | | | | | function if a function delegates to another function. Fix a bug introduced in r328731, which caused a struct with ObjC __weak fields that was passed to a function to be destructed twice, once in the callee function and once in another function the callee function delegates to. To prevent this, keep track of the callee-destructed structs passed to a function and disable their cleanups at the point of the call to the delegated function. This reapplies r331016, which was reverted in r331019 because it caused an assertion to fail in EmitDelegateCallArg on a windows bot. I made changes to EmitDelegateCallArg so that it doesn't try to deactivate cleanups for structs that have trivial destructors (cleanups for those structs are never pushed to the cleanup stack in EmitParmDecl). rdar://problem/39194693 Differential Revision: https://reviews.llvm.org/D45382 llvm-svn: 331020
* Revert "[CodeGen] Avoid destructing a callee-destructued struct type in a"Akira Hatanaka2018-04-277-143/+5
| | | | | | | | This reverts commit r331016, which broke a windows bot. http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/11727 llvm-svn: 331019
* [ELF] Fix typo. NFCFangrui Song2018-04-273-3/+3
| | | | llvm-svn: 331018
* Fix typo.Richard Smith2018-04-271-2/+2
| | | | llvm-svn: 331017
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