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* [PowerPC][NFC] Add tests for vector fp <-> int conversionsNemanja Ivanovic2018-11-1616-0/+14768
| | | | | | | | | This NFC patch just adds test cases for conversions that currently require scalarization of vectors. An updcoming patch will change the legalization for these and it is more suitable on the review to show the diferences in code gen rather than just the new code gen. llvm-svn: 347090
* AArch64: Emit a call frame instruction for the shadow call stack register.Peter Collingbourne2018-11-162-6/+26
| | | | | | | | | | When unwinding past a function that uses shadow call stack, we must subtract 8 from the value of the x18 register. This patch causes us to emit a call frame instruction that causes that to happen. Differential Revision: https://reviews.llvm.org/D54609 llvm-svn: 347089
* Add new interceptor for mi_vector_hash(3)Kamil Rytarowski2018-11-163-0/+37
| | | | | | | | | | | | | | | | | | | | | | | Summary: mi_vector_hash(3) provides fast 32bit hash functions. Add a test for this interface. Enable the API for NetBSD. Based on original work by Yang Zheng. Reviewers: joerg, vitalybuka Reviewed By: vitalybuka Subscribers: tomsun.0.7, kubamracek, llvm-commits, mgorny, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D54530 llvm-svn: 347088
* [Cocoa] Prefer llvm::SignExtend64. Pointed out by zturner.Davide Italiano2018-11-161-2/+1
| | | | llvm-svn: 347087
* [FNeg] Add FNeg Instruction to LangRef documentCameron McInally2018-11-161-3/+49
| | | | | | | | The FNeg IR Instruction code was added with D53877. Differential Revision: https://reviews.llvm.org/D54549 llvm-svn: 347086
* [libcxx] Add missing includes in testsLouis Dionne2018-11-1621-0/+24
| | | | | | | | | | | | | | | A bunch of unordered containers tests call library functions but don't directly include the corresponding header files: - fabs() (defined in <cmath> which is not included); - is_permutation() (defined in <algorithm> which is not included); - next() (defined in <iterator> which is not included). - As a result, these tests won't compile against some conformant libraries. Reviewed as https://reviews.llvm.org/D54643. Thanks to Andrey Maksimov for the patch. llvm-svn: 347085
* [SymbolFile] Remove unused function. NFCI.Davide Italiano2018-11-161-18/+0
| | | | llvm-svn: 347084
* Add new interceptor for getmntinfo(3) from NetBSDKamil Rytarowski2018-11-163-0/+45
| | | | | | | | | | | | | | | | | | | | | Summary: getmntinfo gets information about mounted file systems. Add a dedicated test for new interceptor. Based on original work by Yang Zheng. Reviewers: joerg, vitalybuka Reviewed By: vitalybuka Subscribers: tomsun.0.7, kubamracek, llvm-commits, mgorny, #sanitizers Tags: #sanitizers Differential Revision: https://reviews.llvm.org/D54611 llvm-svn: 347083
* [hwasan] optionally right-align heap allocationsKostya Serebryany2018-11-166-16/+170
| | | | | | | | | | | | | | | | | Summary: ... so that we can find intra-granule buffer overflows. The default is still to always align left. It remains to be seen wether we can enable this mode at scale. Reviewers: eugenis Reviewed By: eugenis Subscribers: jfb, dvyukov, kubamracek, delcypher, #sanitizers, llvm-commits Differential Revision: https://reviews.llvm.org/D53789 llvm-svn: 347082
* [OPENMP][NVPTX]Emit correct reduction code for teams/parallelAlexey Bataev2018-11-1611-284/+660
| | | | | | | | | | | reductions. Fixed previously committed code for the reduction support in teams/parallel constructs taking into account new design of the NVPTX support in the compiler. Teams reduction are not fully functional yet, it is going to be fixed in the following patches. llvm-svn: 347081
* [MSP430] Add RTLIB::[SRL/SRA/SHL]_I32 lowering to EABI lib callsAnton Korobeynikov2018-11-162-2/+42
| | | | | | | | Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D54626 llvm-svn: 347080
* [X86] Disable Condbr_merge passRong Xu2018-11-164-16/+15
| | | | | | | Disable Condbr_merge pass for now due to PR39658. Will reenable the pass once the bug is fixed. llvm-svn: 347079
* Support ARM_V4BX relocationFangrui Song2018-11-162-0/+44
| | | | | | | | | | | | | | | | Summary: This patch implementation the handler for ARM_V4BX. This relocation is used by GNU runtime files and other armv4 applications. Patch by Yin Ma Reviewers: espindola, MaskRay, ruiu, peter.smith, pcc Reviewed By: ruiu Subscribers: yinma, pcc, peter.smith, MaskRay, rovka, efriedma, emaste, javed.absar, arichardson, kristof.beyls, chrib, llvm-commits Differential Revision: https://reviews.llvm.org/D53444 llvm-svn: 347077
* Revert "[PowerPC] Make no-PIC default to match GCC - LLVM"Stefan Pintilie2018-11-1681-516/+585
| | | | | | This reverts commit r347069 llvm-svn: 347076
* Revert "[PowerPC] Make no-PIC default to match GCC - CLANG"Stefan Pintilie2018-11-163-36/+7
| | | | | | This reverts commit r347070 llvm-svn: 347075
* [MSP430] Use R_MSP430_16_BYTE type for FK_Data_2 fixupAnton Korobeynikov2018-11-162-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Linker fails to link example like this (simplified case from newlib sources): $ cat test.c extern const char _ctype_b[]; struct _t { char *ptr; }; struct _t T = { ((char *) _ctype_b + 3) }; $ cat ctype.c char _ctype_b[4] = { 0, 0, 0, 0 }; LD: test.o:(.data+0x0): warning: internal error: unsupported relocation error We also follow gnu toolchain here, where 2-byte relocation mapped to R_MSP430_16_BYTE, instead of R_MSP430_16. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D54620 llvm-svn: 347074
* [WebAssembly] Default to static reloc modelSam Clegg2018-11-163-7/+11
| | | | | | Differential Revision: https://reviews.llvm.org/D54637 llvm-svn: 347073
* [codeview] Expose -gcodeview-ghash for global type hashingReid Kleckner2018-11-169-8/+38
| | | | | | | | | | | | | | | | | | | | | Summary: Experience has shown that the functionality is useful. It makes linking optimized clang with debug info for me a lot faster, 20s to 13s. The type merging phase of PDB writing goes from 10s to 3s. This removes the LLVM cl::opt and replaces it with a metadata flag. After this change, users can do the following to use ghash: - add -gcodeview-ghash to compiler flags - replace /DEBUG with /DEBUG:GHASH in linker flags Reviewers: zturner, hans, thakis, takuto.ikuta Subscribers: aprantl, hiraditya, JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D54370 llvm-svn: 347072
* Make path more robust so it also works with out-of-tree builds.Adrian Prantl2018-11-161-1/+3
| | | | llvm-svn: 347071
* [PowerPC] Make no-PIC default to match GCC - CLANGStefan Pintilie2018-11-163-7/+36
| | | | | | | | Make the default -fno-PIC on Power PC. Differential Revision: https://reviews.llvm.org/D53384 llvm-svn: 347070
* [PowerPC] Make no-PIC default to match GCC - LLVMStefan Pintilie2018-11-1681-585/+516
| | | | | | | | Set -fno-PIC as the default option. Differential Revision: https://reviews.llvm.org/D53383 llvm-svn: 347069
* [CMake] Accept ENTITLEMENTS in add_llvm_executable and llvm_codesignStefan Granitz2018-11-162-8/+24
| | | | | | | | | | | | | | Summary: Allow code-signing with entitlements. FORCE may be used to avoid an error when replacing existing signatures. Reviewers: beanz, bogner Reviewed By: beanz Subscribers: mgorny, llvm-commits, lldb-commits Differential Revision: https://reviews.llvm.org/D54443 llvm-svn: 347068
* [SelectionDAG] Move (repeated) SDTIntShiftDOp double shift node def to ↵Simon Pilgrim2018-11-163-7/+3
| | | | | | | | common code. NFCI. Prep work for PR39467. llvm-svn: 347067
* [X86] Add codegen tests for scalar funnel shiftsSimon Pilgrim2018-11-162-0/+532
| | | | llvm-svn: 347066
* GlobalDCE: Teach isEmptyFunction() to ignore debug intrinsics.Adrian Prantl2018-11-162-6/+34
| | | | | | | This fixes PR39669. https://bugs.llvm.org/show_bug.cgi?id=39669 llvm-svn: 347065
* [AST][NFC] Pack CXXThisExprBruno Ricci2018-11-162-15/+27
| | | | | | | Use the newly available space in the bit-fields of Stmt. This saves 8 bytes per CXXThisExpr. llvm-svn: 347064
* [AST][NFC] Pack CXXNullPtrLiteralExprBruno Ricci2018-11-162-9/+18
| | | | | | | Use the newly available space in the bit-fields of Stmt. This saves one pointer per CXXNullPtrLiteralExpr. llvm-svn: 347063
* [AST][NFC] Pack CXXBoolLiteralExprBruno Ricci2018-11-162-12/+24
| | | | | | | Use the newly available space in Stmt. This saves 8 bytes per CXXBoolLiteralExpr. llvm-svn: 347062
* [CodeGen] Expose some data types and accessors from StackMapsThan McIntosh2018-11-161-19/+25
| | | | | | | | | | | | | | | | | | | | Summary: This is for supporting custom stack map formats, where the custom printer can access the stack map data. Patch by Cherry Zhang <cherryyz@google.com>. Related: https://reviews.llvm.org/D53892 Reviewers: thanm, apilipenko Reviewed By: apilipenko Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D54224 llvm-svn: 347061
* [InstSimplify] add tests for saturating add/sub; NFCSanjay Patel2018-11-161-0/+448
| | | | | | | | These are baseline tests for D54532. Patch based on the original tests by: @nikic (Nikita Popov) llvm-svn: 347060
* [OpenCL] Enable address spaces for references in C++Anastasia Stulova2018-11-169-31/+121
| | | | | | | | | | | | | Added references to the addr spaces deduction and enabled CL2.0 features (program scope variables and storage class qualifiers) to work in C++ mode too. Fixed several address space conversion issues in CodeGen for references. Differential Revision: https://reviews.llvm.org/D53764 llvm-svn: 347059
* TypoAdrian Prantl2018-11-161-1/+1
| | | | llvm-svn: 347058
* Use a shared module cache directory for LLDB.Adrian Prantl2018-11-162-3/+4
| | | | | | | | | | | | | This saves about 3 redundant gigabytes from the Objective-C test build directories. Tests that must do unsavory things with the LLDB clang module cache, already specify a per-test module cache in their .py test instructions. <rdar://problem/36002081> Differential Revision: https://reviews.llvm.org/D54602 llvm-svn: 347057
* Makefile.rules: Use a shared clang module cache directory.Adrian Prantl2018-11-162-2/+19
| | | | | | | | | | | | | | | Just to be safe, up until now each test used its own Clang module cache directory. Since the compiler within one testsuite doesn't change it is just as safe to share a clang module directory inside the LLDB test build directory. This saves us from compiling tens of gigabytes of redundant Darwin and Foundation .pcm files and also speeds up running the test suite quite significantly. rdar://problem/36002081 Differential Revision: https://reviews.llvm.org/D54601 llvm-svn: 347056
* [InstSimplify] add test to demonstrate undef matching differences; NFCSanjay Patel2018-11-161-0/+25
| | | | | | | | This is a baseline test for D54631. Patch by: @nikic (Nikita Popov) llvm-svn: 347055
* [X86][SSE] Move number of input limit out of resolveTargetShuffleInputs. Simon Pilgrim2018-11-161-3/+5
| | | | | | Only combineX86ShufflesRecursively needs this limit. llvm-svn: 347054
* [clang-tidy] Expanded a test NFCAlexander Kornienko2018-11-161-8/+30
| | | | | | | Expanded the readability-inconsistent-declaration-parameter-name-macros.cpp to check notes and added a test with pasted tokens. llvm-svn: 347053
* [libcxx] Mention restriction on inline namespaces in LIBCXX_ABI_NAMESPACE docsLouis Dionne2018-11-161-1/+3
| | | | | | | | | | I also kept the original "vague" documentation that saying that users are responsible for not breaking us. This doesn't mean anything because there's no way they can actually enforce that unless we restrict ourselves to a specific naming scheme, but I left the documentation because it acts as a good warning and gives us more leeway. llvm-svn: 347052
* [x86] regenerate complete checks for test; NFCSanjay Patel2018-11-161-30/+49
| | | | llvm-svn: 347051
* [IRVerifier] Allow StructRet in statepointThan McIntosh2018-11-162-2/+32
| | | | | | | | | | | | | | | | | | Summary: StructRet attribute is not allowed in vararg calls. The statepoint intrinsic is vararg, but the wrapped function may be not. Allow calls of statepoint with StructRet arg, as long as the wrapped function is not vararg. Reviewers: thanm, anna Reviewed By: anna Subscribers: anna, llvm-commits Differential Revision: https://reviews.llvm.org/D53602 llvm-svn: 347050
* [DWARF] Use PRIx64 instead of 'x' to format 64-bit valuesSimon Atanasyan2018-11-161-2/+2
| | | | | | | | This is a follow-up to r346715. Use PRIx64 to formatted print of 64-bit value in the `DWARFDebugLoclists::LocationList::dump` to escape problem on big-endian hosts. llvm-svn: 347049
* [X86] X86DAGToDAGISel::matchBitExtract(): extract 'lshr' from `X`Roman Lebedev2018-11-162-231/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: As discussed in previous review, and noted in the FIXME, if `X` is actually an `lshr Y, Z` (logical!), we can fold the `Z` into 'control`, and let the `BEXTR` do this too. We could just insert those 8 bits of shift amount into control, but it is better to instead zero-extend them, and 'or' them in place. We can only do this for `lshr`, not `ashr`, because we do not know that the mask cover only the bits of `Y`, and not any of the sign-extended bits. The obvious question is, is this actually legal to do? I believe it is. Relevant quotes, from `Intel® 64 and IA-32 Architectures Software Developer’s Manual`, `BEXTR — Bit Field Extract`: * `Bit 7:0 of the second source operand specifies the starting bit position of bit extraction.` * `A START value exceeding the operand size will not extract any bits from the second source operand.` * `Only bit positions up to (OperandSize -1) of the first source operand are extracted.` * `All higher order bits in the destination operand (starting at bit position LENGTH) are zeroed.` * `The destination register is cleared if no bits are extracted.` FIXME: if we can do this, i wonder if we should prefer `BEXTR` over `BZHI` in such cases. Reviewers: RKSimon, craig.topper, spatel, andreadb Reviewed By: RKSimon, craig.topper, andreadb Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D54095 llvm-svn: 347048
* [lldb] NFC: Remove the extra ';'Henry Wong2018-11-161-1/+1
| | | | | | | | | | | | | | | | | | | | Summary: Remove extra `;` to eliminate the following pedantic warning. ``` warning: extra ';' [-Wpedantic] ``` Reviewers: shafik Reviewed By: shafik Subscribers: abidh, lldb-commits Differential Revision: https://reviews.llvm.org/D54528 llvm-svn: 347047
* Remove BUILD file from google-benchmarkBenjamin Kramer2018-11-161-65/+0
| | | | | | This was removed in r336666, but accidentally re-added in r346984. llvm-svn: 347046
* [TargetLowering] Cleanup more of the EXTEND demanded bits cases so that they ↵Simon Pilgrim2018-11-161-10/+11
| | | | | | | | match. NFCI. Use the same variable names etc. llvm-svn: 347045
* [clangd] Truncate SymbolID to 8 bytes.Haojian Wu2018-11-163-12/+11
| | | | | | | | | | | | | | Summary: This is our goal. It has a non-zero rick, but so far we haven't see any collision (externally and internally). Reviewers: sammccall Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits Differential Revision: https://reviews.llvm.org/D54622 llvm-svn: 347044
* [RISCV][NFC] Define and use the new CA instruction formatAlex Bradbury2018-11-164-19/+31
| | | | | | | | | | | | The RISC-V ISA manual was updated on 2018-11-07 (commit 00557c3) to define a new compressed instruction format, RVC format CA (no actual instruction encodings were changed). This patch updates the RISC-V backend to define the new format, and to use it in the relevant instructions. Differential Revision: https://reviews.llvm.org/D54302 Patch by Luís Marques. llvm-svn: 347043
* [RISCV] Constant materialisation for RV64IAlex Bradbury2018-11-162-8/+232
| | | | | | | | | | | | | | | | | | | | | | | This commit introduces support for materialising 64-bit constants for RV64I, making use of the RISCVMatInt::generateInstSeq helper in order to share logic for immediate materialisation with the MC layer (where it's used for the li pseudoinstruction). test/CodeGen/RISCV/imm.ll is updated to test RV64, and gains new 64-bit constant tests. It would be preferable if anyext constant returns were sign rather than zero extended (see PR39092). This patch simply adds an explicit signext to the returns in imm.ll. Further optimisations for constant materialisation are possible, most notably for mask-like values which can be generated my loading -1 and shifting right. A future patch will standardise on the C++ codepath for immediate selection on RV32 as well as RV64, and then add further such optimisations to RISCVMatInt::generateInstSeq in order to benefit both RV32 and RV64 for codegen and li expansion. Differential Revision: https://reviews.llvm.org/D52962 llvm-svn: 347042
* [MSP430] Add support for .refsym directiveAnton Korobeynikov2018-11-162-0/+27
| | | | | | | | | | | | | | | Introduces support for '.refsym' assembler directive. From GCC docs (for MSP430): '.refsym' - This directive instructs assembler to add an undefined reference to the symbol following the directive. No relocation is created for this symbol; it will exist purely for pulling in object files from archives. Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D54618 llvm-svn: 347041
* [MSP430] Add more tests for ABI and calling conventionAnton Korobeynikov2018-11-165-2/+222
| | | | | | | | Patch by Kristina Bessonova! Differential Revision: https://reviews.llvm.org/D54582 llvm-svn: 347040
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