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* [clangd] Adapt file migration in r332720Eric Liu2018-05-182-1/+2
| | | | llvm-svn: 332721
* Move #include manipulation code to new lib/Tooling/Inclusions.Eric Liu2018-05-1811-15/+26
| | | | | | | | | | | | | | | Summary: clangToolingCore is linked into almost everything (incl. clang), but not few tools need #include manipulation at this point. So pull this into a separate library in Tooling. Reviewers: ilya-biryukov Subscribers: klimek, mgorny, cfe-commits, thakis Differential Revision: https://reviews.llvm.org/D47068 llvm-svn: 332720
* [DWARF] Extract indexing code into a separate class hierarchyPavel Labath2018-05-1812-702/+911
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This places the `if(m_using_apple_tables)` branches inside the SymbolFileDWARF class behind an abstract DWARFIndex class. The class currently has two implementations: - AppleIndex, which searches using .apple_names and friends - ManualIndex, which searches using a manually built index Most of the methods of the class are very simple, and simply extract the list of DIEs for the given name from the appropriate sub-table. The main exception are the two GetFunctions overloads, which take a couple of extra paramenters, including some callbacks. It was not possible to split these up the same way as other methods, as here we were doing a lot of post-processing on the results. The post-processing is similar for the two cases, but not identical. I hope to factor these further in separate patches. Other interesting methods are: - Preload(): do any preprocessing to make lookups faster (noop for AppleIndex, forces a build of the lookup tables for ManualIndex). - ReportInvalidDIEOffset(): Used to notify the users of an invalid index (prints a message for AppleIndex, noop for ManualIndex). - Dump(): dumps the index state (noop for AppleIndex, prints the lookup tables for ManualIndex). Reviewers: clayborg, JDevlieghere Subscribers: mgorny, aprantl, lldb-commits Differential Revision: https://reviews.llvm.org/D46889 llvm-svn: 332719
* [X86][SSE] Ensure vector partial load/stores use the ↵Simon Pilgrim2018-05-1812-77/+49
| | | | | | | | | | WriteVecLoad/WriteVecStore scheduler classes Retag some instructions that were missed when we split off vector load/store/moves - MOVQ/MOVD etc. Fixes BtVer2/SLM which have different behaviours for GPR stores. llvm-svn: 332718
* [VFS] Implement getRealPath for OverlayFileSystem.Eric Liu2018-05-183-1/+59
| | | | | | | | | | Reviewers: bkramer Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D47060 llvm-svn: 332717
* Silence a truncation warning; NFC.Aaron Ballman2018-05-181-1/+1
| | | | llvm-svn: 332716
* [X86][AVX] VEXTRACTF128mr store is a WriteFStoreX not WriteFStoreSimon Pilgrim2018-05-181-1/+1
| | | | llvm-svn: 332715
* [X86][SSE] Ensure float load/stores use the WriteFLoad/WriteFStore scheduler ↵Simon Pilgrim2018-05-187-50/+51
| | | | | | | | | | classes Retag some instructions that were missed when we split off vector load/store/moves - MOVSS/MOVSD/MOVHPD/MOVHPD/MOVLPD/MOVLPS etc. Fixes BtVer2/SLM which have different behaviours for GPR stores. llvm-svn: 332714
* [ExynosM3] Fix scheduling info.Clement Courbet2018-05-181-35/+35
| | | | | | Differential Revision: https://reviews.llvm.org/D46356 llvm-svn: 332713
* [X86][ZnVer1] Cleanup more single match instregexsSimon Pilgrim2018-05-181-52/+34
| | | | llvm-svn: 332712
* Add Script to match open Phabricator reviews with potential reviewers.Kristof Beyls2018-05-181-0/+616
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the last EuroLLVM, I gave a lightning talk about code review statistics on Phabricator reviews and what we could derive from that to try and reduce waiting-for-review bottlenecks. (see https://llvm.org/devmtg/2018-04/talks.html#Lightning_2). One of the items I pointed to is a script we've been using internally for a little while to try and match open Phabricator reviews to people who might be able to review them well. I received quite a few requests to share that script, so here it is. Warning: this is prototype quality! The script uses 2 similar heuristics to try and match open reviews with potential reviewers: If there is overlap between the lines of code touched by the patch-under-review and lines of code that a person has written, that person may be a good reviewer. If there is overlap between the files touched by the patch-under-review and the source files that a person has made changes to, that person may be a good reviewer. The script provides a percentage for each of the above heuristics and emails a summary. For example, a summary I received a few weeks ago from the script is the following: SUMMARY FOR kristof.beyls@arm.com (found 8 reviews): [3.37%/41.67%] https://reviews.llvm.org/D46018 '[GlobalISel][IRTranslator] Split aggregates during IR translation' by Amara Emerson [0.00%/100.00%] https://reviews.llvm.org/D46111 '[ARM] Enable misched for R52.' by Dave Green [0.00%/50.00%] https://reviews.llvm.org/D45770 '[AArch64] Disable spill slot scavenging when stack realignment required.' by Paul Walker [0.00%/40.00%] https://reviews.llvm.org/D42759 '[CGP] Split large data structres to sink more GEPs' by Haicheng Wu [0.00%/25.00%] https://reviews.llvm.org/D45189 '[MachineOutliner][AArch64] Keep track of functions that use a red zone in AArch64MachineFunctionInfo and use that instead of checking for noredzone in the MachineOutliner' by Jessica Paquette [0.00%/25.00%] https://reviews.llvm.org/D46107 '[AArch64] Codegen for v8.2A dot product intrinsics' by Oliver Stannard [0.00%/12.50%] https://reviews.llvm.org/D45541 '[globalisel] Update GlobalISel emitter to match new representation of extending loads' by Daniel Sanders [0.00%/6.25%] https://reviews.llvm.org/D44386 '[x86] Introduce the pconfig/enclv instructions' by Gabor Buella The first percentage in square brackets is the percentage of lines in the patch-under-review that changes lines that I wrote. The second percentage is the percentage of files that I made at least some changes to out of all of the files touched by the patch-under-review. Both the script and the heuristics are far from perfect, but I've heard positive feedback from the few colleagues the script has been sending a summary to every day - hearing that this does help them to quickly find patches-under-review they can help to review. The script takes quite some time to run (I typically see it running for 2 to 3 hours on weekdays when it gets started by a cron job early in the morning). There are 2 reasons why it takes a long time: The REST api into Phabricator isn't very efficient, i.e. a lot of uninteresting data needs to be fetched. The script tries to reduce this overhead partly by caching info it has fetched on previous runs, so as to not have to refetch lots of Phabricator state on each run. The script uses git blame to find for each line of code in the patch who wrote the original line of code being altered. git blame is sloooowww.... Anyway - to run this script: First install a virtualenv as follows (using Python2.7 - Python3 is almost certainly not going to work at the moment): $ virtualenv venv $ . ./venv/bin/activate $ pip install Phabricator Then to run the script, looking for open reviews that could be done by X.Y@company.com, run (in the venv): $ python ./find_interesting_reviews.py X.Y@company.com Please note that "X.Y@company.com" needs to be the exact email address (capitalization is important) that the git LLVM repository knows the person as. Multiple email addresses can be specified on the command line. Note that the script as is will email the results to all email addresses specified on the command line - so be careful not to spam people accidentally! Differential Revision: https://reviews.llvm.org/D46192 llvm-svn: 332711
* Add back #ifdef __APPLE__ to ↵Pavel Labath2018-05-182-3/+3
| | | | | | | | | | | RegisterContextDarwin_xxx::NumSupportedHardwareWatchpoints It turns out these class still contained some os-specific functionality, but I did not notice that originally, as it was #ifdef arm(64). This adds back the __APPLE__ condition to these particular functions, unbreaking arm builds on other OSs. llvm-svn: 332710
* use standard llvm cmake formatting for targets defined in plugin testsNico Weber2018-05-182-5/+15
| | | | llvm-svn: 332709
* [llvm-exegesis] Improve documentation.Clement Courbet2018-05-182-4/+138
| | | | | | | | | | | | | | | | | Summary: - Better flag names. - Fix flag reference in doc. - Add usage examples in doc. Fixes PR37497. Reviewers: gchatelet Subscribers: llvm-commits, tschuett Differential Revision: https://reviews.llvm.org/D47015 llvm-svn: 332708
* StackColoring: better handling of statically unreachable codeThan McIntosh2018-05-182-2/+164
| | | | | | | | | | | | | | Summary: Avoid assert/crash during liveness calculation in situations where the incoming machine function has statically unreachable BBs. Fixes PR37130. Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46265 llvm-svn: 332707
* [SystemZ] Fix commit message of previous commit.Jonas Paulsson2018-05-181-1/+1
| | | | | | | | | | | | | Sorry, the commit comment for r332703 is completely broken. My mind slipped - the right description would be: In SystemZDAGToDAGISel::Select(), in the handling for SELECT_CCMASK: Check if UpdateNodeOperands() returns a different SDNode and in that case call ReplaceNode. Review: Ulrich Weigand. llvm-svn: 332706
* [X86][CET] Changing -fcf-protection behavior to comply with gcc (LLVM part)Alexander Ivchenko2018-05-1813-30/+19
| | | | | | | | | | | | | | | | | | | | This patch aims to match the changes introduced in gcc by https://gcc.gnu.org/ml/gcc-cvs/2018-04/msg00534.html. The IBT feature definition is removed, with the IBT instructions being freely available on all X86 targets. The shadow stack instructions are also being made freely available, and the use of all these CET instructions is controlled by the module flags derived from the -fcf-protection clang option. The hasSHSTK option remains since clang uses it to determine availability of shadow stack instruction intrinsics, but it is no longer directly used. Comes with a clang patch (D46881). Patch by mike.dvoretsky Differential Revision: https://reviews.llvm.org/D46882 llvm-svn: 332705
* This patch aims to match the changes introducedAlexander Ivchenko2018-05-1815-56/+46
| | | | | | | | | | | | | | | | | in gcc by https://gcc.gnu.org/ml/gcc-cvs/2018-04/msg00534.html. The -mibt feature flag is being removed, and the -fcf-protection option now also defines a CET macro and causes errors when used on non-X86 targets, while X86 targets no longer check for -mibt and -mshstk to determine if -fcf-protection is supported. -mshstk is now used only to determine availability of shadow stack intrinsics. Comes with an LLVM patch (D46882). Patch by mike.dvoretsky Differential Revision: https://reviews.llvm.org/D46881 llvm-svn: 332704
* [SystemZ] Fold AHIMux in foldMemoryOperandImpl.Jonas Paulsson2018-05-182-1/+45
| | | | | | | AHIMux can be folded the same way as AHI. Review: Ulrich Weigand llvm-svn: 332703
* Make ObjectFileMachO work on non-darwin platformsPavel Labath2018-05-186-31/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Before this patch we were unable to write cross-platform MachO tests because the parsing code did not compile on other platforms. The reason for that was that ObjectFileMachO depended on RegisterContextDarwin_arm(64)? (presumably for core file parsing) and the two Register Context classes uses constants from the system headers (KERN_SUCCESS, KERN_INVALID_ARGUMENT). As far as I can tell, these two files don't actually interact with the darwin kernel -- they are used only in ObjectFileMachO and MacOSX-Kernel process plugin (even though it has "kernel" in the name, this one communicates with it via network packets and not syscalls). For the time being I have created OS-independent definitions of these constants and made the register context classes use those. Long term, the error handling in these classes should be probably changed to use more standard mechanisms such as Status or Error classes. This is the only change necessary (apart from build system glue) to make ObjectFileMachO work on other platforms. To demonstrate that, I remove REQUIRES:darwin from our (only) cross-platform mach-o test. Reviewers: jasonmolenda, aprantl, clayborg, javed.absar Subscribers: mgorny, lldb-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D46934 llvm-svn: 332702
* Re-enable a clang-move test on windows.Eric Liu2018-05-181-4/+0
| | | | | | This was fixed by r332612. llvm-svn: 332701
* Fix _NSCFBoolean data formatter.Jonas Devlieghere2018-05-182-5/+7
| | | | | | | | | | | | | In r265181 the test for the NSCFBoolean data formatter was removed. Later, in r279353 and r279446 a new implementation was provided for the formatter, which I believe never worked (and this wasn't caught because the test was never re-enabled). This commit fixes the bug and re-enables the old test case. Differential revision: https://reviews.llvm.org/D47014 llvm-svn: 332700
* Do not try to remove invisible Decls from DeclContextGabor Marton2018-05-182-28/+67
| | | | llvm-svn: 332699
* [SimplifyCFG] Fix a debug invariant bug in FoldBranchToCommonDest()David Stenberg2018-05-182-3/+54
| | | | | | | | | | | | | | | | | | | | | Summary: Fix a case where FoldBranchToCommonDest() would bail out from doing CSE when encountering a debug intrinsic. Handle that by skipping past the debug intrinsics. Also, as a minor refactoring, rename checkCSEInPredecessor() to tryCSEWithPredecessor() to make it a bit more clear that the function may remove instructions. Reviewers: fhahn, craig.topper, dblaikie, xbolva00 Reviewed By: fhahn, xbolva00 Subscribers: vsk, davide, llvm-commits Differential Revision: https://reviews.llvm.org/D46635 llvm-svn: 332698
* [llvm-exegesis] Fix compile error on VS.Clement Courbet2018-05-181-3/+3
| | | | | | | | | | | | | | | llvm::BitVector::const_set_bits_iterator is not formally a ForwardIterator. Using it as such results in compile time errors on some compilers: FAILED: unittests/tools/llvm-exegesis/X86/CMakeFiles/LLVMExegesisX86Tests.dir/RegisterAliasingTest.cpp.obj C:\Program Files (x86)\Microsoft Visual Studio 14.0\VC\INCLUDE\xutility(967): error C2794: 'iterator_category': is not a member of any direct or indirect base class of 'std::iterator_traits<_InIt>' with [ _InIt=llvm::BitVector::const_set_bits_iterator ] llvm-svn: 332697
* [RISCV] Add WasForced parameter to MCAsmBackend::fixupNeedsRelaxationAdvancedShiva Chen2018-05-189-15/+138
| | | | | | | | | | | | | | | | | | | | | | | | | For RISCV branch instructions, we need to preserve relocation types when linker relaxation enabled, so then linker could modify offset when the branch offsets changed. We preserve relocation types by define shouldForceRelocation. IsResolved return by evaluateFixup will always false when shouldForceRelocation return true. It will make RISCV MC Branch Relaxation always relax 16-bit branches to 32-bit form, even if the symbol actually could be resolved. To avoid 16-bit branches always relax to 32-bit form when linker relaxation enabled, we add a new parameter WasForced to indicate that the symbol actually couldn't be resolved and not forced by shouldForceRelocation return true. RISCVAsmBackend::fixupNeedsRelaxationAdvanced could relax branches with unresolved symbols by (!IsResolved && !WasForced). RISCV MC Branch Relaxation is needed because RISCV could perform 32-bit to 16-bit transformation in MC layer. Differential Revision: https://reviews.llvm.org/D46350 llvm-svn: 332696
* [LICM] Extend the MustExecute scopeSerguei Katkov2018-05-183-3/+58
| | | | | | | | | | | | CanProveNotTakenFirstIteration utility does not handle the case when condition of the branch is a constant. Add its handling. Reviewers: reames, anna, mkazantsev Reviewed By: reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D46996 llvm-svn: 332695
* [X86DomainReassignment] Hopefully fix buildbot failureKeno Fischer2018-05-181-1/+1
| | | | | | | | | | | | | | | | | | The Darwin build bot failed with: ``` llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu domain-reassignment-test.ll -o - | llvm-mc -- Exit Code: 134 Command Output (stderr): -- Assertion failed: (MAI->hasSingleParameterDotFile()), function EmitFileDirective, file lib/MC/MCAsmStreamer.cpp, line 1087. ``` Looks like this is because the `llvm-mc` command was missing a triple directive and defaulting to MachO. Add the triple option. llvm-svn: 332694
* [llvm-objcopy] Fix formattingAlexander Shaposhnikov2018-05-181-8/+8
| | | | | | | | | Apply clang-format -i -style=llvm to llvm-objcopy.cpp NFC. Test plan: make check-all llvm-svn: 332693
* [asan] Add instrumentation support for MyriadWalter Lee2018-05-182-1/+117
| | | | | | | | | | | | | | | | | | | | 1. Define Myriad-specific ASan constants. 2. Add code to generate an outer loop that checks that the address is in DRAM range, and strip the cache bit from the address. The former is required because Myriad has no memory protection, and it is up to the instrumentation to range-check before using it to index into the shadow memory. 3. Do not add an unreachable instruction after the error reporting function; on Myriad such function may return if the run-time has not been initialized. 4. Add a test. Differential Revision: https://reviews.llvm.org/D46451 llvm-svn: 332692
* [asan] Add target-specific files for Myriad RTEMS portWalter Lee2018-05-185-0/+582
| | | | | | Differential Revision: https://reviews.llvm.org/D46468 llvm-svn: 332691
* [asan] Add support for Myriad RTEMS memory mapWalter Lee2018-05-184-52/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Myriad RTEMS memory system has a few unique aspects that require support in the ASan run-time. - A limited amount of memory (currently 512M). - No virtual memory, no memory protection. - DRAM starts at address 0x80000000. Other parts of memory may be used for MMIO, etc. - The second highest address bit is the "cache" bit, and 0x80000000 and 0x84000000 alias to the same memory. To support the above, we make the following changes: - Use a ShadowScale of 5, to reduce shadow memory overhead. - Adjust some existing macros to remove assumption that the lowest memory address is 0. - add a RawAddr macro that on Myriad strips the cache bit from the input address, before using the address for shadow memory (for other archs this does nothing). - We must check that an address is in DRAM range before using it to index into shadow memory. Differential Revision: https://reviews.llvm.org/D46456 llvm-svn: 332690
* Revert "Temporarily revert "[DEBUG] Initial adaptation of NVPTX target for ↵Eric Christopher2018-05-1816-308/+9150
| | | | | | | | | | | | | | | debug info emission."" This reapplies commits: r330271, r330592, r330779. [DEBUG] Initial adaptation of NVPTX target for debug info emission. Summary: Patch adds initial emission of the debug info for NVPTX target. Currently, only .file and .loc directives are emitted, everything else is commented out to not break the compilation of Cuda. llvm-svn: 332689
* Mitigate relocation overflow [part 2 of 2]Han Shen2018-05-182-27/+36
| | | | | | | | | _init_array_start/end are placed at 0 if no ".init_array" presents, this causes .text relocation against them become more prone to overflow. This CL sets ".init_array" address to that of ".text" to mitigate the situation. Review: https://reviews.llvm.org/D46200 llvm-svn: 332688
* Tidy comment up a bit.Eric Christopher2018-05-181-1/+1
| | | | llvm-svn: 332687
* Fix unused lambda capture.Eli Friedman2018-05-181-1/+1
| | | | llvm-svn: 332686
* [MachineOutliner] Count savings from outlining in bytes.Eli Friedman2018-05-185-34/+59
| | | | | | | | | | Counting the number of instructions is both unintuitive and inaccurate. On AArch64, this only affects the generated remarks and certain rare pseudo-instructions, but it will have a bigger impact on other targets. Differential Revision: https://reviews.llvm.org/D46921 llvm-svn: 332685
* [CMake] Use <UNIX|WINDOWS>_COMMAND with separate_argumentsPetr Hosek2018-05-181-1/+5
| | | | | | NATIVE_COMMAND is only available since CMake 3.9. llvm-svn: 332684
* [CMake] Detect the compiler runtime and standard libraryPetr Hosek2018-05-183-33/+87
| | | | | | | | | | Rather then requiring the user to specify runtime the compiler runtime and C++ standard library, or trying to guess them which is error-prone, use auto-detection by parsing the compiler link output. Differential Revision: https://reviews.llvm.org/D46857 llvm-svn: 332683
* [X86DomainReassignment] Don't compare stack-allocated values by addressKeno Fischer2018-05-182-6/+72
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The Closure allocated in the main loop is allocated on the stack. However, later in the code its address is taken (and used for comparisons). This obviously doesn't work. In fact, the Closure will get the same stack address during every loop iteration, rendering the check that intended to identify Closure conflicts entirely ineffective. Fix this bug by giving every Closure a unique ID and using that for comparison. Alternatively, we could heap allocate the closure object. Fixes PR37396 Fixes JuliaLang/julia#27032 Reviewers: craig.topper, guyblank Reviewed By: craig.topper Subscribers: vchuravy, llvm-commits Differential Revision: https://reviews.llvm.org/D46800 llvm-svn: 332682
* [sanitizer] Trivial portion of the port to Myriad RTEMSWalter Lee2018-05-1815-28/+44
| | | | | | | | | | | | | | | | | | | | | This commit contains the trivial portion of the port of ASan to Myriad RTEMS. - Whitelist platform in sanitizer_platform.h, ubsan_platform.h - Turn off general interception - Use memset for FastPoisonShadow - Define interception wrappers - Set errno symbol correctly - Enable ASAN_LOW_MEMORY - Enable preinit array - Disable slow unwinding - Use fuchsia offline symbolizer - Disable common code for: InitializeShadowMemory, CreateMainThread, AsanThread::ThreadStart, StartReportDeadlySignal, MaybeReportNonExecRegion. Differential Revision: https://reviews.llvm.org/D46454 llvm-svn: 332681
* [X86DomainReassignment] Don't delete IMPLICIT_DEF nodesKeno Fischer2018-05-182-20/+25
| | | | | | | | | | | | | | | | Summary: We cannot simply delete IMPLICIT_DEF nodes. They may be used later (e.g. by a PHI) and deleting them will cause later passes (e.g. LiveVariables) to crash. However, it seems fine to ignore them for purposes of the domain reassignment (as we do with PHI). Fixes PR37430 Fixes JuliaLang/julia#27080 Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D46797 llvm-svn: 332680
* [CMake] Reland "Make simple source used for CMake checks a C file"Petr Hosek2018-05-173-1/+6
| | | | | | | | | | | The source being compiled is plain C, but using .cc extension forces it to be compiled as C++ which requires a working C++ compiler including C++ library which may not be the case when we're building compiler-rt together with libcxx as part of runtimes build. Differential Revision: https://reviews.llvm.org/D47031 llvm-svn: 332679
* Add initial support for half precision builtinsJan Vesely2018-05-1757-29/+690
| | | | | | | | | | | | | | v2: fix fmax implementation use consistent checks for __CLC_FP_SIZE add missing TODOs fix whitespace in definitions.h v3: undef ZERO in modf.inc Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> reviewer: Jeroen Ketema <j.ketema@xs4all.nl> Reviewed-by: Aaron Watry <awatry@gmail.com> Tested-by: Aaron Watry <awatry@gmail.com> llvm-svn: 332677
* Resubmit [pdb] Change /DEBUG:GHASH to emit 8 byte hashes."Zachary Turner2018-05-1713-328/+330
| | | | | | | This fixes the remaining failing tests, so resubmitting with no functional change. llvm-svn: 332676
* Support: Add a raw_ostream::write_zeros() function. NFCI.Peter Collingbourne2018-05-173-16/+30
| | | | | | | | | | This will eventually replace MCObjectWriter::WriteZeros. Part of PR37466. Differential Revision: https://reviews.llvm.org/D47033 llvm-svn: 332675
* Revert r332657: "[AA] cfl-anders-aa with field sensitivity"George Burgess IV2018-05-174-258/+110
| | | | | | | I don't believe the person who LGTMed this review has appropriate context on this code. I apologize if I'm wrong. llvm-svn: 332674
* AMDGPU/SI: Don't promote alloca to vector for atomic load/storeChangpeng Fang2018-05-172-3/+70
| | | | | | | | | | | | | Summary: Don't promote alloca to vector for atomic load/store Reviewer: arsenm Differential Revision: https://reviews.llvm.org/D46085 llvm-svn: 332673
* Revert "[pdb] Change /DEBUG:GHASH to emit 8 byte hashes."Zachary Turner2018-05-1712-332/+325
| | | | | | | A few tests haven't been properly updated, so reverting while I have time to investigate proper fixes. llvm-svn: 332672
* [Windows, Process] LLDB reads wrong registers on 64bit WindowsStella Stamenova2018-05-171-16/+16
| | | | | | | | | | | | | | | | | | Summary: LLDB reads wrong registers on 64bit Windows because RegisterContextWindows_x64::GetRegisterInfoAtIndex returns wrong reference. I encountered broken backtrace when the program stopped at function which does not have prologue code, such as compiled with '-fomit-frame-pointer'. In this situation, CFA is equal to rsp but LLDB reads r9. RegisterContextWindows_x64::GetRegisterInfoAtIndex depends the order of lldb_XXX_x86_64 values, but RegisterIndex/g_register_infos/g_gpr_reg_indices does not follow order. In source/Plugins/Process/Utility/lldb-x86-register-enums.h The order of GPRs is rax, rbx, rcx, rdx, rdi, rsi, rbp, rsp, r8, ... In source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp The order of GPRs is rax, rbx, rcx, rdx, rdi, rsi, r8, r9, r10, ... Patch by Kenji Koyanagi llvm-svn: 332671
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