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* Do not allocate MipsReginfo using BumpPtrAllocator.Rui Ueyama2016-04-062-3/+3
| | | | | | So that MipsReginfo's destructor will be called. llvm-svn: 265512
* RegisterScavenger: Take a reference as enterBasicBlock() argument.Matthias Braun2016-04-0610-19/+16
| | | | | | | Make it obvious that the argument cannot be nullptr. Remove an unnecessary nullptr check in initRegState. llvm-svn: 265511
* LivePhysRegs: removeReg() must remove aliased registersMatthias Braun2016-04-061-6/+2
| | | | | | | | | | | We must remove all aliased registers which may be more than the all sub and super registers combined. Bug found while reading the code. The bug does not affect any existing target as the only use of register aliases I could found were control registers on ARM and Hexagon which are all reserved. llvm-svn: 265510
* LivePhysRegs: Remove redundant checkMatthias Braun2016-04-061-1/+1
| | | | llvm-svn: 265509
* ValueMapper: Fix delayed blockaddress handling after r265273Duncan P. N. Exon Smith2016-04-062-3/+25
| | | | | | | | | r265273 added Mapper::mapBlockAddress, which delays mapping a blockaddress value until the function has a body. The condition was backwards, and should be checking Function::empty instead of GlobalValue::isDeclaration. llvm-svn: 265508
* AsmParser: Don't crash on unresolved !tbaaDuncan P. N. Exon Smith2016-04-063-5/+17
| | | | | | | | Instead of crashing, give a nice error. As a drive-by, fix the location associated with the errors for unresolved metadata (the location was off by one token). llvm-svn: 265507
* [ppc64] Enable sibling call optimization on ppc64 ELFv1/ELFv2 abiChuang-Yu Cheng2016-04-065-8/+467
| | | | | | | | | | | | | | | | | This patch enable sibling call optimization on ppc64 ELFv1/ELFv2 abi, and add a couple of test cases. This patch also passed llvm/clang bootstrap test, and spec2006 build/run/result validation. Original issue: https://llvm.org/bugs/show_bug.cgi?id=25617 Great thanks to Tom's (tjablin) help, he contributed a lot to this patch. Thanks Hal and Kit's invaluable opinions! Reviewers: hfinkel kbarton http://reviews.llvm.org/D16315 llvm-svn: 265506
* [Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random ↵Chuang-Yu Cheng2016-04-0610-0/+380
| | | | | | | | | | | | | | | | | | | | | number, set bool, and dfp test significance This patch implement the following instructions: - addpcis subpcis - maddhd maddhdu maddld - modsw moduw modsd modud - darn - extswsli extswsli. - setb - dtstsfi dtstsfiq Total 15 instructions Reviewers: nemanjai hfinkel tjablin amehsan kbarton http://reviews.llvm.org/D17885 llvm-svn: 265505
* [Power9] Implement copy-paste, msgsync, slb, and stop instructionsChuang-Yu Cheng2016-04-069-0/+174
| | | | | | | | | | | | | This patch implements the following BookII and Book III instructions: - copy copy_first cp_abort paste paste. paste_last - msgsync - slbieg slbsync - stop Total 10 instructions Reviewers: nemanjai hfinkel tjablin amehsan kbarton llvm-svn: 265504
* [RS4GC] Add a commentSanjoy Das2016-04-061-0/+4
| | | | llvm-svn: 265503
* Lower @llvm.experimental.deoptimize as a noreturn callSanjoy Das2016-04-064-13/+35
| | | | | | | | | | | | | | | | | | | | | | | While preserving the return value for @llvm.experimental.deoptimize at the IR level is useful during mid-level optimization, doing so at the machine instruction level requires generating some extra code and a return that is non-ideal. This change has LLVM lower ``` %val = call @llvm.experimental.deoptimize ret %val ``` to effectively ``` call @__llvm_deoptimize() unreachable ``` instead. llvm-svn: 265502
* Make helper function static. NFC.Rafael Espindola2016-04-061-1/+1
| | | | llvm-svn: 265501
* AMDGPU: Document address space mappingTom Stellard2016-04-061-0/+23
| | | | | | | | | | | | | | | | | Summary: Address space mapping is described in lib/Target/AMDGPU/AMDGPU.h in Doxygen comments. This patch adds the description to user guide for AMDGPU back-end. Patch By: Vedran Miletić Reviewers: tstellarAMD, arsenm Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17046 llvm-svn: 265500
* AArch64CodeGen: Make AArch64RegisterBankInfo.cpp optional along ↵NAKAMURA Takumi2016-04-061-1/+13
| | | | | | LLVM_BUILD_GLOBAL_ISEL. llvm-svn: 265499
* make TestRegisterVariables slightly more resilientTodd Fiala2016-04-062-16/+123
| | | | | | | | | | | | | | | | | | | This test sets the compiler optimization level to -O1 and makes some assumptions about how local frame vars will be stored (i.e. in registers). These assumptions are not always true. I did a first-pass set of improvements that: (1) no longer assumes that every one of the target locations has every variable in a register. Sometimes the compiler is even smarter and skips the register entirely. (2) simply expects one of the 5 or so variables it checks to be in a register. This test probably passes on a whole lot more systems than it used to now. This is certainly true on OS X. llvm-svn: 265498
* Fix a memory leak found by check-lld asan tests.Ivan Krasin2016-04-062-2/+3
| | | | | | | | | | | | | | | | | | Summary: This bug was introduced by http://reviews.llvm.org/rL265059, where InputSectionBase got Thunks field, which can do memory allocations. Since InputSectionBase destructors were never called (I count it as another bug), that caused a memory leak when 2 or more thunks are added to a section. The fix to is properly call InputSectionBase destructors from ~ObjectFile. Reviewers: atanasyan, ruiu, rafael Subscribers: rafael, krasin, pcc Differential Revision: http://reviews.llvm.org/D18809 llvm-svn: 265497
* The FixItList typedef should have been inside "class ClangDiagnostic".Jim Ingham2016-04-061-1/+2
| | | | llvm-svn: 265496
* If the fixed expression doesn't parse, don't tell the user about it.Jim Ingham2016-04-061-0/+5
| | | | llvm-svn: 265495
* Don't write "using $_lldb_local_vars" statements for variables withJim Ingham2016-04-061-1/+1
| | | | | | | no name. These were showing up with a recent clang, I haven't tracked down why yet, but adding them is clearly wrong. llvm-svn: 265494
* [SLPVectorizer] Vectorize libcalls of sqrtDavid Majnemer2016-04-063-25/+28
| | | | | | | We didn't realize that we could transform the libcall into a vectorized intrinsic. llvm-svn: 265493
* [RegisterBankInfo] Include RegisterBank.h.Quentin Colombet2016-04-051-1/+2
| | | | | | | We actually need the definition of a RegisterBank to be able to inline the implementation of the subscript operator. llvm-svn: 265492
* [RegisterBankInfo] Add missing include for assert.Quentin Colombet2016-04-051-0/+1
| | | | | | This should appease the linux bot. llvm-svn: 265491
* [DebugInfo] Fix tests so that each subprogram belongs to a CU.Davide Italiano2016-04-0514-11/+89
| | | | llvm-svn: 265490
* [AArch64] Initial implementation of the targeting of the register bank ↵Quentin Colombet2016-04-053-0/+115
| | | | | | information. llvm-svn: 265489
* Update testing cases after backend changes.Manman Ren2016-04-052-2/+2
| | | | llvm-svn: 265488
* [RegisterBankInfo] Simplify the API for build a register bank.Quentin Colombet2016-04-052-11/+10
| | | | | | | | | As part of the TRI argument of addRegBankCoverage we already have access to the TargetRegisterClass through the ID of that register class. Therefore, there is no point in needing a TargetRegisterClass instance, the ID is enough to get to it. llvm-svn: 265487
* [RS4GC] NFC cleanup of the DeferredReplacement classSanjoy Das2016-04-051-5/+18
| | | | | | Instead of constructors use clearly named factory methods. llvm-svn: 265486
* [RS4GC] Better codegen for deoptimize callsSanjoy Das2016-04-052-18/+66
| | | | | | | | | Don't emit a gc.result for a statepoint lowered from @llvm.experimental.deoptimize since the call into __llvm_deoptimize is effectively noreturn. Instead follow the corresponding gc.statepoint with an "unreachable". llvm-svn: 265485
* [Target] Remove a deprecated comment.Quentin Colombet2016-04-051-2/+1
| | | | llvm-svn: 265484
* [Target] Add an accessor to the register bank information.Quentin Colombet2016-04-051-0/+5
| | | | llvm-svn: 265483
* Swift Calling Convention: swiftcc for ARM.Manman Ren2016-04-055-0/+205
| | | | | | Differential Revision: http://reviews.llvm.org/D18769 llvm-svn: 265482
* Faster stack-protector for Android/AArch64.Evgeniy Stepanov2016-04-058-33/+90
| | | | | | | Bionic has a defined thread-local location for the stack protector cookie. Emit a direct load instead of going through __stack_chk_guard. llvm-svn: 265481
* Swift Calling Convention: add swiftcc.Manman Ren2016-04-059-0/+232
| | | | | | Differential Revision: http://reviews.llvm.org/D17863 llvm-svn: 265480
* [RegisterBank] Implement the verify method to check for the obvious mistakes.Quentin Colombet2016-04-051-4/+27
| | | | llvm-svn: 265479
* Delete broken code.Rafael Espindola2016-04-054-10/+27
| | | | | | | | | A synthetic symbol can be global or local, and with the current infrastructure we don't need any special code for it. Fixes PR27228. llvm-svn: 265478
* [lld][MachO] Check Expected<T> for error prior to destruction.Lang Hames2016-04-051-15/+17
| | | | | | This should fix the failures on the LLD bots caused by r265446. llvm-svn: 265477
* Revert "XFail TestImport.py on Windows because Python 3 import rules don't ↵Adrian McCarthy2016-04-051-1/+0
| | | | | | | | work that way." This reverts commit e5f0ba4fcf977ad6baaaca700d3646675cdac19b. llvm-svn: 265476
* [RegisterBankInfo] Add debug print to check how the initialization is going.Quentin Colombet2016-04-051-0/+11
| | | | llvm-svn: 265475
* [CFLAA] Fix PR27213; incorrect tagging of args/globalsGeorge Burgess IV2016-04-053-6/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | Prior to this patch, CFLAA wouldn't tag arguments/globals properly if it didn't find any "interesting" edges on them. This means that, if all you do is store constants to a global or argument, we would never actually treat it as a global/argument. Test case: define void @foo(i32* %A, i32* %B) #0 { entry: store i32 0, i32* %A, align 4 store i32 0, i32* %B, align 4 ret void } CFLAA would say that %A can't alias %B, because neither pointer was used in an interesting way. This patch makes us note whether something is an argument, global, ... regardless of how interesting CFLAA thinks its uses are. (For the record, using a value in an interesting way means loading from it, using it in a GEP, ...) llvm-svn: 265474
* [RegisterBank] Add printable capabilities for future debugging.Quentin Colombet2016-04-052-0/+52
| | | | llvm-svn: 265473
* Add a test for relocations in non alloc sections.Rafael Espindola2016-04-051-0/+25
| | | | | | We already got this right, but we were not testing it. llvm-svn: 265471
* Try harder to appease MSVC after r265456Duncan P. N. Exon Smith2016-04-051-3/+12
| | | | | | r265465 wasn't good enough. I need to spell out all the moves. llvm-svn: 265470
* [RegisterBankInfo] Make addRegBankCoverage more capable to easeQuentin Colombet2016-04-052-6/+72
| | | | | | | | targeting jobs. Now, addRegBankCoverage also adds the subreg-classes not just the sub-classes of the given register class. llvm-svn: 265469
* Minor code cleanups. NFC.Junmo Park2016-04-051-2/+2
| | | | llvm-svn: 265468
* Fix a crash on invalid with template handlingRichard Trieu2016-04-054-8/+20
| | | | | | | | This is a fix for https://llvm.org/bugs/show_bug.cgi?id=25561 which was a crash on invalid. Change the handling of invalid decls to have a catch-all case to prevent unexpecting decls from triggering an assertion. llvm-svn: 265467
* IR: Introduce ConstantAggregate, NFCDuncan P. N. Exon Smith2016-04-059-85/+77
| | | | | | | | | | | | Add a common parent class for ConstantArray, ConstantVector, and ConstantStruct called ConstantAggregate. These are the aggregate subclasses of Constant that take operands. This is mainly a cleanup, adding common `isa` target and removing duplicated code. However, it also simplifies caching which constants point transitively at `GlobalValue` (a possible future direction). llvm-svn: 265466
* Try to appease MSVC after r265456Duncan P. N. Exon Smith2016-04-051-0/+4
| | | | | | | I can't remember if adding `= default` will make MSVC happy, or if I have to spell this out. Let's try the cleaner version first. llvm-svn: 265465
* [RegisterBankInfo] Implement the methods to create register banks.Quentin Colombet2016-04-052-9/+120
| | | | llvm-svn: 265464
* IR: Add missing assertion for ConstantVector::ConstantVectorDuncan P. N. Exon Smith2016-04-051-0/+2
| | | | | | | Use the same assertion as ConstantArray. Vectors should have the right number of elements. llvm-svn: 265463
* Make TLS work for PIE executables on x86-64.Ed Schouten2016-04-052-0/+28
| | | | | | | | | | | | | | | | | While trying to get PIE work on CloudABI for x86-64, I noticed that even though GNU ld would generate functional binaries, LLD would not. It turns out that we generate relocations for referencing TLS objects inside of the text segment, which shouldn't happen. This change extends the isRelRelative() function to list some additional relocation types that should be treated as relative. This makes my C library unit testing binary work on x86-64. Approved by: ruiu Differential Revision: http://reviews.llvm.org/D18688 Fixes bug: https://llvm.org/bugs/show_bug.cgi?id=27174 llvm-svn: 265462
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