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* [LoopUnroll] Use IRBuilder to create branch instructions.Alexey Samsonov2015-06-111-10/+9
| | | | | | | | | | | | | | | | | | Use IRBuilder::Create(Cond)?Br instead of constructing instructions manually with BranchInst::Create(). It's consistent with other uses of IRBuilder in this pass, and has an additional important benefit: Using IRBuilder will ensure that new branch instruction will get the same debug location as original terminator instruction it will eventually replace. For now I'm not adding a testcase, as currently original terminator instruction also lack debug location due to missing debug location propagation in BasicBlock::splitBasicBlock. That is, the testcase will accompany the fix for the latter I'm going to mail soon. llvm-svn: 239550
* [CodeGen] Emit Constants for immediate inlineasm arguments.Ahmed Bougacha2015-06-112-0/+35
| | | | | | | | | | | | | | | | | For inline assembly immediate constraints, we currently always use EmitScalarExpr, instead of directly emitting the constant. When the overflow sanitizer is enabled, this generates overflow intrinsics instead of constants. Instead, emit a constant for constraints that either require an immediate (e.g. 'I' on X86), or only accepts constants (immediate or symbolic; i.e., don't accept registers or memory). Fixes PR19763. Differential Revision: http://reviews.llvm.org/D10255 llvm-svn: 239549
* clang-cl: Add an alias for /wd4910Hans Wennborg2015-06-112-1/+4
| | | | llvm-svn: 239548
* Spell -Wdllexport-explicit-instantiation-decl correctly.Hans Wennborg2015-06-111-1/+1
| | | | llvm-svn: 239547
* Remove unused variables '__kmp_build_check_*' for non assert builds.Jonathan Peyton2015-06-113-4/+15
| | | | | | | | | | | | Add new LIBOMP_ENABLE_ASSERTIONS macro which can be set in a standalone build or takes the value of LLVM_ENABLE_ASSERTIONS when inside llvm/projects. This change also defines the KMP_BUILD_ASSERT() macro to do nothing when ENABLE_ASSERTIONS is off. This means the __kmp_build_check_* types won't be defined and thus, no warnings. http://lists.cs.uiuc.edu/pipermail/openmp-dev/2015-June/000719.html Patch by Jack Howarth and Jonathan Peyton llvm-svn: 239546
* Replace an instance of custom atomics with standard ones.Benjamin Kramer2015-06-111-3/+3
| | | | | | | Eventually I want to get rid of them entirely, but Statistic.h is still blocked on MSVC bugs. No functionality change. llvm-svn: 239545
* This reverts commit r239529 and r239514.Rafael Espindola2015-06-117-616/+0
| | | | | | | | | Revert "[AArch64] Match interleaved memory accesses into ldN/stN instructions." Revert "Fixing MSVC 2013 build error." The test/CodeGen/AArch64/aarch64-interleaved-accesses.ll test was failing on OS X. llvm-svn: 239544
* Revert "Fix merges of non-zero vector stores"Reid Kleckner2015-06-113-30/+8
| | | | | | | | This reverts commit r239539. It was causing SDAG assertions while building freetype. llvm-svn: 239543
* Implement recursive CMake.Jonathan Peyton2015-06-113-365/+359
| | | | | | | | | | | | | | Most CMake build systems put CMakeLists.txt files inside source directories where items need to get built. This change follows that convention by adding a new runtime/src/CMakeLists.txt file. An additional benefit is this helps logically seperate configuring with building as well. This change is mostly just copying and pasting the bottom half of runtime/CMakeLists.txt into runtime/src/CMakeLists.txt, but a few changes had to be made to get it to work. Most of those changes were to directory prefixes. Differential Revision: http://reviews.llvm.org/D10344 llvm-svn: 239542
* Fix comment typos.Douglas Katzman2015-06-111-2/+2
| | | | llvm-svn: 239541
* SLSR: Pass address space to isLegalAddressingModeMatt Arsenault2015-06-113-1/+112
| | | | | | | | | This only updates one of the uses. The other is used in cases that may never touch memory, so I'm not sure why this is even calling it. Perhaps there should be a new, similar hook for such cases or pass -1 for unknown address space. llvm-svn: 239540
* Fix merges of non-zero vector storesMatt Arsenault2015-06-113-8/+30
| | | | | | | | | | Now actually stores the non-zero constant instead of 0. I somehow forgot to include this part of r238108. The test change was just an independent instruction order swap, so just add another check line to satisfy CHECK-NEXT. llvm-svn: 239539
* Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC.Daniel Sanders2015-06-115-27/+24
| | | | | | | | | | | | | | | | Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rengolin Reviewed By: rengolin Subscribers: llvm-commits, jfb, rengolin Differential Revision: http://reviews.llvm.org/D10361 llvm-svn: 239538
* Add comments to PrintActions1 and Driver::PrintActions.Douglas Katzman2015-06-111-1/+6
| | | | | | Differential Revision: http://reviews.llvm.org/D10214 llvm-svn: 239537
* add the -mrecip driver flag and process its options (3rd try)Sanjay Patel2015-06-116-1/+211
| | | | | | | | | | | | | | | | | | | The 1st and 2nd tries to land this (r238055, r238851) were reverted due to bot failures caused by the LLVM part of the patch. That was hopefully fixed after r239001. This is the front-end counterpart to D8982. The -mrecip option interface is based on maintaining compatibility with gcc: https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/i386-and-x86-64-Options.html#index-mrecip_003dopt-1627 https://gcc.gnu.org/onlinedocs/gcc-4.9.2/gcc/RS_002f6000-and-PowerPC-Options.html#index-mrecip-2289 ...while adding more functionality (allowing users to specify the number of refinement steps for each estimate type). Differential Revision: http://reviews.llvm.org/D8989 llvm-svn: 239536
* R600/SI: Define latency for flat instructionsTom Stellard2015-06-111-0/+1
| | | | llvm-svn: 239535
* R600/SI: Move flat instruction defs to CIInstructions.tdTom Stellard2015-06-112-108/+110
| | | | llvm-svn: 239534
* R600/SI: Add -mcpu=bonaire to a test that uses flat address spaceTom Stellard2015-06-111-1/+1
| | | | | | | Flat instructions don't exist on SI, but there is a bug in the backend that allows them to be selected. llvm-svn: 239533
* remove function names from comments; NFCSanjay Patel2015-06-111-15/+13
| | | | llvm-svn: 239532
* clang-format: Make SFS_Inline imply SFS_Empty.Daniel Jasper2015-06-114-32/+26
| | | | | | | | | | In the long run, these two might be independent or we might to only allow specific combinations. Until we have a corresponding request, however, it is hard to do the right thing and choose the right configuration options. Thus, just don't touch the options yet and just modify the behavior slightly. llvm-svn: 239531
* clang-format: [JS] Ensure that formatting actually takes place in tests.Daniel Jasper2015-06-112-2/+5
| | | | | | And fix formatting issue discovered by that :-). llvm-svn: 239530
* Fixing MSVC 2013 build error.Aaron Ballman2015-06-111-0/+1
| | | | llvm-svn: 239529
* C++11 rangify several loops.Yaron Keren2015-06-111-36/+21
| | | | llvm-svn: 239528
* Allow case-insensitive values for -march for ARM in line with GCC.Gabor Ballabas2015-06-113-8/+18
| | | | | | | GCC allows case-insensitive values for -mcpu, -march and -mtune options. This patch implements the same behaviour for the -march option for ARM. llvm-svn: 239527
* Token: complement is() method with isOneOf() to allow easier usageDaniel Marjamaki2015-06-111-0/+7
| | | | llvm-svn: 239526
* [mips] Pass on -m{single,double}-float to GAS.Toma Tabacu2015-06-112-0/+13
| | | | | | | | | | | | | | Summary: We already pass these to the IAS, but not to GAS. Reviewers: dsanders, atanasyan Reviewed By: atanasyan Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10358 llvm-svn: 239525
* [OPENMP] Fox for http://llvm.org/PR23663: OpenMP crashAlexey Bataev2015-06-112-26/+34
| | | | | | Destroy RuntimeCleanupScope before generation of termination instruction in parallel loop precondition. llvm-svn: 239524
* Recommit "[mips] [IAS] Add support for BNE and BEQ with an immediate ↵Toma Tabacu2015-06-117-2/+230
| | | | | | | | | operand." (r239396). Apparently, Arcanist didn't include some of my local changes in my previous commit attempt. llvm-svn: 239523
* [mips][microMIPS] Implement ERET and ERETNC instructionsZoran Jovanovic2015-06-115-10/+40
| | | | | | http://reviews.llvm.org/D10091 llvm-svn: 239522
* Fix crash in clang-format.Manuel Klimek2015-06-112-3/+8
| | | | | | | | | | | The following example used to crash clang-format. #define a\ /**/} Adjusting the indentation level cache for the line starting with the comment would lead to an out-of-bounds array read. llvm-svn: 239521
* [mips] Change existing uimm10 operand to restrict the accepted immediatesZoran Jovanovic2015-06-115-0/+24
| | | | | | http://reviews.llvm.org/D10312 llvm-svn: 239520
* [mips][microMIPSr6] Change disassembler tests to one line formatZoran Jovanovic2015-06-112-672/+336
| | | | llvm-svn: 239519
* [LoopVectorize] Revert the enabling of interleaved memory access in Loop ↵Hao Liu2015-06-111-1/+1
| | | | | | Vectorizor, which was wrongly committed in r239514. llvm-svn: 239515
* [AArch64] Match interleaved memory accesses into ldN/stN instructions.Hao Liu2015-06-118-1/+616
| | | | | | | | | | | | | | | | | | | | | | | Add a pass AArch64InterleavedAccess to identify and match interleaved memory accesses. This pass transforms an interleaved load/store into ldN/stN intrinsic. As Loop Vectorizor disables optimization on interleaved accesses by default, this optimization is also disabled by default. To enable it by "-aarch64-interleaved-access-opt=true" E.g. Transform an interleaved load (Factor = 2): %wide.vec = load <8 x i32>, <8 x i32>* %ptr %v0 = shuffle %wide.vec, undef, <0, 2, 4, 6> ; Extract even elements %v1 = shuffle %wide.vec, undef, <1, 3, 5, 7> ; Extract odd elements Into: %ld2 = { <4 x i32>, <4 x i32> } call aarch64.neon.ld2(%ptr) %v0 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 0 %v1 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 1 E.g. Transform an interleaved store (Factor = 2): %i.vec = shuffle %v0, %v1, <0, 4, 1, 5, 2, 6, 3, 7> ; Interleaved vec store <8 x i32> %i.vec, <8 x i32>* %ptr Into: %v0 = shuffle %i.vec, undef, <0, 1, 2, 3> %v1 = shuffle %i.vec, undef, <4, 5, 6, 7> call void aarch64.neon.st2(%v0, %v1, %ptr) llvm-svn: 239514
* clang-format: Don't add spaces in foreach macro definition.Daniel Jasper2015-06-112-1/+16
| | | | | | | | | | | | Before clang-format would e.g. add a space into #define Q_FOREACH(x, y) which turns this into a non-function-like macro. Patch by Strager Neds, thank you! llvm-svn: 239513
* Reinstate r239499 and r239503David Majnemer2015-06-113-26/+39
| | | | | | | They were reverted because the FileCheck patterns didn't match on release builds. llvm-svn: 239512
* Revert "[MS ABI] Allow fastcall member function pointers to get CodeGen'd"Manuel Klimek2015-06-113-39/+26
| | | | | | | | | | | | Revert "[MS ABI] Allow memfn pointers with unconvertible types to be formed" This reverts r239499 and r239503; the former breaks tests [1] and the latter is based on the former. [1] http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_check/4473/testReport/Clang/CodeGenCXX/microsoft_abi_virtual_member_pointers_cpp/ llvm-svn: 239511
* [LiveVariables] Improve isLiveOut runtime performances. NFC.Arnaud A. de Grandmaison2015-06-111-31/+8
| | | | | | | | | | | | On large goto table based interpreters, where phi nodes can have (very) large fan-ins, isLiveOut exhibited poor performances: about 40% of the full codegen time was spent in PHIElim, sorting MachineBasicBlock addresses. This patch improve the performances for such cases, and does not show compile time regressions on the LNT, at bootstrap (llvm+clang+lldb) or any other benchmarks we have in-house. llvm-svn: 239510
* [X86][SSE] Vectorized i8 and i16 shift operatorsSimon Pilgrim2015-06-118-1381/+706
| | | | | | | | | | | | | | | | This patch ensures that SHL/SRL/SRA shifts for i8 and i16 vectors avoid scalarization. It builds on the existing i8 SHL vectorized implementation of moving the shift bits up to the sign bit position and separating the 4, 2 & 1 bit shifts with several improvements: 1 - SSE41 targets can use (v)pblendvb directly with the sign bit instead of performing a comparison to feed into a VSELECT node. 2 - pre-SSE41 targets were masking + comparing with an 0x80 constant - we avoid this by using the fact that a set sign bit means a negative integer which can be compared against zero to then feed into VSELECT, avoiding the need for a constant mask (zero generation is much cheaper). 3 - SRA i8 needs to be unpacked to the upper byte of a i16 so that the i16 psraw instruction can be correctly used for sign extension - we have to do more work than for SHL/SRL but perf tests indicate that this is still beneficial. The i16 implementation is similar but simpler than for i8 - we have to do 8, 4, 2 & 1 bit shifts but less shift masking is involved. SSE41 use of (v)pblendvb requires that the i16 shift amount is splatted to both bytes however. Tested on SSE2, SSE41 and AVX machines. Differential Revision: http://reviews.llvm.org/D9474 llvm-svn: 239509
* [PHIElim] Use ranges and const-ify, NFC.Arnaud A. de Grandmaison2015-06-111-12/+11
| | | | llvm-svn: 239508
* Clang support for vector quad bit permute and gather instructions through ↵Nemanja Ivanovic2015-06-113-0/+49
| | | | | | | | | | | | | builtins This patch corresponds to review: http://reviews.llvm.org/D10095 This is for just two instructions and related builtins: vbpermq vgbbd llvm-svn: 239506
* LLVM support for vector quad bit permute and gather instructions through ↵Nemanja Ivanovic2015-06-115-1/+111
| | | | | | | | | | | | | | builtins This patch corresponds to review: http://reviews.llvm.org/D10096 This is the back end portion of the patch related to D10095. The patch adds the instructions and back end intrinsics for: vbpermq vgbbd llvm-svn: 239505
* [modules] Fix a few places where merging wasn't performed if modules was ↵Richard Smith2015-06-116-4/+30
| | | | | | disabled but local module visibilty was enabled. llvm-svn: 239504
* [MS Compatibility] Handle cleanups we create for a ctor closureDavid Majnemer2015-06-112-0/+17
| | | | | | This fixes PR23801. llvm-svn: 239503
* Revert "Move dllimport name mangling to IR mangler."Reid Kleckner2015-06-117-25/+32
| | | | | | | | | This reverts commit r239437. This broke clang-cl self-hosts. We'd end up calling the __imp_ symbol directly instead of using it to do an indirect function call. llvm-svn: 239502
* Remove MachineModuleInfo::UsedFunctions as it has no users.Pete Cooper2015-06-114-35/+0
| | | | | | | | | | It hasn't been used since r130964. This also removes MachineModuleInfo::isUsedFunction and MachineModuleInfo::AnalyzeModule, both of which were only there to support UsedFunctions. llvm-svn: 239501
* [MS ABI] Allow fastcall member function pointers to get CodeGen'dDavid Majnemer2015-06-112-19/+18
| | | | | | | This restriction appears unnecessary and most likely came about during early work for musttail. llvm-svn: 239500
* [MS ABI] Allow memfn pointers with unconvertible types to be formedDavid Majnemer2015-06-112-8/+22
| | | | | | | | Remove the restriction which forbade forming pointers to member functions which had parameter types or return types which were not convertible. llvm-svn: 239499
* [CMake] Cleanup add_compiler_rt_object_library to be platform-agnosticChris Bieneman2015-06-108-130/+131
| | | | | | | | | | | | | | | | | Summary: This change takes darwin-specific goop that was scattered around CMakeLists files and spread between add_compiler_rt_object_library and add_compiler_rt_darwin_object_library and moves it all under add_compiler_rt_object_library. The goal of this is to try to push platform handling as low in the utility functions as possible. Reviewers: rnk, samsonov Reviewed By: rnk, samsonov Subscribers: rnk, rsmith, llvm-commits Differential Revision: http://reviews.llvm.org/D10250 llvm-svn: 239498
* change assert that will never fire to llvm_unreachableSanjay Patel2015-06-101-1/+1
| | | | llvm-svn: 239497
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