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llvm-svn: 180651
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and limit comment extraction to public c++
bases. // rdar://13647476
llvm-svn: 180646
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presence of malformed class types.
<rdar://problem/13740646>
llvm-svn: 180645
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structs are compatible, check whether the fields
of the structs have the same name. This prevents
erroneous coalescing of (in particular) anonymous
structs.
llvm-svn: 180644
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module file where a module object came from.
rdar://13743084
llvm-svn: 180643
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llvm-svn: 180642
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Clarify documentation and API to make the difference between register and
register-indirect addressed locations more explicit. Put in a comment
to point out that with the current implementation we cannot specify
a register-indirect location with offset 0 (a breg 0 in DWARF).
No functionality change intended.
rdar://problem/13658587
llvm-svn: 180641
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In an Objective-C for-in loop "for (id element in collection) {}", the loop
will run 0 times if the collection is nil. This is because the for-in loop
is implemented using a protocol method that returns 0 when there are no
elements to iterate, and messages to nil will result in a 0 return value.
At some point we may want to actually model this message send, but for now
we may as well get the nil case correct, and avoid the false positives that
would come with this case.
<rdar://problem/13744632>
llvm-svn: 180639
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Casts to bool (and _Bool) are equivalent to checks against zero,
not truncations to 1 bit or 8 bits.
This improved reasoning does cause a change in the behavior of the alpha
BoolAssignment checker. Previously, this checker complained about statements
like "bool x = y" if 'y' was known not to be 0 or 1. Now it does not, since
that conversion is well-defined. It's hard to say what the "best" behavior
here is: this conversion is safe, but might be better written as an explicit
comparison against zero.
More usefully, besides improving our model of booleans, this fixes spurious
warnings when returning the address of a local variable cast to bool.
<rdar://problem/13296133>
llvm-svn: 180638
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llvm-svn: 180637
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llvm-svn: 180636
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if modules are enabled.
The preprocessing record becomes important when modules are enabled, since it is used to calculate the
module cache hash.
llvm-svn: 180635
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incomplete, missing the definition from a module.
-Make sure that a deserialized external decl gets added to the TU scope.
-When associating an identifier with a set of decls, use the most recent local ones,
if they exist, otherwise associating decls from modules (that came after a local one)
will lead to an incomplete reconstructed re-declaration chain.
rdar://13712705
llvm-svn: 180634
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llvm-svn: 180633
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llvm-svn: 180632
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TLVs probably won't be as common as the other types of variables. Check for them
last before defaulting to "DATA".
llvm-svn: 180631
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Hopefully brings the windows buildbots back to life.
llvm-svn: 180630
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a comment, grab the first comment found in its class
heirarchy. Also, when a category is mossing a comment,
grab comment of its primary class. // rdar://13647476
llvm-svn: 180629
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gcc. No test case included as I'm having problems finding a test case where
the inode/dev don't match.
llvm-svn: 180628
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suggested by David Blaikie
llvm-svn: 180627
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arithmetic operations.
Patch by Yuri Veselov.
llvm-svn: 180626
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In -fparse-all-comments mode empty '//' comments were recognized as
RCK_Invalid, and were not merged with next and previous lines.
Patch by Amin Shali.
llvm-svn: 180625
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For Mach-O there were 2 implementations for parsing object files. A
standalone llvm/Object/MachOObject.h and llvm/Object/MachO.h which
implements the generic interface in llvm/Object/ObjectFile.h.
This patch adds the missing features to MachO.h, moves macho-dump to
use MachO.h and removes ObjectFile.h.
In addition to making sure that check-all is clean, I checked that the
new version produces exactly the same output in all Mach-O files in a
llvm+clang build directory (including executables and shared
libraries).
To test the performance, I ran macho-dump over all the files in a
llvm+clang build directory again, but this time redirecting the output
to /dev/null. Both the old and new versions take about 4.6 seconds
(2.5 user) to finish.
llvm-svn: 180624
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c++ demangled functions in the global namespace (bugzilla 15854).
llvm-svn: 180623
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llvm-svn: 180622
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llvm-svn: 180621
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We need to intialize this to something and since clang does not set
the shader type attribute and clang is used only for compute shaders,
initializing it to COMPUTE seems like the best choice.
Reviewed-by: Christian König <christian.koenig@amd.com>
llvm-svn: 180620
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rdar://problem/13056109
llvm-svn: 180619
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rdar://problem/13056109
llvm-svn: 180618
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"hint" space for Thumb actually overlaps the encoding space of the CPS
instruction. In actuality, hints can be defined as CPS instructions where imod
and M bits are all nil.
Handle decoding of permitted nop-compatible hints (i.e. nop, yield, wfi, wfe,
sev) in DecodeT2CPSInstruction.
This commit adds a proper diagnostic message for Imm0_4 and updates all tests.
Patch by Mihail Popa <Mihail.Popa@arm.com>.
llvm-svn: 180617
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llvm-svn: 180616
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Since we can't guarantee that the original dbg.declare instrinsic
is removed by LowerDbgDeclare(), we need to make sure that we are
not inserting the same dbg.value intrinsic over and over.
This removes tons of redundant DIEs when compiling optimized code.
rdar://problem/13056109
llvm-svn: 180615
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This fixes a problem on Linux where allocated memory would get overun in some use cases (ie. in TestExprs2.py).
llvm-svn: 180614
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llvm-svn: 180613
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llvm-svn: 180612
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In the default PowerPC assembler syntax, registers are specified simply
by number, so they cannot be distinguished from immediate values (without
looking at the opcode). This means that the default operand matching logic
for the asm parser does not work, and we need to specify custom matchers.
Since those can only be specified with RegisterOperand classes and not
directly on the RegisterClass, all instructions patterns used by the asm
parser need to use a RegisterOperand (instead of a RegisterClass) for
all their register operands.
This patch adds one RegisterOperand for each RegisterClass, using the
same name as the class, just in lower case, and updates all instruction
patterns to use RegisterOperand instead of RegisterClass operands.
llvm-svn: 180611
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llvm-svn: 180610
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into account some previously misssed cases (PRE_DEC addressing mode, the offset and base address are swapped, etc). This should fix PR15581.
llvm-svn: 180609
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When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong sub-opcodes).
Tests will be added together with the asm parser.
llvm-svn: 180608
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When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong sub-opcodes). Note that apparently
the compiler currently never generates pre-inc instructions
for floating point types for some reason ...
Tests will be added together with the asm parser.
llvm-svn: 180607
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When testing the asm parser, I noticed wrong encodings for the
above instructions (wrong operand name in rldimi, wrong form
and sub-opcode for rldcl).
Tests will be added together with the asm parser.
llvm-svn: 180606
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When testing the asm parser, I ran into an error when using a conditional
branch to an external symbol (this doesn't occur in compiler-generated
code) due to missing support in PPCELFObjectWriter::getRelocTypeInner.
llvm-svn: 180605
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llvm-svn: 180604
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llvm-svn: 180603
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symbolizer."
llvm-svn: 180602
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On a 32 bit build this moves LinkageSpecDecl from 52 to 48 bytes.
llvm-svn: 180601
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pabs.
llvm-svn: 180600
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llvm-svn: 180599
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llvm-svn: 180598
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scalars.
This already helps SSE2 x86 a lot because it lacks an efficient way to
represent a vector select. The long term goal is to enable the backend to match
a canonicalized pattern into a single instruction (e.g. vabs or pabs).
llvm-svn: 180597
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