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* Add support for TFE/LWE in image intrinsicsDavid Stuttard2018-11-2920-76/+1275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TFE and LWE support requires extra result registers that are written in the event of a failure in order to detect that failure case. The specific use-case that initiated these changes is sparse texture support. This means that if image intrinsics are used with either option turned on, the programmer must ensure that the return type can contain all of the expected results. This can result in redundant registers since the vector size must be a power-of-2. This change takes roughly 6 parts: 1. Modify the instruction defs in tablegen to add new instruction variants that can accomodate the extra return values. 2. Updates to lowerImage in SIISelLowering.cpp to accomodate setting TFE or LWE (where the bulk of the work for these instruction types is now done) 3. Extra verification code to catch cases where intrinsics have been used but insufficient return registers are used. 4. Modification to the adjustWritemask optimisation to account for TFE/LWE being enabled (requires extra registers to be maintained for error return value). 5. An extra pass to zero initialize the error value return - this is because if the error does not occur, the register is not written and thus must be zeroed before use. Also added a new (on by default) option to ensure ALL return values are zero-initialized that is required for sparse texture support. 6. Disable the inst_combine optimization in the presence of tfe/lwe (later TODO for this to re-enable and handle correctly). There's an additional fix now to avoid a dmask=0 For an image intrinsic with tfe where all result channels except tfe were unused, I was getting an image instruction with dmask=0 and only a single vgpr result for tfe. That is incorrect because the hardware assumes there is at least one vgpr result, plus the one for tfe. Fixed by forcing dmask to 1, which gives the desired two vgpr result with tfe in the second one. The TFE or LWE result is returned from the intrinsics using an aggregate type. Look in the test code provided to see how this works, but in essence IR code to invoke the intrinsic looks as follows: %v = call {<4 x float>,i32} @llvm.amdgcn.image.load.1d.v4f32i32.i32(i32 15, i32 %s, <8 x i32> %rsrc, i32 1, i32 0) %v.vec = extractvalue {<4 x float>, i32} %v, 0 %v.err = extractvalue {<4 x float>, i32} %v, 1 Differential revision: https://reviews.llvm.org/D48826 Change-Id: If222bc03642e76cf98059a6bef5d5bffeda38dda llvm-svn: 347871
* inhereit LLVM_ENABLE_LIBXML2David Callahan2018-11-291-7/+10
| | | | | | | | | | | | | | Summary: When building in an LLVM context, we should respect its LLVM_ENABLE_LIBXML2 option. Reviewers: vitalybuka, mspertus, modocache Reviewed By: modocache Subscribers: mgorny, cfe-commits Differential Revision: https://reviews.llvm.org/D53212 llvm-svn: 347870
* [CMake] Fix standalone build for debugserver on macOSStefan Granitz2018-11-291-1/+6
| | | | | | | | | | | | | | | | | Summary: Quick-fix to avoid CMake config issue: ``` CMake Error at /path/to/lldb/cmake/modules/AddLLDB.cmake:116 (add_dependencies): Cannot add target-level dependencies to non-existent target "lldb-suite". ``` Reviewers: xiaobai, beanz Subscribers: mgorny, lldb-commits Differential Revision: https://reviews.llvm.org/D55032 llvm-svn: 347869
* [CVP] tidy processCmp(); NFCSanjay Patel2018-11-291-14/+14
| | | | | | | | 1. The variables were confusing: 'C' typically refers to a constant, but here it was the Cmp. 2. Formatting violations. 3. Simplify code to return true/false constant. llvm-svn: 347868
* Revert "[LICM] Enable control flow hoisting by default" and "[LICM] Reapply ↵Martin Storsjo2018-11-293-1674/+24
| | | | | | | | | | | r347190 "Make LICM able to hoist phis" with fix" This reverts commits r347776 and r347778. The first one, r347776, caused significant compile time regressions for certain input files, see PR39836 for details. llvm-svn: 347867
* [CVP] auto-generate complete test checks; NFCSanjay Patel2018-11-295-289/+1009
| | | | llvm-svn: 347866
* [OpenCL] Improve diags for addr spaces in templatesAnastasia Stulova2018-11-295-24/+43
| | | | | | | | | | | Fix ICEs on template instantiations that were leading to the creation of invalid code patterns with address spaces. Incorrect cases are now diagnosed properly. Differential Revision: https://reviews.llvm.org/D54858 llvm-svn: 347865
* Revert r347596 "Support for inserting profile-directed cache prefetches"Hans Wennborg2018-11-2916-689/+1
| | | | | | | | | | | | It causes asserts building BoringSSL. See https://crbug.com/91009#c3 for repro. This also reverts the follow-ups: Revert r347724 "Do not insert prefetches with unsupported memory operands." Revert r347606 "[X86] Add dependency from X86 to ProfileData after rL347596" Revert r347607 "Add new passes to X86 pipeline tests" llvm-svn: 347864
* Set MustBuildLookupTable on PrimaryContext in ExternalASTMergerRaphael Isemann2018-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: `MustBuildLookupTable` must always be called on a primary context as we otherwise trigger an assert, but we don't ensure that this will always happen in our code right now. This patch explicitly requests the primary context when doing this call as this shouldn't break anything (as calling `getPrimaryContext` on a context which is its own primary context is a no-op) but will catch these rare cases where we somehow operate on a declaration context that is not its own primary context. See also D54863. Reviewers: martong, a.sidorin, shafik Reviewed By: martong Subscribers: davide, rnkovacs, cfe-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D54898 llvm-svn: 347863
* [GlobalISel] Fix insertion of stack-protector epiloguePetr Pavlu2018-11-292-8/+73
| | | | | | | | | | | | | | | | | * Tell the StackProtector pass to generate the epilogue instrumentation when GlobalISel is enabled because GISel currently does not implement the same deferred epilogue insertion as SelectionDAG. * Update StackProtector::InsertStackProtectors() to find a stack guard slot by searching for the llvm.stackprotector intrinsic when the prologue was not created by StackProtector itself but the pass still needs to generate the epilogue instrumentation. This fixes a problem when the pass would abort because the stack guard AllocInst pointer was null when generating the epilogue -- test CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll. Differential Revision: https://reviews.llvm.org/D54518 llvm-svn: 347862
* [GlobalISel] Make EnableGlobalISel always set when GISel is enabledPetr Pavlu2018-11-294-14/+35
| | | | | | | | | | | | | | | | | | | Change meaning of TargetOptions::EnableGlobalISel. The flag was previously set only when a target switched on GlobalISel but it is now always set when the GlobalISel pipeline is enabled. This makes the flag consistent with TargetOptions::EnableFastISel and allows its use in other parts of the compiler to determine when GlobalISel is enabled. The EnableGlobalISel flag had previouly only one use in TargetPassConfig::isGlobalISelAbortEnabled(). The method used its value to determine if GlobalISel was enabled by a target and returned false in such a case. To preserve the current behaviour, a new flag TargetOptions::GlobalISelAbort is introduced to separately record the abort behaviour. Differential Revision: https://reviews.llvm.org/D54518 llvm-svn: 347861
* Adding a FIXME test to document an area for improvement with the ↵Aaron Ballman2018-11-291-0/+12
| | | | | | cert-err58-cpp check; NFC. llvm-svn: 347860
* [LLDB] - Improve the support of .debug_str_offsets/.debug_str_offsets.dwoGeorge Rimar2018-11-297-20/+280
| | | | | | | | | | | | | | | | | A skeleton compilation unit may contain the DW_AT_str_offsets_base attribute that points to the first string offset of the CU contribution to the .debug_str_offsets. At the same time, when we use split dwarf, the corresponding split debug unit also may use DW_FORM_strx* forms pointing to its own .debug_str_offsets.dwo. In that case, DWO does not contain DW_AT_str_offsets_base, but LLDB still need to know and skip the .debug_str_offsets.dwo section header to access the offsets. The patch implements the support of DW_AT_str_offsets_base. Differential revision: https://reviews.llvm.org/D54844 llvm-svn: 347859
* [llvm-rc] Support EXSTYLE statement.Martin Storsjo2018-11-299-2/+98
| | | | | | | | Patch by Jacek Caban! Differential Revision: https://reviews.llvm.org/D55020 llvm-svn: 347858
* [llvm-mca][MC] Add the ability to declare which processor resources model ↵Andrea Di Biagio2018-11-2914-107/+312
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | load/store queues (PR36666). This patch adds the ability to specify via tablegen which processor resources are load/store queue resources. A new tablegen class named MemoryQueue can be optionally used to mark resources that model load/store queues. Information about the load/store queue is collected at 'CodeGenSchedule' stage, and analyzed by the 'SubtargetEmitter' to initialize two new fields in struct MCExtraProcessorInfo named `LoadQueueID` and `StoreQueueID`. Those two fields are identifiers for buffered resources used to describe the load queue and the store queue. Field `BufferSize` is interpreted as the number of entries in the queue, while the number of units is a throughput indicator (i.e. number of available pickers for loads/stores). At construction time, LSUnit in llvm-mca checks for the presence of extra processor information (i.e. MCExtraProcessorInfo) in the scheduling model. If that information is available, and fields LoadQueueID and StoreQueueID are set to a value different than zero (i.e. the invalid processor resource index), then LSUnit initializes its LoadQueue/StoreQueue based on the BufferSize value declared by the two processor resources. With this patch, we more accurately track dynamic dispatch stalls caused by the lack of LS tokens (i.e. load/store queue full). This is also shown by the differences in two BdVer2 tests. Stalls that were previously classified as generic SCHEDULER FULL stalls, are not correctly classified either as "load queue full" or "store queue full". About the differences in the -scheduler-stats view: those differences are expected, because entries in the load/store queue are not released at instruction issue stage. Instead, those are released at instruction executed stage. This is the main reason why for the modified tests, the load/store queues gets full before PdEx is full. Differential Revision: https://reviews.llvm.org/D54957 llvm-svn: 347857
* Fix windows build broken by r347846Pavel Labath2018-11-291-1/+0
| | | | | | | | | The changed order of includes caused compile errors on MSVC due to snprintf macro definition. snprintf should available since VS2015, and the rest of the code seems to be able to use snprintf just fine without this macro, so this removes it from the lldb driver as well. llvm-svn: 347855
* [LLD][ELF] Error if _GLOBAL_OFFSET_TABLE_ is defined in input objectsPeter Smith2018-11-292-3/+28
| | | | | | | | | | | | | | | | | The _GLOBAL_OFFSET_TABLE_ is a linker defined symbol that is placed at some location relative to the .got, .got.plt or .toc section. On some targets such as Arm the correctness of some code sequences using a relocation to _GLOBAL_OFFSET_TABLE_ depend on the value of the symbol being in the linker defined place. Follow the ld.gold example and give a multiple symbol definition error. The ld.bfd behaviour is to ignore the definition in the input object and redefine it, which seems like it could be more surprising. fixes pr39587 Differential Revision: https://reviews.llvm.org/D54624 llvm-svn: 347854
* AMDGPU/InsertWaitcnts: Remove the dependence on MachineLoopInfoNicolai Haehnle2018-11-292-469/+303
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: MachineLoopInfo cannot be relied on for correctness, because it cannot properly recognize loops in irreducible control flow which can be introduced by late machine basic block optimization passes. See the new test case for the reduced form of an example that occurred in practice. Use a simple fixpoint iteration instead. In order to facilitate this change, refactor WaitcntBrackets so that it only tracks pending events and registers, rather than also maintaining state that is relevant for the high-level algorithm. Various accessor methods can be removed or made private as a consequence. Affects (in radv): - dEQP-VK.glsl.loops.special.{for,while}_uniform_iterations.select_iteration_count_{fragment,vertex} Fixes: r345719 ("AMDGPU: Rewrite SILowerI1Copies to always stay on SALU") Reviewers: msearles, rampitec, scott.linder, kanarayan Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits, hakzsam Differential Revision: https://reviews.llvm.org/D54231 llvm-svn: 347853
* AMDGPU/InsertWaitcnt: Consistently use uint32_t for scores / time pointsNicolai Haehnle2018-11-291-55/+49
| | | | | | | | | | | | | | | | Summary: There is one obsolete reference to using -1 as an indication of "unknown", but this isn't actually used anywhere. Using unsigned makes robust wrapping checks easier. Reviewers: msearles, rampitec, scott.linder, kanarayan Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, llvm-commits, tpr, t-tye, hakzsam Differential Revision: https://reviews.llvm.org/D54230 llvm-svn: 347852
* AMDGPU/InsertWaitcnt: Remove unused WaitAtBeginningNicolai Haehnle2018-11-291-27/+2
| | | | | | | | | | Reviewers: msearles, rampitec, scott.linder, kanarayan Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits, hakzsam Differential Revision: https://reviews.llvm.org/D54229 llvm-svn: 347851
* AMDGPU/InsertWaitcnts: Simplify pending events trackingNicolai Haehnle2018-11-291-191/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Instead of storing the "score" (last time point) of the various relevant events, only store whether an event is pending or not. This is sufficient, because whenever only one event of a count type is pending, its last time point is naturally the upper bound of all time points of this count type, and when multiple event types are pending, the count type has gone out of order and an s_waitcnt to 0 is required to clear any pending event type (and will then clear all pending event types for that count type). This also removes the special handling of GDS_GPR_LOCK and EXP_GPR_LOCK. I do not understand what this special handling ever attempted to achieve. It has existed ever since the original port from an internal code base, so my best guess is that it solved a problem related to EXEC handling in that internal code base. Reviewers: msearles, rampitec, scott.linder, kanarayan Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits, hakzsam Differential Revision: https://reviews.llvm.org/D54228 llvm-svn: 347850
* AMDGPU/InsertWaitcnts: Use foreach loops for inst and wait event typesNicolai Haehnle2018-11-291-26/+39
| | | | | | | | | | | | | | Summary: It hides the type casting ugliness, and I happened to have to add a new such loop (in a later patch). Reviewers: msearles, rampitec, scott.linder, kanarayan Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits, hakzsam Differential Revision: https://reviews.llvm.org/D54227 llvm-svn: 347849
* AMDGPU/InsertWaitcnts: Untangle some semi-global stateNicolai Haehnle2018-11-296-245/+238
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Reduce the statefulness of the algorithm in two ways: 1. More clearly split generateWaitcntInstBefore into two phases: the first one which determines the required wait, if any, without changing the ScoreBrackets, and the second one which actually inserts the wait and updates the brackets. 2. Communicate pre-existing s_waitcnt instructions using an argument to generateWaitcntInstBefore instead of through the ScoreBrackets. To simplify these changes, a Waitcnt structure is introduced which carries the counts of an s_waitcnt instruction in decoded form. There are some functional changes: 1. The FIXME for the VCCZ bug workaround was implemented: we only wait for SMEM instructions as required instead of waiting on all counters. 2. We now properly track pre-existing waitcnt's in all cases, which leads to less conservative waitcnts being emitted in some cases. s_load_dword ... s_waitcnt lgkmcnt(0) <-- pre-existing wait count ds_read_b32 v0, ... ds_read_b32 v1, ... s_waitcnt lgkmcnt(0) <-- this is too conservative use(v0) more code use(v1) This increases code size a bit, but the reduced latency should still be a win in basically all cases. The worst code size regressions in my shader-db are: WORST REGRESSIONS - Code Size Before After Delta Percentage 1724 1736 12 0.70 % shaders/private/f1-2015/1334.shader_test [0] 2276 2284 8 0.35 % shaders/private/f1-2015/1306.shader_test [0] 4632 4640 8 0.17 % shaders/private/ue4_elemental/62.shader_test [0] 2376 2384 8 0.34 % shaders/private/f1-2015/1308.shader_test [0] 3284 3292 8 0.24 % shaders/private/talos_principle/1955.shader_test [0] Reviewers: msearles, rampitec, scott.linder, kanarayan Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits, hakzsam Differential Revision: https://reviews.llvm.org/D54226 llvm-svn: 347848
* [CODE_OWNERS] Add myself as code owner for MinGWMartin Storsjo2018-11-291-0/+4
| | | | llvm-svn: 347847
* Remove getopt includes from the driverPavel Labath2018-11-292-13/+0
| | | | | | | | | | | | | They are not needed now that we use LLVMOption for command-line parsing thank you, Jonas). This also allows us to avoid linking of lldbHost into the driver which was breaking liblldb encapsulation. (Technically, there is still a lldb/Host/windows/windows.h include which is needed on windows, but this is a header-only wrapper for <windows.h>, so it is not necessary to link lldbHost for that. But ideally, that should go away too.) llvm-svn: 347846
* [NFC] Add two XFAIL tests from PR39783Max Kazantsev2018-11-292-0/+279
| | | | llvm-svn: 347845
* Disable TermFolding in LoopSimplifyCFG until PR39783 is fixedMax Kazantsev2018-11-291-1/+1
| | | | llvm-svn: 347844
* [LoopStrengthReduce] ComplexityLimit as an optionSam Parker2018-11-293-3/+125
| | | | | | | | Convert ComplexityLimit into a command line value. Differential Revision: https://reviews.llvm.org/D54899 llvm-svn: 347843
* [LLDB] - Fix setting the breakpoints when -gsplit-dwarf and DWARF 5 were ↵George Rimar2018-11-294-4/+140
| | | | | | | | | | | | | | | | used for building the executable. The issue happens because starting from DWARF v5 DW_AT_addr_base attribute should be used instead of DW_AT_GNU_addr_base. LLDB does not do that and we end up reading the .debug_addr header as section content (as addresses) instead of skipping it and reading the real addresses. Then LLDB is unable to match 2 similar locations and thinks they are different. Differential revision: https://reviews.llvm.org/D54751 llvm-svn: 347842
* [Inliner] Modify the merging of min-legal-vector-width attribute to better ↵Craig Topper2018-11-292-13/+32
| | | | | | | | | | handle when the caller or callee don't have the attribute. Lack of an attribute means that the function hasn't been checked for what vector width it requires. So if the caller or the callee doesn't have the attribute we should make sure the combined function after inlining does not have the attribute. If the caller already doesn't have the attribute we can just avoid adding it. Otherwise if the callee doesn't have the attribute just remove the caller's attribute. llvm-svn: 347841
* [Inliner] Add test for merging of min-legal-vector-width function attribute.Craig Topper2018-11-291-0/+29
| | | | | | This should have been added in r337844, but apparently was I failed to 'git add' the file. llvm-svn: 347840
* [CGP] Improve compile time for complex addressing modeSerguei Katkov2018-11-291-106/+58
| | | | | | | | | | | | This is a fix for PR39625 with improvement the compile time by reducing the number of intermediate Phi nodes created. Reviewers: john.brawn, reames Reviewed By: john.brawn Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D54932 llvm-svn: 347839
* Revert "[TextAPI] Fix a memory leak in the TBD reader."Juergen Ributzka2018-11-291-4/+2
| | | | llvm-svn: 347838
* [TextAPI] Fix a memory leak in the TBD reader.Juergen Ributzka2018-11-291-2/+4
| | | | | | | This fixes an issue where we were leaking the YAML document if there was a parsing error. llvm-svn: 347837
* [TextAPI] Switch back to a custom Platform enum.Juergen Ributzka2018-11-296-44/+55
| | | | | | | | | Moving to PlatformType from BinaryFormat had some UB fallout when handing unknown platforms or malformed input files. This should fix the sanitizer bots. llvm-svn: 347836
* [X86] Correct comment. NFCCraig Topper2018-11-291-1/+1
| | | | llvm-svn: 347835
* Add Hurd target to Clang driver (2/2)Kristina Brooks2018-11-2916-2/+324
| | | | | | | | | | | | | | | This adds Hurd toolchain support to Clang's driver in addition to handling translating the triple from Hurd-compatible form to the actual triple registered in LLVM. (Phabricator was stripping the empty files from the patch so I manually created them) Patch by sthibaul (Samuel Thibault) Differential Revision: https://reviews.llvm.org/D54379 llvm-svn: 347833
* Add Hurd target to LLVMSupport (1/2)Kristina Brooks2018-11-293-2/+17
| | | | | | | | | | | Add the required target triples to LLVMSupport to support Hurd in LLVM (formally `pc-hurd-gnu`). Patch by sthibaul (Samuel Thibault) Differential Revision: https://reviews.llvm.org/D54378 llvm-svn: 347832
* [PowerPC] Fix a conversion is not considered when the ISD::BR_CC node making ↵Li Jia He2018-11-292-16/+25
| | | | | | | | | | | | | | | | the instruction selection Summary: A signed comparison of i1 values produces the opposite result to an unsigned one if the condition code includes less-than or greater-than. This is so because 1 is the most negative signed i1 number and the most positive unsigned i1 number. The CR-logical operations used for such comparisons are non-commutative so for signed comparisons vs. unsigned ones, the input operands just need to be swapped. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D54825 llvm-svn: 347831
* [WebAssembly] Update docsSam Clegg2018-11-292-20/+93
| | | | | | | | | This is an reland of rL343155 which got reverted because of a sphinx failure on the buildbot. Differential Revision: https://reviews.llvm.org/D54982 llvm-svn: 347830
* [PowerPC] [NFC] Add test cases to the ISD::BR_CC node in the instruction ↵Li Jia He2018-11-291-0/+602
| | | | | | | | | | | | | | | | | | | | | | | | | selection Add the following test case for the ISD::BR_CC node in the instruction selection define i64 @testi64slt(i64 %c1, i64 %c2, i64 %c3, i64 %c4, i64 %a1, i64 %a2) #0 { entry: %cmp1 = icmp eq i64 %c3, %c4 %cmp3tmp = icmp eq i64 %c1, %c2 %cmp3 = icmp slt i1 %cmp3tmp, %cmp1 br i1 %cmp3, label %iftrue, label %iffalse iftrue: ret i64 %a1 iffalse: ret i64 %a2 } The data type i64 can be replaced by i32, i64, float, double
 And condition codes can be replaced by: SETEQ, SETEN, SELT, SETLE, SETGT, SETGE,SETULT, SETULE, SSETGT, and SETUGE Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D54824 llvm-svn: 347828
* [TextAPI] TBD Reader/Writer (bot fixes: take 2)Juergen Ributzka2018-11-292-8/+30
| | | | | | Replace the tuple with a struct to work around an explicit constructor bug. llvm-svn: 347827
* NFC. Use unsigned type for uses counter in CaptureTrackingArtur Pilipenko2018-11-291-2/+2
| | | | llvm-svn: 347826
* [Documentation] Try to fix build failure in ↵Eugene Zelenko2018-11-291-4/+4
| | | | | | cppcoreguidelines-narrowing-conversions documentation llvm-svn: 347825
* [TextAPI] TBD Reader/Writer (bot fixes)Juergen Ributzka2018-11-293-10/+12
| | | | | | Trying if switching from a vector to an array will appeas the bots. llvm-svn: 347824
* [TextAPI] TBD Reader/WriterJuergen Ributzka2018-11-2925-0/+3229
| | | | | | | | | | | | | | | | | Add basic infrastructure for reading and writting TBD files (version 1 - 3). The TextAPI library is not used by anything yet (besides the unit tests). Tool support will be added in a separate commit. The TBD format is currently documented in the implementation file (TextStub.cpp). https://reviews.llvm.org/D53945 Update: This contains changes to fix issues discovered by the bots: - add parentheses to silence warnings. - rename variables - use PlatformType from BinaryFormat llvm-svn: 347823
* [driver] Fix --core/-c and add testJonas Devlieghere2018-11-294-50/+52
| | | | | | | | | | | Because the optarg variable was shadowed we didn't notice we weren't extracting the value from the option. This patch fixes that and renames the variable to prevent this from happening in the future. I also added two tests to check the error output for --core and --file when the given value doesn't exist. llvm-svn: 347821
* [ELF] --gdb-index: use lower_bound to compute relative CU index in the ↵Fangrui Song2018-11-292-19/+43
| | | | | | | | | | | | | | | | | | | | | | object file Summary: This reinstates what I originally intended to do in D54361. It removes the assumption that .debug_gnu_pubnames has increasing CuOffset. Now we do better than gold here: when .debug_gnu_pubnames contains multiple sets, gold would think every set has the same CU index as the first set (incorrect). Reviewed By: ruiu Reviewers: ruiu, dblaikie, espindola Subscribers: emaste, arichardson, arphaman, llvm-commits Differential Revision: https://reviews.llvm.org/D54483 llvm-svn: 347820
* [x86] try select simplification for target-specific nodesSanjay Patel2018-11-282-1/+57
| | | | | | | | | | | | | This failed to select (which might be a separate bug) in X86ISelDAGToDAG because we try to create a select node that can be simplified away after rL347227. This change avoids the problem by simplifying the SHRUNKBLEND node sooner. In the test case, we manage to realize that the true/false values of the select (SHRUNKBLEND) are the same thing, so it simplifies away completely. llvm-svn: 347818
* [driver] Some NFC cleanupJonas Devlieghere2018-11-282-30/+33
| | | | | | | This patch includes some small things I noticed while refactoring the driver but didn't want to include in that patch. llvm-svn: 347817
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