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* R600/SI: Promote fp64 SELECT to i64Tom Stellard2014-03-242-12/+2
| | | | | | | This type promotion is replacing a Tablegen pattern and it is already covered by existing tests. llvm-svn: 204617
* SelectionDAG: Allow promotion of SELECT nodes from float to int typesTom Stellard2014-03-241-1/+2
| | | | | | | | And vice-versa, as long as the types are the same width. There are a few R600 tests that will cover this. llvm-svn: 204616
* R600: Reorganize tablegen instruction definitionsTom Stellard2014-03-245-781/+826
| | | | | | Each GPU family now has its own file. llvm-svn: 204615
* [PPC64LE] ELFv2 ABI updates for the .opd sectionWill Schmidt2014-03-241-0/+5
| | | | | | | | | | | | | | | | | | [PPC64LE] ELFv2 ABI updates for the .opd section The PPC64 Little Endian (PPC64LE) target supports the ELFv2 ABI, and as such, does not have a ".opd" section. This is keyed off a _CALL_ELF=2 macro check. The CALL_ELF check is not clearly documented at this time. The basis for usage in this patch is from the gcc thread here: http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01144.html > Adding comment from Uli: Looks good to me. I think the old-style JIT doesn't really work anyway for 64-bit, but at least with this patch LLVM will compile and link again on a ppc64le host ... llvm-svn: 204614
* Update DataLayout/DescriptionString for ppc64leWill Schmidt2014-03-242-2/+11
| | | | | | | | | | Update DataLayout/DescriptionString for ppc64le Similar LLVM change made in r203664 Testcase included. llvm-svn: 204613
* [mips] Add regression tests for parenthetic expressions in MIPS assembly.Daniel Sanders2014-03-241-0/+12
| | | | | | | | | | | | Summary: These expressions already worked but weren't tested. Patch by Robert N. M. Watson and David Chisnall (it was originally two patches) Their work was sponsored by: DARPA, AFRL Differential Revision: http://llvm-reviews.chandlerc.com/D3156 llvm-svn: 204612
* [mips] Allow dsubu to take an immediate as an alias for dsubiu.Daniel Sanders2014-03-242-0/+5
| | | | | | | | | | Summary: Patch by David Chisnall His work was sponsored by: DARPA, AFRL Differential Revision: http://llvm-reviews.chandlerc.com/D3155 llvm-svn: 204611
* tsan: reduce default number of threads in benchmarksDmitry Vyukov2014-03-241-3/+5
| | | | | | buildbots seem to OOM with that many threads llvm-svn: 204610
* [PowerPC] Mark many instructions as commutativeHal Finkel2014-03-244-4/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I'm under the impression that we used to infer the isCommutable flag from the instruction-associated pattern. Regardless, we don't seem to do this (at least by default) any more. I've gone through all of our instruction definitions, and marked as commutative all of those that should be trivial to commute (by exchanging the first two operands). There has been special code for the RL* instructions, and that's not changed. Before this change, we had the following commutative instructions: RLDIMI RLDIMIo RLWIMI RLWIMI8 RLWIMI8o RLWIMIo XSADDDP XSMULDP XVADDDP XVADDSP XVMULDP XVMULSP After: ADD4 ADD4o ADD8 ADD8o ADDC ADDC8 ADDC8o ADDCo ADDE ADDE8 ADDE8o ADDEo AND AND8 AND8o ANDo CRAND CREQV CRNAND CRNOR CROR CRXOR EQV EQV8 EQV8o EQVo FADD FADDS FADDSo FADDo FMADD FMADDS FMADDSo FMADDo FMSUB FMSUBS FMSUBSo FMSUBo FMUL FMULS FMULSo FMULo FNMADD FNMADDS FNMADDSo FNMADDo FNMSUB FNMSUBS FNMSUBSo FNMSUBo MULHD MULHDU MULHDUo MULHDo MULHW MULHWU MULHWUo MULHWo MULLD MULLDo MULLW MULLWo NAND NAND8 NAND8o NANDo NOR NOR8 NOR8o NORo OR OR8 OR8o ORo RLDIMI RLDIMIo RLWIMI RLWIMI8 RLWIMI8o RLWIMIo VADDCUW VADDFP VADDSBS VADDSHS VADDSWS VADDUBM VADDUBS VADDUHM VADDUHS VADDUWM VADDUWS VAND VAVGSB VAVGSH VAVGSW VAVGUB VAVGUH VAVGUW VMADDFP VMAXFP VMAXSB VMAXSH VMAXSW VMAXUB VMAXUH VMAXUW VMHADDSHS VMHRADDSHS VMINFP VMINSB VMINSH VMINSW VMINUB VMINUH VMINUW VMLADDUHM VMULESB VMULESH VMULEUB VMULEUH VMULOSB VMULOSH VMULOUB VMULOUH VNMSUBFP VOR VXOR XOR XOR8 XOR8o XORo XSADDDP XSMADDADP XSMAXDP XSMINDP XSMSUBADP XSMULDP XSNMADDADP XSNMSUBADP XVADDDP XVADDSP XVMADDADP XVMADDASP XVMAXDP XVMAXSP XVMINDP XVMINSP XVMSUBADP XVMSUBASP XVMULDP XVMULSP XVNMADDADP XVNMADDASP XVNMSUBADP XVNMSUBASP XXLAND XXLNOR XXLOR XXLXOR This is a by-inspection change, and I'm not sure how to write a reliable test case. I would like advice on this, however. llvm-svn: 204609
* tsan: add benchmarks for synchronization handlingDmitry Vyukov2014-03-249-0/+246
| | | | llvm-svn: 204608
* [Mips] Fix formatting.Simon Atanasyan2014-03-241-1/+1
| | | | llvm-svn: 204607
* [Mips] Sort R_MIPS_LO16 / R_MIPS_HI16 / R_MIPS_GOT16 before findingSimon Atanasyan2014-03-242-9/+69
| | | | | | pairs and calculate AHL addend. llvm-svn: 204606
* [mips] Implement shorthand add / sub forms for MIPS.Daniel Sanders2014-03-245-1/+138
| | | | | | | | | | | | | | | | | | | | | Summary: - If only two registers are passed to a three-register operation, then the first argument is both source and destination register. - If a non-register is passed as the last argument, generate the immediate version of the instruction. Also mark DADD commutative and add scheduling information (to the generic scheduler), and implement DSUB. Patch by David Chisnall His work was sponsored by: DARPA, AFRL CC: theraven Differential Revision: http://llvm-reviews.chandlerc.com/D3148 llvm-svn: 204605
* AArch64_BE test case for predefined macrosChristian Pirker2014-03-242-5/+112
| | | | llvm-svn: 204604
* Use --whole-archive linker option for minw too.Hafiz Abid Qadeer2014-03-241-0/+3
| | | | | | It is already used for Linux and FreeBSD. llvm-svn: 204603
* [CMake] Rename the variableAlexey Samsonov2014-03-245-5/+5
| | | | llvm-svn: 204602
* Removed a redundant entry.Hafiz Abid Qadeer2014-03-241-4/+0
| | | | | | | Revision 203667 has already added lldbHostWindows.a to USEDLIBS. Revision 203785 just ended up adding a redundant entry. llvm-svn: 204601
* [NVPTX] Add isel patterns for addrspacecastJustin Holewinski2014-03-243-0/+163
| | | | llvm-svn: 204600
* Fix a compile-time warningTimur Iskhodzhanov2014-03-241-4/+0
| | | | | | lib/CodeGen/CGBuiltin.cpp:3136:12: warning: variable ‘TblPos’ set but not used [-Wunused-but-set-variable] llvm-svn: 204599
* Update release notes with EHABI current behaviourRenato Golin2014-03-241-2/+1
| | | | llvm-svn: 204598
* Fix a VS compile-time warningTimur Iskhodzhanov2014-03-241-2/+1
| | | | | | warning C4345: behavior change: an object of POD type constructed with an initializer of the form () will be default-initialized llvm-svn: 204597
* Revert r204562,204566,204586,204587 as they broke ASan on WindowsTimur Iskhodzhanov2014-03-249-984/+29
| | | | llvm-svn: 204596
* A fix for sanitizers' TLS support on FreeBSDViktor Kutuzov2014-03-241-6/+15
| | | | llvm-svn: 204595
* [PowerPC] Don't schedule VSX copy legalization unless VSX is enabledHal Finkel2014-03-241-1/+2
| | | | | | There is no need to schedule this extra pass if it will have nothing to do. llvm-svn: 204594
* [CMake] Respect CMAKE_CXX_FLAGS in custom clang_compile commandsAlexey Samsonov2014-03-245-11/+21
| | | | llvm-svn: 204593
* Make MSan unittest -Werror=sign-compare cleanAlexey Samsonov2014-03-241-40/+43
| | | | llvm-svn: 204592
* [PowerPC] Update comment re: VSX copy-instruction selectionHal Finkel2014-03-241-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've done some experimentation with this, and it looks like using the lower-latency (but lower throughput) copy instruction is essentially always the right thing to do. My assumption is that, in order to be relatively sure that the higher-latency copy will increase throughput, we'd want to have it unlikely to be in-flight with its use. On the P7, the global completion table (GCT) can hold a maximum of 120 instructions, shared among all active threads (up to 4), giving 30 instructions per thread. So specifically, I'd require at least that many instructions between the copy and the use before the high-latency variant is used. Trying this, however, over the entire test suite resulted in zero cases where the high-latency form would be preferable. This may be a consequence of the fact that the scheduler views copies as free, and so they tend to end up close to their uses. For this experiment I created a function: unsigned chooseVSXCopy(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SrcReg, unsigned StartDist = 1, unsigned Depth = 3) const; with an implementation like: if (!Depth) return PPC::XXLOR; const unsigned MaxDist = 30; unsigned Dist = StartDist; for (auto J = I, JE = MBB.end(); J != JE && Dist <= MaxDist; ++J) { if (J->isTransient() && !J->isCopy()) continue; if (J->isCall() || J->isReturn() || J->readsRegister(DestReg, TRI)) return PPC::XXLOR; ++Dist; } // We've exceeded the required distance for the high-latency form, use it. if (Dist > MaxDist) return PPC::XVCPSGNDP; // If this is only an exit block, use the low-latency form. if (MBB.succ_empty()) return PPC::XXLOR; // We've reached the end of the block, check the successor blocks (up to some // depth), and use the high-latency form if that is okay with all successors. for (auto J = MBB.succ_begin(), JE = MBB.succ_end(); J != JE; ++J) { if (chooseVSXCopy(**J, (*J)->begin(), DestReg, SrcReg, Dist, --Depth) == PPC::XXLOR) return PPC::XXLOR; } // All of our successor blocks seem okay with the high-latency variant, so // we'll use it. return PPC::XVCPSGNDP; and then changed the copy opcode selection from: Opc = PPC::XXLOR; to: Opc = chooseVSXCopy(MBB, std::next(I), DestReg, SrcReg); In conclusion, I'm removing the FIXME from the comment, because I believe that there is, at least absent other examples, nothing to fix. llvm-svn: 204591
* [asan] Disable setjmp/sigsetjmp tests.Evgeniy Stepanov2014-03-241-3/+5
| | | | | | Failing due to PR19207. llvm-svn: 204590
* [asan] Fix a comment.Evgeniy Stepanov2014-03-241-2/+3
| | | | llvm-svn: 204589
* Driver: Fix a typo in a command line descriptionDavid Majnemer2014-03-241-2/+2
| | | | | | Thanks to Richard Smith for catching this! llvm-svn: 204588
* CodeGen: Remove unneeded directivesDavid Majnemer2014-03-242-35/+16
| | | | | | | | | Use two check-prefix patterns per FileCheck invocation for these tests, this cleanly removes redundant CHECK directives. Thanks to Richard Smith for the idea! llvm-svn: 204587
* MS ABI: Add tests, other cleanups for r204562David Majnemer2014-03-243-63/+783
| | | | | | | | | | | | | This commit cleans up a few accidents: - Do not rely on the order in which StringLiteral lays out bytes. - Use a more efficient mechanism for handling so-called "special-mappings" when mangling string literals. - There is no need to allocate a copy of the mangled name. - Add the test written for r204562. Thanks to Richard Smith for pointing these out! llvm-svn: 204586
* Update for llvm change.Rafael Espindola2014-03-243-13/+13
| | | | llvm-svn: 204585
* Teach llvm-readobj to print human friendly description of reserved sections.Rafael Espindola2014-03-2424-68/+88
| | | | llvm-svn: 204584
* Allow constant folding of ceil function whenever feasibleKarthik Bhat2014-03-242-0/+59
| | | | llvm-svn: 204583
* Add back tests that were reverted in r204203.Rafael Espindola2014-03-241-11/+56
| | | | | | They pass again with the fix in r204581. llvm-svn: 204582
* Propagate section from base to derived symbol.Rafael Espindola2014-03-243-27/+22
| | | | | | | | | | | | We were already propagating the section in a = b With this patch we also propagate it for a = b + 1 llvm-svn: 204581
* InstrProf: Silence spurious warnings in GCC 4.8Duncan P. N. Exon Smith2014-03-241-9/+13
| | | | | | No functionality change. llvm-svn: 204580
* SupportTests.LockFileManagerTest: Add assertions for Win32.NAKAMURA Takumi2014-03-231-2/+16
| | | | | | | - create_link doesn't work for nonexistent file. - remove cannot remove working directory. llvm-svn: 204579
* Remove unused diagnostic.Benjamin Kramer2014-03-231-2/+0
| | | | llvm-svn: 204578
* Fix tests in r204576Nico Rieck2014-03-232-8/+8
| | | | | | Proper redeclaration warnings for dllimport are not implemented yet. llvm-svn: 204577
* Treat dllimport globals without explicit storage class as externNico Rieck2014-03-233-0/+92
| | | | | | | dllimport implies a definition which means the 'extern' keyword is optional when declaring imported variables. llvm-svn: 204576
* ARM: no need to update SplatBits as it is not usedArnaud A. de Grandmaison2014-03-231-3/+0
| | | | llvm-svn: 204575
* Add missing file from r204570.Richard Smith2014-03-231-0/+5
| | | | llvm-svn: 204574
* llvm-profdata: Check for bad data in the show commandJustin Bogner2014-03-232-0/+4
| | | | llvm-svn: 204573
* Consistently dump default template arguments for template parameters as ↵Richard Smith2014-03-232-7/+15
| | | | | | 'TemplateArgument's. llvm-svn: 204572
* llvm-profdata: Use Format.h instead of handrolling a formatterJustin Bogner2014-03-231-19/+2
| | | | llvm-svn: 204571
* If a name is injected into an imported inline namespace without reopening thatRichard Smith2014-03-234-3/+21
| | | | | | | namespace, we need to update both the visible names of that namespace and of its enclosing namespace set. llvm-svn: 204570
* Cleanup dead assignments reported by scan-buildArnaud A. de Grandmaison2014-03-233-8/+2
| | | | llvm-svn: 204569
* When we inject a declaration into a namespace, add the primary DeclContext toRichard Smith2014-03-234-1/+14
| | | | | | | the update set rather than the current DeclContext. Add test for the local extern case too. llvm-svn: 204568
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