summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* [AArch64] Fix halfword load merging for big-endian targetsOliver Stannard2015-11-102-14/+35
| | | | | | | | | | | | For big-endian targets, when we merge two halfword loads into a word load, the order of the halfwords in the loaded value is reversed compared to little-endian, so the load-store optimiser needs to swap the destination registers. This does not affect merging of two word loads, as we use ldp, which treats the memory as two separate 32-bit words. llvm-svn: 252597
* Mark TestMiInterpreterExec.test_lldbmi_thread_continue as flaky on linuxPavel Labath2015-11-101-0/+1
| | | | llvm-svn: 252596
* Inliner: Do zero-cost inlines even if above a negative threshold (PR24851)Hans Wennborg2015-11-102-1/+18
| | | | | | Differential Revision: http://reviews.llvm.org/D14499 llvm-svn: 252595
* [ELF2] Remove Writer::getVAStart, use TargetInfo::getVAStart instead.Igor Kudrin2015-11-103-4/+5
| | | | llvm-svn: 252593
* AVX512 : Implemented encoding and DAG lowering for VMOVHPS/PD and VMOVLPS/PD ↵Igor Breger2015-11-105-5/+367
| | | | | | | | instructions. Differential Revision: http://reviews.llvm.org/D14492 llvm-svn: 252592
* Add support for tvos and watchos to ObjectFileMachO.Jason Molenda2015-11-104-148/+247
| | | | | | | | Add support for the new dyld shared cache format on ios etc devices. Small changes for classifying ObjC metadata symbols. llvm-svn: 252588
* [X86] Use setzero instead of set1(0) in a few places in intrinsic headers.Craig Topper2015-11-102-6/+6
| | | | llvm-svn: 252587
* [X86] Remove temporary variables from macros in x86 intrinsic headers. ↵Craig Topper2015-11-107-198/+138
| | | | | | Prevents duplicate names appearing from multiple macro expansions. NFC llvm-svn: 252586
* [X86] Fix bad intrinsic header comment. NFC.Craig Topper2015-11-101-1/+1
| | | | llvm-svn: 252585
* Upstream a small change from Greg Clayton for the REPL support:Jason Molenda2015-11-101-0/+6
| | | | | | | | | | "Modify internal breakpoints so they resolve just like external breakpoints do. This allow you to set symbol and file + line internal breakpoints and have them get updated correctly." <rdar://problem/16931767> llvm-svn: 252584
* The other half of a change made by Enrico for trying to get a correctJason Molenda2015-11-101-31/+57
| | | | | | | | | | | | | | | | | triple for a process. He writes, "Changes to the way setting the triple works on a target so that if the target has passed a fully specified triple, and the newly passed triple is not a revamp of the current one, and the current one is fully specified, then do not replace the existing triple." Triple handling got a bit more complicated on mac with the addition of ios/watchos/tvos and their simulators, and tracking the correct os versions for them so expressions are compiled with the expected APIs available to the user. <rdar://problem/19820698> llvm-svn: 252583
* Remove another variable unused in -Asserts buildDavid Blaikie2015-11-101-2/+2
| | | | llvm-svn: 252582
* The MacOSXi386 ABI should be used for watchos simulator debug sessions.Jason Molenda2015-11-102-1/+6
| | | | | | | | | | Also, add an async error message if the dyld solib loaded callback function can't find an ABI (which results in no solibs being loaded in the process). This is a big error and we should call attention to it. <rdar://problem/23471384> llvm-svn: 252581
* Remove some unused variables to clean up the -Werror buildDavid Blaikie2015-11-102-4/+4
| | | | llvm-svn: 252580
* [Hexagon] Adding instruction aliases and tests.Colin LeMahieu2015-11-103-0/+1072
| | | | llvm-svn: 252579
* Support for emitting inline stack probesAndy Ayers2015-11-107-31/+470
| | | | | | | | | | | | | | | | | | For CoreCLR on Windows, stack probes must be emitted as inline sequences that probe successive stack pages between the current stack limit and the desired new stack pointer location. This implements support for the inline expansion on x64. For in-body alloca probes, expansion is done during instruction lowering. For prolog probes, a stub call is initially emitted during prolog creation, and expanded after epilog generation, to avoid complications that arise when introducing new machine basic blocks during prolog and epilog creation. Added a new test case, modified an existing one to exclude non-x64 coreclr (for now). Add test case Fix tests llvm-svn: 252578
* Fix mingw targets. Bandaid for r252532's buildbot brakage.Richard Diamond2015-11-101-1/+1
| | | | | | | | | | Reviewers: brad.king, beanz Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D14523 llvm-svn: 252576
* Rollback 252570 for further investigationXinliang David Li2015-11-101-2/+0
| | | | llvm-svn: 252575
* [Hexagon] Fixing compound register printing and reenabling more tests.Colin LeMahieu2015-11-104-12/+33
| | | | llvm-svn: 252574
* AArch64: add experimental support for address tagging.Tim Northover2015-11-104-5/+166
| | | | | | | | | | | | | AArch64 has the ability to use the top 8-bits of an "address" for extra information, with the memory subsystem automatically masking them off for loads and stores. When that's happening, we can sometimes skip masks on memory operations in the compiler. However, this requires the host OS and support stack to preserve those bits so it can't be enabled everywhere. In principle iOS 8.0 and above do take the required precautions and but we'll put it under a flag for now. llvm-svn: 252573
* [CMake] Temporary workaround to support building builtins on darwin with a ↵Chris Bieneman2015-11-101-3/+18
| | | | | | | | toolchain that may not support all x86 and arm architectures. This is at least a little better than my first attempt. We still really need a way to do compile checks without linking. llvm-svn: 252572
* Use the generic Sparc CPU handling for Linux, FreeBSD and OpenBSD, too.Joerg Sonnenberger2015-11-104-36/+33
| | | | | | | | This currently changes the default toward the more historic -Av8/-Av9, but as discussed with James Y Knight, consistency is for now more important than figuring out which default CPU each OS should be using. llvm-svn: 252571
* [PGO] Add LLVM main include dir to profile runtime buildXinliang David Li2015-11-101-0/+2
| | | | | | | | | | | | Runtime code implicitly depends on the defintions and const values defined in LLVM proper, but currently such dependency is made implicitly by duplicating code across two dirs. As part of the PGO cleanup effort, there will be changes to share common sources. This is a preparation patch to enable it (NFC). Differential Revision: http://reviews.llvm.org/D14487 llvm-svn: 252570
* Revert "[CMake] [macho_embedded] Check to make sure the compiler supports ↵Chris Bieneman2015-11-101-13/+1
| | | | | | | | the architectures before generating build targets" This commit reverts r252525. I was not really thinking about this fix properly. This doesn't work because it relys on try_compile checks which do a full compile & link. I'm going to put in a temporary solution as an interm step until we have a way to perform compiler checks without linking. llvm-svn: 252569
* Fix llvm-nm(1) printing of llvm-bitcode files for -format darwin to match ↵Kevin Enderby2015-11-106-45/+138
| | | | | | | | darwin’s nm(1). Also a small fix to match printing of Mach-O objects with -format posix. llvm-svn: 252567
* [WebAssembly] Support 'unreachable' expressionDerek Schuff2015-11-104-2/+49
| | | | | | | | | | | | | | | Lower LLVM's 'unreachable' terminator to ISD::TRAP, and lower ISD::TRAP to wasm's 'unreachable' expression. WebAssembly type-checks expressions, but a noreturn function with a return type that doesn't match the context will cause a check failure. So we lower LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's 'unreachable' expression, which typechecks in any context and causes a trap if executed. Differential Revision: http://reviews.llvm.org/D14515 llvm-svn: 252566
* Remove unnecessary call to getAllocatableRegClassMatt Arsenault2015-11-101-4/+8
| | | | | | | | | | | | | | | | | | | | | | I'm not sure what the point of this was. I'm not sure why you would ever define an instruction that produces an unallocatable register class. No tests fail with this removed, and it seems like it should be a verifier error to define such an instruction. This was problematic for AMDGPU because it would make bad decisions by arbitrarily changing the register class when unsetting isAllocatable for VS_32/VS_64, which is currently set as a workaround to this problem. AMDGPU uses the VS_32/VS_64 register classes to represent operands which can use either VGPRs or SGPRs. When isAllocatable is unset for these, this would need to pick either the SGPR or VGPR class and insert either a copy we don't want, or an illegal copy we would need to deal with later. A semi-arbitrary register class ordering decision is made in tablegen, which resulted in always picking a VGPR class because it happens to have more registers than the SGPR register class. We really just want to use whatever register class the original register had. llvm-svn: 252565
* [PGO] Make indexed value profile data more compactXinliang David Li2015-11-107-88/+451
| | | | | | | | | | | | | | | | - Make indexed value profile data more compact by peeling out the per-site value count field into its own smaller sized array. - Introduced formal data structure definitions to specify value profile data layout in indexed format. Previously the layout of the data is only assumed in the client code (scattered in three different places : size computation, EmitData, and ReadData - The new data structure serves as a central place for layout documentation. - Add interfaces to force BE output for value profile data (testing purpose) - Add byte swap unit tests Differential Revision: http://reviews.llvm.org/D14401 llvm-svn: 252563
* Use the normal switch over getArch() approach and not a long if chain.Joerg Sonnenberger2015-11-101-13/+23
| | | | llvm-svn: 252562
* [Hexagon] Fixing store instructions and reenabling a few more tests.Colin LeMahieu2015-11-106-29/+20
| | | | llvm-svn: 252561
* Code cleanupEnrico Granata2015-11-103-1/+27
| | | | llvm-svn: 252560
* [Driver] Use platform-appropriate profiling libraries for WatchOS, TVOSVedant Kumar2015-11-103-4/+28
| | | | | | | | | | | | | When adding profiling instrumentation, use libclang_rt.profile_tvos.a for TVOS targets and libclang_rt.profile_watchos.a for WatchOS targets. I've also fixed up a comment and added an assert() that prevents us from defaulting to an incorrect platform. Differential Revision: http://reviews.llvm.org/D14521 Reviewed-by: t.p.northover llvm-svn: 252558
* [ARM] Handle t2ADDri in ARMAsmPrinter::EmitUnwindingInstruction.Akira Hatanaka2015-11-102-0/+12
| | | | | | | | | | | | | This fixes a bug in ARMAsmPrinter::EmitUnwindingInstruction where llvm_unreachable was reached because t2ADDri wasn't handled. Test case provided by Tim Northover. rdar://problem/23270609 http://reviews.llvm.org/D14518 llvm-svn: 252557
* [Hexagon] Fixing load instruction parsing and reenabling tests.Colin LeMahieu2015-11-108-23/+16
| | | | llvm-svn: 252555
* More rework of the updating logic for ValueObjectChild. Still just ↵Enrico Granata2015-11-091-24/+43
| | | | | | refactoring with no feature change llvm-svn: 252553
* MachineVerifier: Streamline live interval related error reportingMatthias Braun2015-11-091-90/+93
| | | | | | | | | Simply perform additional report_context() calls after a report() instead of adding more and more overloaded variations of report(). Also improve several instances where information was output in an ad-hoc way probably because no matching report() overload was available. llvm-svn: 252552
* MachineVerifier: Add missing linebreakMatthias Braun2015-11-092-1/+3
| | | | | | | MachineInstr::print() with SkipOppers==true does not produce a linebreak, so we have to do that in MachineVerifier::report(). llvm-svn: 252551
* MachineVerifier: MI::print has no TargetMachine overloadMatthias Braun2015-11-091-1/+1
| | | | | | | The code was passing a target machine pointer which degraded to a true operand to SkipOppers. llvm-svn: 252550
* MachineVerifier: print list of live intervals if availableMatthias Braun2015-11-091-1/+4
| | | | llvm-svn: 252549
* Simplify some APIs I was cleaning up while fixing -Wpessimizing-move warningDavid Blaikie2015-11-091-27/+25
| | | | | | (Reid fixed the original error, but this seems nice to do in any case) llvm-svn: 252548
* [CMake] Don't pass -fPIC when compiling the darwin builtinsChris Bieneman2015-11-091-1/+1
| | | | | | This change makes CMake match autoconf. llvm-svn: 252547
* Reorganise CPU handling for Sparc. When using -mcpu=v9 and co, __sparcv8Joerg Sonnenberger2015-11-096-18/+279
| | | | | | | | | is not defined for 32bit mode, but __sparcv9 is. Pass down the correct -target-cpu flags to the backend, so that instruction restrictions are applied correctly. Pass down the correct -A flag when not using IAS. The latter is limited to NetBSD targets in this commit. llvm-svn: 252545
* [CMake] Fixing a typo in variable name ARG_*->LIB_*Chris Bieneman2015-11-091-1/+1
| | | | llvm-svn: 252543
* Fix -Wpessimizing-move warning in llvm-config.cppReid Kleckner2015-11-091-1/+1
| | | | llvm-svn: 252542
* [WinEH] Remove isBarrier from instructions that do not returnReid Kleckner2015-11-091-2/+2
| | | | | | Fixes machine verification failures with David's latest EH change. llvm-svn: 252541
* Fix non-affine generated entering node not being recognized as dominatingMichael Kruse2015-11-092-6/+58
| | | | | | | | | | | | | | Scalar reloads in the generated entering block were not recognized as dominating the subregions locks when there were multiple entering nodes. This resulted in values defined in there not being copied. As a fix, we unconditionally add the BBMap of the generated entering node to the generated entry. This fixes part of llvm.org/PR25439. This reverts 252449 and reapplies r252445. Its test was failing indeterministically due to r252375 which was reverted in r252522. llvm-svn: 252540
* add a SelectionDAG method to check if no common bits are set in two nodes; NFCISanjay Patel2015-11-094-33/+22
| | | | | | | | | | | | | | | This was suggested in: http://reviews.llvm.org/D13956 and is a follow-on to: http://reviews.llvm.org/rL252515 http://reviews.llvm.org/rL252519 This lets us remove logically equivalent/duplicated code from DAGCombiner and X86ISelDAGToDAG. A corresponding function for IR instructions already exists in ValueTracking. llvm-svn: 252539
* CodeGen: Be clear about semantics in SlotIndex::getNextSlot(), NFCDuncan P. N. Exon Smith2015-11-091-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Be honest about using iterator semantics in `SlotIndex::getNextSlot()` and `SlotIndex::getPrevSlot()`. Instead of calling `getNextNode()` -- which is documented (but fails) to check for the sentinel -- call `&*++getIterator()`. This is (surprisingly!) a NFC commit. `ilist_traits<IndexListEntry>` has an `ilist_half_node<IndexListEntry>` as a sentinel (and no other fields), and so the layout of `ilist<IndexListEntry>` is: -- struct ilist<IndexListEntry> { ilist_half_node<IndexListEntry> Sentinel; IndexListEntry *Head; IndexListEntry *getHead() { return Head; } IndexListEntry *getSentinel() { return cast<...>(&Sentinel); } }; -- In memory, this happens to look just like: -- struct ilist<IndexListEntry> { ilist_node<IndexListEntry> Sentinel; IndexListEntry *getHead() { return Sentinel.getNext(); } IndexListEntry *getSentinel() { return cast<...>(&Sentinel); } }; -- As a result, `ilist_node<IndexListEntry>::getNextNode()` that checks `getNext()` of the possible sentinel will get a pointer to the head of the list; it will never detect the sentinel, and will return the sentinel itself instead of `nullptr` in the special cases. Since `getNextNode()` and `getPrevNode()` don't work, just be honest that we're not checking for the end/beginning of the list here. Since this code works, I guess we must never go past the sentinel. (It's possible we're just getting lucky, and the new code will get "lucky" in the same situations. To properly fix that hypothetical bug, we would need to check the iterator against `end()`/`begin()`.) llvm-svn: 252538
* Fix -Wdeprecated warnings due to the use of copy ops on SCEVPredicate ↵David Blaikie2015-11-091-4/+5
| | | | | | | | | | | derived class objects SCEVUnionPredicate is copied constructed here: lib/Transforms/Scalar/LoopDistribute.cpp:793 and move assigned (which can use the base class's copy ctor just fine/without extra cost (I'd add it if it weren't for MSVC's issues meaning = default is insufficient)) here: lib/Transforms/Utils/LoopVersioning.cpp:46 llvm-svn: 252537
* Use PythonDataObjects in swig helper functions.Zachary Turner2015-11-091-31/+31
| | | | | | | | | | | | | | | | | Relying on manual Python C API calls is error prone, especially when trying to maintain compatibility with Python 2 and Python 3. This patch additionally fixes what appears to be a potentially serious memory leak, in that were were incref'ing two values returned from the session dictionary but never decref'ing them. There was a comment indicating that it was intentional, but the reasoning was, I believe, faulty and it resulted in a legitimate memory leak. Switching everything to PythonObject based classes solves both the compatibility issues as well as the resource leak issues. llvm-svn: 252536
OpenPOWER on IntegriCloud