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* [CodeGen] Implicitly set stackrealign on the main function, if custom stack ↵Martin Storsjo2018-08-212-0/+26
| | | | | | | | | | | | | | | | | | | | | alignment is used If using a custom stack alignment, one is expected to make sure that all callers provide such alignment, or realign the stack in all entry points (and callbacks). Despite this, the compiler can assume that the main function will need realignment in these cases, since the startup routines calling the main function most probably won't provide the custom alignment. This matches what GCC does in similar cases; if compiling with -mincoming-stack-boundary=X -mpreferred-stack-boundary=X, GCC normally assumes such alignment on entry to a function, but specifically for the main function still does realignment. Differential Revision: https://reviews.llvm.org/D51026 llvm-svn: 340334
* [LICM] Refactor some AliasSetTracker code to get rid of new/deletes. NFCMarcello Maggioni2018-08-211-43/+33
| | | | | | Differential Revision: https://reviews.llvm.org/D51024 llvm-svn: 340333
* [CodeExtractor] Use 'normal destination' BB as insert point to store invoke ↵Florian Hahn2018-08-212-1/+56
| | | | | | | | | | | | | | | | | | | results. Currently CodeExtractor tries to use the next node after an invoke to place the store for the result of the invoke, if it is an out parameter of the region. This fails, as the invoke terminates the current BB. In that case, we can place the store in the 'normal destination' BB, as the result will only be available in that case. Reviewers: davidxl, davide, efriedma Reviewed By: davidxl Differential Revision: https://reviews.llvm.org/D51037 llvm-svn: 340331
* [WebAssembly] Don't make wasm cleanuppads into funclet entriesHeejin Ahn2018-08-212-5/+9
| | | | | | | | | | | | | | | Summary: Catchpads and cleanuppads are not funclet entries; they are only EH scope entries. We already dont't set `isEHFuncletEntry` for catchpads. This patch does the same thing for cleanuppads. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50654 llvm-svn: 340330
* [WebAssembly] Change writeSPToMemory to writeSPToGlobal (NFC)Heejin Ahn2018-08-211-4/+4
| | | | | | | | | | | | Summary: SP is now a __stack_pointer global and not a memory address anymore. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D51046 llvm-svn: 340328
* [RegisterCoalescer] Use substPhysReg in reMaterializeTrivialDefBjorn Pettersson2018-08-212-1/+55
| | | | | | | | | | | | | | | | | | | Summary: When RegisterCoalescer::reMaterializeTrivialDef is substituting a register use in a DBG_VALUE instruction, and the old register is a subreg, and the new register is a physical register, then we need to use substPhysReg in order to extract the correct subreg. Reviewers: wmi, aprantl Reviewed By: wmi Subscribers: hiraditya, MatzeB, qcolombet, tpr, llvm-commits Differential Revision: https://reviews.llvm.org/D50844 llvm-svn: 340326
* [WebAssembly] Add isEHScopeReturn instruction propertyHeejin Ahn2018-08-2112-5/+85
| | | | | | | | | | | | | | | | | | | | | | | | Summary: So far, `isReturn` property is used to mean both a return instruction from a functon and the end of an EH scope, a scope that starts with a EH scope entry BB and ends with a catchret or a cleanupret instruction. Because WinEH uses funclets, all EH-scope-ending instructions are also real return instruction from a function. But for wasm, they only serve as the end marker of an EH scope but not a return instruction that exits a function. This mismatch caused incorrect prolog and epilog generation in wasm EH scopes. This patch fixes this. This patch is in the same vein with rL333045, which splits `MachineBasicBlock::isEHFuncletEntry` into `isEHFuncletEntry` and `isEHScopeEntry`. Reviewers: dschuff Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits Differential Revision: https://reviews.llvm.org/D50653 llvm-svn: 340325
* Fix Wdocumentation warning. NFCI.Simon Pilgrim2018-08-211-1/+1
| | | | llvm-svn: 340324
* [InstCombine] Pull simple checks above a more complicated one. NFCICraig Topper2018-08-211-4/+2
| | | | | | I'm assuming its easier to make sure the RHS of an XOR is all ones than it is to check for the many select patterns we have. So lets check that first. Same with the one use check. llvm-svn: 340321
* [GVN] Assign new value number to calls reading memory, if there is no MemDep ↵Florian Hahn2018-08-212-13/+38
| | | | | | | | | | | | | | | | | | | | | | info. Currently we assign the same value number to two calls reading the same memory location if we do not have MemoryDependence info. Without MemDep Info we cannot guarantee that there is no store between the two calls, so we have to assign a new number to the second call. It also adds a new option EnableMemDep to enable/disable running MemoryDependenceAnalysis and also renamed NoLoads to NoMemDepAnalysis to be more explicit what it does. As it also impacts calls that read memory, NoLoads is a bit confusing. Reviewers: efriedma, sebpop, john.brawn, wmi Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D50893 llvm-svn: 340319
* [RegisterCoalscer] Manually remove leftover segments when commuting defKrzysztof Parzyszek2018-08-212-0/+90
| | | | | | | | | | | | | In removeCopyByCommutingDef, segments from the source live range are copied into (and merged with) the segments of the target live range. This is performed for all subranges of the source interval. It can happen that there will be subranges of the target interval that had no corresponding subranges in the source interval, and in such cases these subrages will not be updated. Since the copy being coalesced is about to be removed, these ranges need to be updated by removing the segments that are started by the copy. llvm-svn: 340318
* [NVPTX] Remove ftz variants of cvt with rounding modeBenjamin Kramer2018-08-212-94/+123
| | | | | | | | These do not exist in ptxas, it refuses to compile them. Differential Revision: https://reviews.llvm.org/D51042 llvm-svn: 340317
* [llvm-mca] Remove unused decl. NFC.Matt Davis2018-08-211-1/+0
| | | | llvm-svn: 340316
* Temporarily Revert "[PowerPC] Generate Power9 extswsli extend sign and shift ↵Eric Christopher2018-08-215-55/+3
| | | | | | | | immediate instruction" due to it causing a compiler crash on valid. This reverts commit r340016, testcase forthcoming. llvm-svn: 340315
* [llvm-mca] Add the ability to customize the instruction selection strategy ↵Andrea Di Biagio2018-08-212-34/+64
| | | | | | | | | | | | | | | | | | | | | | in the Scheduler. The constructor of Scheduler now accepts a SchedulerStrategy object, which is used internally by method Scheduler::select() to drive the instruction selection process. The goal of this patch is to enable the definition of custom selection strategies while reusing the same algorithms implemented by class Scheduler. The motivation is that, on some targets, the default strategy may not well approximate the selection logic in the hardware schedulers. This patch also adds the ability to pass a ResourceManager object to the constructor of Scheduler. This gives a bit more flexibility to the design, and potentially it allows to expose processor resources to SchedulerStrategy objects. Differential Revision: https://reviews.llvm.org/D51051 llvm-svn: 340314
* [X86][SSE] Add non-uniform udiv test that is mostly divide by 1.Simon Pilgrim2018-08-211-0/+178
| | | | | | The test demonstrates over-complicated codegen for a udiv that only has one divisor that doesn't equal 1. This should have allowed the codegen to be a lot simpler (uniform shifts etc.) but only the SSE2 manages to make use of this...... llvm-svn: 340313
* [AST] Remove notion of volatile from alias sets [NFCI]Philip Reames2018-08-214-38/+12
| | | | | | | | | | Volatility is not an aliasing property. We used to model volatile as if it had extremely conservative aliasing implications, but that hasn't been true for several years now. So, it doesn't make sense to be in AliasSet. It also turns out the code is entirely a noop. Outside of the AST code to update it, there was only one user: load store promotion in LICM. L/S promotion doesn't need the check since it walks all the users of the address anyway. It already checks each load or store via !isUnordered which causes us to bail for volatile accesses. (Look at the lines immediately following the two remove asserts.) There is the possibility of some small compile time impact here, but the only case which will get noticeably slower is a loop with a large number of loads and stores to the same address where only the last one we inspect is volatile. This is sufficiently rare it's not worth optimizing for.. llvm-svn: 340312
* Address Aaron Ballman's post-commit review comments from r340306, NFCErik Pilkington2018-08-212-4/+9
| | | | llvm-svn: 340311
* Update DBG_VALUE register operand during LiveInterval operationsYury Delendik2018-08-212-11/+121
| | | | | | | | | | | | | | | | | | | Summary: Handling of DBG_VALUE in ConnectedVNInfoEqClasses::Distribute() was fixed in PR16110. However DBG_VALUE register operands are not getting updated. This patch properly resolves the value location. Reviewers: MatzeB, vsk Reviewed By: MatzeB Subscribers: kparzysz, thegameg, vsk, MatzeB, dschuff, sbc100, jgravelle-google, aheejin, sunfish, llvm-commits Tags: #debug-info Differential Revision: https://reviews.llvm.org/D48994 llvm-svn: 340310
* Revert "Revert rr340111 "[GISel]: Add Legalization/lowering code for bit ↵Aditya Nandakumar2018-08-217-1/+518
| | | | | | | | | | | | | | | counting operations"" This reverts commit d1341152d91398e9a882ba2ee924147ea2f9b589. This patch originally made use of Nested MachineIRBuilder buildInstr calls, and since order of argument processing is not well defined, the instructions were built slightly in a different order (still correct). I've removed the nested buildInstr calls to have a defined order now. Patch was tested by Mikael. llvm-svn: 340309
* SafeStack: Use correct unsafe stack sizesVlad Tsyrklevich2018-08-212-1/+56
| | | | | | | | | | | | | | | | | Summary: When deallocating thread stacks, we use one thread's unsafe stack size to deallocate another thread's unsafe stack; however, the two sizes may differ. Record an unsafe stack's size in the thread stack linked list. Reviewers: pcc, eugenis Reviewed By: eugenis Subscribers: delcypher, llvm-commits, #sanitizers, kcc Differential Revision: https://reviews.llvm.org/D51016 llvm-svn: 340308
* [X86][SSE] Lower vXi8 general shifts to SSE shifts directly. NFCI.Simon Pilgrim2018-08-211-26/+17
| | | | | | Most of these shifts are extended to vXi16 so we don't gain anything from forcing another round of generic shift lowering - we know these extended cases are legal constant splat shifts. llvm-svn: 340307
* Add a new flag and attributes to control static destructor registrationErik Pilkington2018-08-2118-1/+197
| | | | | | | | | | | | | | | | | | | | This commit adds the flag -fno-c++-static-destructors and the attributes [[clang::no_destroy]] and [[clang::always_destroy]]. no_destroy specifies that a specific static or thread duration variable shouldn't have it's destructor registered, and is the default in -fno-c++-static-destructors mode. always_destroy is the opposite, and is the default in -fc++-static-destructors mode. A variable whose destructor is disabled (either because of -fno-c++-static-destructors or [[clang::no_destroy]]) doesn't count as a use of the destructor, so we don't do any access checking or mark it referenced. We also don't emit -Wexit-time-destructors for these variables. rdar://21734598 Differential revision: https://reviews.llvm.org/D50994 llvm-svn: 340306
* llvm-readobj: Simplify. NFCI.Peter Collingbourne2018-08-211-1/+1
| | | | llvm-svn: 340305
* [ASTImporter] Add test for CXXNoexceptExprRaphael Isemann2018-08-212-0/+9
| | | | | | | | | | | | Reviewers: a.sidorin, a_sidorin Reviewed By: a_sidorin Subscribers: a_sidorin, hiraditya, martong, cfe-commits Differential Revision: https://reviews.llvm.org/D50737 llvm-svn: 340304
* [BypassSlowDivision] Teach bypass slow division not to interfere with div by ↵Craig Topper2018-08-212-68/+35
| | | | | | | | | | | | | | constant where constants have been constant hoisted, but not moved from their basic block DAGCombiner doesn't pay attention to whether constants are opaque before doing the div by constant optimization. So BypassSlowDivision shouldn't introduce control flow that would make DAGCombiner unable to see an opaque constant. This can occur when a div and rem of the same constant are used in the same basic block. it will be hoisted, but not leave the block. Longer term we probably need to look into the X86 immediate cost model used by constant hoisting and maybe not mark div/rem immediates for hoisting at all. This fixes the case from PR38649. Differential Revision: https://reviews.llvm.org/D51000 llvm-svn: 340303
* [X86][SSE] Lower v8i16 general shifts to SSE shifts directly. NFCI.Simon Pilgrim2018-08-211-9/+9
| | | | | | We don't gain anything from forcing another round of generic shift lowering - we know these are legal constant splat shifts. llvm-svn: 340302
* [Parser] Support alternative operator token keyword args in Objective-C++Erik Pilkington2018-08-212-0/+54
| | | | | | | | rdar://30741878 Differential revision: https://reviews.llvm.org/D50527 llvm-svn: 340301
* [X86][SSE] Lower directly to SSE shifts in the BLEND(SHIFT, SHIFT) combine. ↵Simon Pilgrim2018-08-211-9/+13
| | | | | | | | NFCI. We don't gain anything from forcing another round of generic shift lowering - we know these are legal constant splat shifts. llvm-svn: 340300
* [ASTImporter] Add test for CXXForRangeStmtRaphael Isemann2018-08-212-0/+64
| | | | | | | | | | | | Reviewers: a.sidorin, martong Reviewed By: martong Subscribers: rnkovacs, martong, cfe-commits Differential Revision: https://reviews.llvm.org/D51001 llvm-svn: 340297
* Try to fix bot build failureMatt Arsenault2018-08-211-1/+1
| | | | llvm-svn: 340296
* [AMDGPU] Support idot2 pattern.Farhana Aleen2018-08-213-0/+1873
| | | | | | | | | | | | | | | | Summary: Transform add (mul ((i32)S0.x, (i32)S1.x), add( mul ((i32)S0.y, (i32)S1.y), (i32)S3) => i/udot2((v2i16)S0, (v2i16)S1, (i32)S3) Author: FarhanaAleen Reviewed By: arsenm Subscribers: llvm-commits, AMDGPU Differential Revision: https://reviews.llvm.org/D50024 llvm-svn: 340295
* lldbtest.py: Unconditionally set the clang module cache path.Adrian Prantl2018-08-212-13/+11
| | | | | | This should fix the errors observable on the new lldb-cmake bot. llvm-svn: 340293
* AMDGPU: Move target code into TargetParserMatt Arsenault2018-08-212-193/+77
| | | | llvm-svn: 340292
* AMDGPU: Partially move target handling code from clang to TargetParserMatt Arsenault2018-08-212-0/+227
| | | | | | | | | | | | | | | | | | | | A future change in clang necessitates access of this information from the driver, so move this into a common place. Try to mimic something resembling the API the other targets are using here. One thing I'm uncertain about is how to split amdgcn and r600 handling. Here I've mostly duplicated the functions for each, while keeping the same enums. I think this is a bit awkward for the features which don't matter for amdgcn. It's also a bit messy that this isn't a complete set of subtarget features. This is just the minimum set needed for the driver code. For example building the list of subtarget feature names is still in clang. llvm-svn: 340291
* [X86][SSE] Add helper function to convert to/between the SSE vector shift ↵Simon Pilgrim2018-08-211-36/+33
| | | | | | | | opcodes. NFCI. Also remove some more getOpcode calls from LowerShift when we already have Opc. llvm-svn: 340290
* [clang][NFC] Fix typo in the name of a noteLouis Dionne2018-08-212-2/+2
| | | | | | | | | | | | | | Summary: r306722 introduced a new note called note_silence_unligned_allocation_unavailable where I believe what was meant is note_silence_aligned_allocation_unavailable. Reviewers: ahatanak Subscribers: dexonsmith, cfe-commits Differential Revision: https://reviews.llvm.org/D51043 llvm-svn: 340288
* [aarch64][mc] Don't lookup symbols when there is no symbol lookup callbackDaniel Sanders2018-08-211-0/+2
| | | | | | | | | | | | | | Summary: When run under llvm-mc-disassemble-fuzzer, there is no symbol lookup callback so tryAddingSymbolicOperand() must fail gracefully instead of crashing Reviewers: aemerson, javed.absar Reviewed By: aemerson Subscribers: lhames, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D51005 llvm-svn: 340287
* Makefile.rules: Use an absolute path to the module cache directory.Adrian Prantl2018-08-211-1/+2
| | | | | | This change is NFC, but it makes it more obvious in log files what happened. llvm-svn: 340286
* [InstCombine] Add new tests for icmp ugt/ult (add nuw X, C2), CNicola Zaghen2018-08-211-0/+43
| | | | | | Differential Revision: https://reviews.llvm.org/D51040 llvm-svn: 340284
* [X86] Add SSE2 and XOP udiv combine testsSimon Pilgrim2018-08-211-155/+515
| | | | llvm-svn: 340282
* [PPC64] Add TLS initial exec to local exec relaxationZaara Syeda2018-08-215-3/+277
| | | | | | | | | This patch adds the target call back relaxTlsIeToLe to support TLS relaxation from initial exec to local exec model. Differential Revision: https://reviews.llvm.org/D48091 llvm-svn: 340281
* [analyzer] Correctly marked a virtual function 'override'Kristof Umann2018-08-211-1/+1
| | | | llvm-svn: 340280
* [InstSimplify] use isKnownNeverNaN to fold more fcmp ord/unoSanjay Patel2018-08-213-260/+33
| | | | | | | | | | | Remove duplicate tests from InstCombine that were added with D50582. I left negative tests there to verify that nothing in InstCombine tries to go overboard. If isKnownNeverNaN is improved to handle the FP binops or other cases, we should have coverage under InstSimplify, so we could remove more duplicate tests from InstCombine at that time. llvm-svn: 340279
* [LV] Vectorize loops where non-phi instructions used outside loopAnna Thomas2018-08-213-7/+183
| | | | | | | | | | | | | | | | | | | Summary: Follow up change to rL339703, where we now vectorize loops with non-phi instructions used outside the loop. Note that the cyclic dependency identification occurs when identifying reduction/induction vars. We also need to identify that we do not allow users where the PSCEV information within and outside the loop are different. This was the fix added in rL307837 for PR33706. Reviewers: Ayal, mkuper, fhahn Subscribers: javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D50778 llvm-svn: 340278
* [ASTImporter] Adding some friend function related unittests.Balazs Keri2018-08-211-0/+205
| | | | | | | | | | | | Reviewers: a.sidorin, a_sidorin Reviewed By: a_sidorin Subscribers: a_sidorin, martong, cfe-commits Differential Revision: https://reviews.llvm.org/D49798 llvm-svn: 340277
* [InstSimplify] add tests for FP uno/ord with nnan; NFCSanjay Patel2018-08-211-0/+424
| | | | | | | | | This is a slight modification of the tests from D50582; change half of the predicates to 'uno' so we have coverage for that side too. All of the positive tests can fold to a constant (true/false), so that should happen in instsimplify. llvm-svn: 340276
* NFC: Add loop vectorizer tests showing various control flow within loop that ↵Anna Thomas2018-08-211-0/+169
| | | | | | skip iterations llvm-svn: 340275
* [llvm-mca] Replace use of llvm::any_of with std::any_of.Andrea Di Biagio2018-08-211-2/+3
| | | | | | This should unbreak the buildbots. llvm-svn: 340274
* [llvm-mca] Add method cycleEvent() to class Scheduler. NFCIAndrea Di Biagio2018-08-216-110/+123
| | | | | | | | | | | | | | | | | | | | The goal of this patch is to simplify the Scheduler's interface in preparation for D50929. Some methods in the Scheduler's interface should not be exposed to external users, since their presence makes it hard to both understand, and extend the Scheduler's interface. This patch removes the following two methods from the public Scheduler's API: - reclaimSimulatedResources() - updatePendingQueue() Their logic has been migrated to a new method named 'cycleEvent()'. Methods 'updateIssuedSet()' and 'promoteToReadySet()' still exist. However, they are now private members of class Scheduler. This simplifies the interaction with the Scheduler from the ExecuteStage. llvm-svn: 340273
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