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* Fix a few typos in the previous commit.Caroline Tice2011-03-312-9/+5
| | | | llvm-svn: 128671
* Fix spelling in a comment. (test commit)Lenny Maiorani2011-03-311-1/+1
| | | | llvm-svn: 128670
* Add code to emulate VLD1 (single element to all lanes) ARM instruction.Caroline Tice2011-03-312-0/+141
| | | | llvm-svn: 128669
* Add a test case for a malformed LDC/LDC2 instructions with PUDW = 0b0000, whichJohnny Chen2011-03-311-0/+11
| | | | | | amounts to an UNDEFINED instruction. llvm-svn: 128668
* Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplierEvan Cheng2011-03-314-4/+80
| | | | | | | | | | | accumulator forwarding: vadd d3, d0, d1 vmul d3, d3, d2 => vmul d3, d0, d2 vmla d3, d1, d2 llvm-svn: 128665
* Make ChainedIncludesSource an ExternalSemaSource, otherwise initialization ↵Sebastian Redl2011-03-313-5/+30
| | | | | | of the ASTReader is incomplete, leading to errors like not realizing std::type_info is already defined. llvm-svn: 128664
* Tell the diagnostic client about starting and ending source files when ↵Sebastian Redl2011-03-311-0/+3
| | | | | | automatically creating chained PCHs. This way, we don't get a crash whenever a diagnostic is emitted while processing the include. llvm-svn: 128663
* Fix single word and unsigned byte data transfer instruction encodings so thatJohnny Chen2011-03-312-0/+6
| | | | | | | | Inst{4} = 0. rdar://problem/9213022 llvm-svn: 128662
* Add code to emulate VST1 (single element from one lane) ARMCaroline Tice2011-03-311-2/+162
| | | | | | instruction (more floating point stores). llvm-svn: 128661
* Add code to emulate VST1 (multiple single elements) ARMCaroline Tice2011-03-311-8/+175
| | | | | | instruction (floating point store). llvm-svn: 128656
* Fix Mips, Sparc, and XCore tests that were dependent on register allocation.Jakob Stoklund Olesen2011-03-316-49/+60
| | | | | | Add an extra run with -regalloc=basic to keep them honest. llvm-svn: 128654
* Added support for FP conditional move instructions and fixed bugs in ↵Akira Hatanaka2011-03-3113-288/+726
| | | | | | handling of FP comparisons. llvm-svn: 128650
* Pick better examples. "fpext float 3.1415 to double" won't parse because 3.1415Nick Lewycky2011-03-311-2/+2
| | | | | | | isn't an exact float. Also "fpext float 1.0 to float" is invalid IR because it's not performing an extension. llvm-svn: 128647
* Add code to emulate VLD1 (single element to one lane) floating pointCaroline Tice2011-03-311-2/+175
| | | | | | register load instruction (ARM) . llvm-svn: 128646
* Don't completely eliminate identity copies that also modify super register ↵Jakob Stoklund Olesen2011-03-312-6/+13
| | | | | | | | | liveness. Turn them into noop KILL instructions instead. This lets the scavenger know when super-registers are killed and defined. llvm-svn: 128645
* Add BLXi to the instruction table for disassembly purpose.Johnny Chen2011-03-313-2/+26
| | | | | | | | A8.6.23 BLX (immediate) rdar://problem/9212921 llvm-svn: 128644
* Allow kill flags on two-address instructions. They are harmless.Jakob Stoklund Olesen2011-03-311-6/+2
| | | | llvm-svn: 128643
* Mark all uses as <undef> when joining a copy.Jakob Stoklund Olesen2011-03-314-9/+21
| | | | | | | | | | | | This way, shrinkToUses() will ignore the instruction that is about to be deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like. Fix a misunderstanding in MachineVerifier about <def,undef> operands. The <undef> flag is valid on def operands where it has the same meaning as <undef> on a use operand. It only applies to sub-register defines which also read the full register. llvm-svn: 128642
* Driver/Darwin: Tweak link logic for simulator.Daniel Dunbar2011-03-312-1/+14
| | | | llvm-svn: 128641
* Remove stray empty test file.Daniel Dunbar2011-03-311-0/+0
| | | | llvm-svn: 128640
* Remove dead code.Devang Patel2011-03-311-5/+1
| | | | llvm-svn: 128639
* Revert changes that caused this scheme to be hidden in certain cases.Caroline Tice2011-03-311-4/+1
| | | | llvm-svn: 128638
* Add code to emulate VLD1 (multiple single elements) ARM instruction.Caroline Tice2011-03-311-9/+178
| | | | llvm-svn: 128637
* Provide a more readable error message for <atomic> until it is implemented.Howard Hinnant2011-03-311-0/+6
| | | | llvm-svn: 128636
* Revert r128632 again, until I figure out what break the testsBruno Cardoso Lopes2011-03-3110-360/+87
| | | | llvm-svn: 128635
* Fix bug found by valgrind.Jakob Stoklund Olesen2011-03-311-1/+1
| | | | llvm-svn: 128634
* Add XCore intrinsics for initializing / starting / synchronizing threads.Richard Osborne2011-03-313-6/+123
| | | | llvm-svn: 128633
* Reapply r128585 without generating a lib depedency cycle. An updated log:Bruno Cardoso Lopes2011-03-3110-87/+360
| | | | | | | | | | | | | - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible. - Move all instructions which use am2offset without a pattern to use addrmode2. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases llvm-svn: 128632
* Fix whitespace.Michael J. Spencer2011-03-313-24/+24
| | | | llvm-svn: 128631
* Switch FileRemover from PathV1 to V2.Michael J. Spencer2011-03-316-21/+30
| | | | llvm-svn: 128630
* lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use ↵NAKAMURA Takumi2011-03-311-1/+3
| | | | | | | | | | std::pow(float,float) here. We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts). For consistency, std::pow(double,double) may be called instead. Or, precision issue might attack us, to see unstable regalloc and stack coloring. llvm-svn: 128629
* InstCombine: Fix transform to use the swapped predicate.Benjamin Kramer2011-03-312-3/+3
| | | | | | Thanks Frits! llvm-svn: 128628
* InstCombine: fold fcmp (fneg x), (fneg y) -> fcmp x, yBenjamin Kramer2011-03-312-0/+14
| | | | llvm-svn: 128627
* InstCombine: fold fcmp pred (fneg x), C -> fcmp swap(pred) x, -CBenjamin Kramer2011-03-312-0/+16
| | | | llvm-svn: 128626
* InstCombine: Shrink "fcmp (fpext x), C" to "fcmp x, C" if C can be ↵Benjamin Kramer2011-03-312-0/+57
| | | | | | | | losslessly converted to the type of x. Fixes PR9592. llvm-svn: 128625
* InstCombine: fold fcmp (fpext x), (fpext y) -> fcmp x, y.Benjamin Kramer2011-03-312-0/+18
| | | | llvm-svn: 128624
* Will not compile without the spec!Duncan Sands2011-03-311-1/+1
| | | | llvm-svn: 128623
* Strip trailing whitespace.Duncan Sands2011-03-312-14/+14
| | | | llvm-svn: 128622
* Whoops.John McCall2011-03-311-2/+2
| | | | llvm-svn: 128621
* Testcase for r128619 (PR9571).Bill Wendling2011-03-311-0/+15
| | | | llvm-svn: 128620
* After much contemplation, I've decided that we probably shouldn't "unique"John McCall2011-03-314-165/+279
| | | | | | | | | | | | | __block object copy/dispose helpers for C++ objects with those for different variables with completely different semantics simply because they happen to both be no more aligned than a pointer. Found by inspection. Also, internalize most of the helper generation logic within CGBlocks.cpp, and refactor it to fit my peculiar aesthetic sense. llvm-svn: 128618
* Add code to emulate VSTR ARM instruction (store a floating point register).Caroline Tice2011-03-311-0/+137
| | | | llvm-svn: 128614
* Add code to emulate the VLDR Arm instruction (load a floating poitn register).Caroline Tice2011-03-311-0/+134
| | | | llvm-svn: 128613
* Static analyzer: fix bug in handling of dynamic_cast<>. The sink node ↵Ted Kremenek2011-03-312-97/+100
| | | | | | | | wouldn't always be the final node, thus causing the state to continue propagating. Instead, recover some path-sensitivity by conjuring a symbol. llvm-svn: 128612
* Teach static analyzer about the basics of handling new[]. We still don't ↵Ted Kremenek2011-03-312-9/+20
| | | | | | simulate constructors, but at least the analyzer doesn't think the return value is uninitialized. llvm-svn: 128611
* Pick a conservative register class when creating a small live range for remat.Jakob Stoklund Olesen2011-03-312-1/+62
| | | | | | | | | | | | The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. llvm-svn: 128610
* Add "Bits64" utility function.Caroline Tice2011-03-312-9/+219
| | | | | | Add code to emulate VSTM ARM instruction (store multiple floating point registers). llvm-svn: 128609
* Move all the significant __block code into CGBlocks.cpp. No functionalityJohn McCall2011-03-313-187/+215
| | | | | | change. llvm-svn: 128608
* Oops, prefer C-style cast hereMatt Beaumont-Gay2011-03-311-1/+1
| | | | llvm-svn: 128607
* Remove a redundant isValid() checkMatt Beaumont-Gay2011-03-311-1/+1
| | | | llvm-svn: 128606
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