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* [OptRemark,LDist] RFC: Add hotness attributeAdam Nemet2016-07-1515-9/+337
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the first set of changes implementing the RFC from http://thread.gmane.org/gmane.comp.compilers.llvm.devel/98334 This is a cross-sectional patch; rather than implementing the hotness attribute for all optimization remarks and all passes in a patch set, it implements it for the 'missed-optimization' remark for Loop Distribution. My goal is to shake out the design issues before scaling it up to other types and passes. Hotness is computed as an integer as the multiplication of the block frequency with the function entry count. It's only printed in opt currently since clang prints the diagnostic fields directly. E.g.: remark: /tmp/t.c:3:3: loop not distributed: use -Rpass-analysis=loop-distribute for more info (hotness: 300) A new API added is similar to emitOptimizationRemarkMissed. The difference is that it additionally takes a code region that the diagnostic corresponds to. From this, hotness is computed using BFI. The new API is exposed via an analysis pass so that it can be made dependent on LazyBFI. (Thanks to Hal for the analysis pass idea.) This feature can all be enabled by setDiagnosticHotnessRequested in the LLVM context. If this is off, LazyBFI is not calculated (D22141) so there should be no overhead. A new command-line option is added to turn this on in opt. My plan is to switch all user of emitOptimizationRemark* to use this module instead. Reviewers: hfinkel Subscribers: rcox2, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D21771 llvm-svn: 275583
* [libFuzzer] add ThreadedLeakTestKostya Serebryany2016-07-153-0/+24
| | | | llvm-svn: 275582
* [AliasAnalysis] Give back AA results for fence instructionsDavid Majnemer2016-07-153-5/+27
| | | | | | | | | | | | | Calling getModRefInfo with a fence resulted in crashes because fences don't have a memory location. Add a new predicate to Instruction called isFenceLike which indicates that the instruction mutates memory but not any single memory location in particular. In practice, it is a proxy for the set of instructions which "mayWriteToMemory" but cannot be used with MemoryLocation::get. This fixes PR28570. llvm-svn: 275581
* TestCase null_deref was failing in Win64:Etienne Bergeron2016-07-154-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | c:\lipo\work\asan\b_llvm>c:\lipo\work\asan\b_llvm\projects\compiler-rt\test\asan\X86_64WindowsConfig\TestCases\Output\null_deref.cc.tmp ================================================================= ==5488==ERROR: AddressSanitizer: access-violation on unknown address 0x000000000028 (pc 0x7ff701f91067 bp 0x000c8cf8fbf0 sp 0x000c8cf8fbb0 T0) ==5488==The signal is caused by a READ memory access. ==5488==Hint: address points to the zero page. #0 0x7ff701f91066 in NullDeref(int *) C:\lipo\work\asan\llvm\projects\compiler-rt\test\asan\TestCases\null_deref.cc:15:10 #1 0x8a0388830a67 (<unknown module>) The reason was symbols was not initilized. In fact, it was first inited with a call to stack.Print(), which calls WinSymbolizerTool::SymbolizePC, then InitializeDbgHelpIfNeeded(). Since the StackWalk was performed before the stack.Print(), stack frames where not gathered correctly. There should be a better place to initialize symbols. For now, this patch makes the test happy. Patch by Wei Wang Differential Revision: https://reviews.llvm.org/D22410 llvm-svn: 275580
* GPGPU: Format statements scheduled on the host ourselvesTobias Grosser2016-07-152-0/+212
| | | | | | | | Otherwise ppcg would try to call into pet functionality that this not available, which obviously will cause trouble. As we can easily print these statements ourselves, we just do so. llvm-svn: 275579
* [Hexagon] Update instruction itinerariesKrzysztof Parzyszek2016-07-157-120/+128
| | | | llvm-svn: 275578
* AMDGPU: Add Clang Builtin for v_lerp_u8Wei Ding2016-07-153-0/+10
| | | | | | Differential Revision: http://reviews.llvm.org/D22380 llvm-svn: 275577
* [PM] Convert LoopInstSimplify Pass to new PMDehao Chen2016-07-156-62/+121
| | | | | | | | | | | | Summary: Convert LoopInstSimplify to new PM. Unfortunately there is no exisiting unittest for this pass. Reviewers: davidxl, silvas Subscribers: silvas, llvm-commits, mzolotukhin Differential Revision: https://reviews.llvm.org/D22280 llvm-svn: 275576
* IR: Sort generic intrinsics before target specific onesJustin Bogner2016-07-156-44/+111
| | | | | | | | | | | | This splits out the intrinsic table such that generic intrinsics come first and target specific intrinsics are grouped by target. From here we can find out which target an intrinsic is for or differentiate between generic and target intrinsics. The motivation here is to make it easier to move target specific intrinsic handling out of generic code. llvm-svn: 275575
* [Hexagon] Fixes/changes to instruction selectionKrzysztof Parzyszek2016-07-152-27/+72
| | | | | | | | - Add patterns for rr/abs addressing modes. - Set addrMode to PostInc where necessary. - Misc fixes. llvm-svn: 275574
* GPGPU: Use schedule whole components for schedulerTobias Grosser2016-07-152-29/+28
| | | | | | | | | | | This option increases the scalability of the scheduler and allows us to remove the 'gisting' workaround we introduced in r275565 to handle a more complicated test case. Another benefit of using this option is also that the generated code looks a lot more streamlined. Thanks to Sven Verdoolaege for reminding me of this option. llvm-svn: 275573
* [DSE]Enhance shorthening MemIntrinsic based on OverlapIntervalsJun Bum Lim2016-07-153-50/+169
| | | | | | | | | | | | | | Summary: This change use the overlap interval map built from partial overwrite tracking to perform shortening MemIntrinsics. Add test cases which was missing opportunities before. Reviewers: hfinkel, eeckstein, mcrosier Subscribers: mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D21909 llvm-svn: 275571
* XRay: Remove duplicate checks for xray instrumentation flagsDean Michael Berris2016-07-151-10/+0
| | | | llvm-svn: 275570
* [Hexagon] Improve patterns with stack-based addressingKrzysztof Parzyszek2016-07-158-353/+683
| | | | | | | | | - Treat bitwise OR with a frame index as an ADD wherever possible, fold it into addressing mode. - Extend patterns for memops to allow memops with frame indexes as address operands. llvm-svn: 275569
* In dag-optnone.ll, use varargs instead of win64 to fast SDIsel.Nico Weber2016-07-151-8/+7
| | | | | | | | The test used to rely on targeting win64 to disable fast isel, but I'd like to teach fast isel about win64 rets. Change the test to use varargs to disable fast isel. llvm-svn: 275568
* [LV] Swap A and B in interleaved access analysis (NFC)Matthew Simpson2016-07-151-77/+87
| | | | | | | | | This patch swaps A and B in the interleaved access analysis and clarifies related comments. The algorithm is more intuitive if we let access A precede access B in program order rather than the reverse. This change was requested in the review of D19984. llvm-svn: 275567
* [AMDGPU] Add metadata for runtimeYaxun Liu2016-07-154-0/+1219
| | | | | | | | | | Added emitting metadata to elf for runtime. Runtime requires certain information (metadata) about kernels to be able to execute and query them. Such information is emitted to an elf section as a key-value pair stream. Differential Revision: https://reviews.llvm.org/D21849 llvm-svn: 275566
* GPGPU: Drop domain constraints from flow dependencesTobias Grosser2016-07-152-0/+183
| | | | | | | | This works around a shortcoming of the isl scheduler, which even for some smaller test cases does not terminate in case domain constraints are part of the flow dependences. llvm-svn: 275565
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-1554-133/+134
| | | | | | | | | | | | Summary: NFC. Rename AnalyzeBranch/AnalyzeBranchPredicate to analyzeBranch/analyzeBranchPredicate to follow LLVM coding style and be consistent with TargetInstrInfo's analyzeCompare and analyzeSelect. Reviewers: tstellarAMD, mcrosier Subscribers: mcrosier, jholewinski, jfb, arsenm, dschuff, jyknight, dsanders, nemanjai Differential Revision: https://reviews.llvm.org/D22409 llvm-svn: 275564
* Re-submit r272891 "Prevent dangling pointer problems in BranchProbabilityInfo"Igor Laevsky2016-07-152-0/+30
| | | | | | | | | Most possibly problem was caused by the same reason as PR28400. This change bypasses it by using CallbackVH instead of AssertingVH. Differential Revision: https://reviews.llvm.org/D20957 llvm-svn: 275563
* Revert r275141 - Mips: Avoid implicit iterator conversions, NFCDaniel Sanders2016-07-156-51/+57
| | | | | | It appears to have caused some failures in our buildbots. llvm-svn: 275562
* code hoisting pass based on GVNSebastian Pop2016-07-1512-4/+1646
| | | | | | | | | | | | | This pass hoists duplicated computations in the program. The primary goal of gvn-hoist is to reduce the size of functions before inline heuristics to reduce the total cost of function inlining. Pass written by Sebastian Pop, Aditya Kumar, Xiaoyu Hu, and Brian Rzycki. Important algorithmic contributions by Daniel Berlin under the form of reviews. Differential Revision: http://reviews.llvm.org/D19338 llvm-svn: 275561
* Removing a few more :option: tags that we do not have corresponding .. ↵Aaron Ballman2016-07-151-9/+9
| | | | | | option directives for; these are causing the sphinx bot to fail (http://lab.llvm.org:8011/builders/clang-sphinx-docs/builds/15214/steps/docs-clang-html/logs/stdio). llvm-svn: 275560
* [LLVM][MIPS] Fix createStubFunction to emit JR encoding based on Arch.Nitesh Jain2016-07-152-2/+9
| | | | | | | | | | Reviewers: vkalintiris, dsanders Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, llvm-commits Differential Revision: https://reviews.llvm.org/D21172 llvm-svn: 275559
* Removing a few more :option: tags that we do not have corresponding .. ↵Aaron Ballman2016-07-151-7/+7
| | | | | | option directives for; these are causing the sphinx bot to fail (http://lab.llvm.org:8011/builders/clang-sphinx-docs/builds/15213/steps/docs-clang-html/logs/stdio). llvm-svn: 275558
* GPGPU: Add memory reference tag ids to tagged accessesTobias Grosser2016-07-151-0/+2
| | | | | | | | | | It seems we forgot to actually add the memory access ids to the tagged accesses, but instead just tagged the accesses with empty isl_ids. This issue was found by inspection and without code generation it is difficult to test just by itself. We fix it for now without test case and expect our code generation tests to cover this later on. llvm-svn: 275557
* [clang-rename] fix testsetKirill Bobyrev2016-07-1520-60/+254
| | | | | | Make yet unsupported tests marked with FIXME pass so that buildbot doesn't fail. llvm-svn: 275556
* Fix TestDarwinNSLogOutput for windowsPavel Labath2016-07-151-1/+1
| | | | | | pexpect python package does not exist on windows llvm-svn: 275555
* [X86][AVX] Added shuffle tests for UNPCK+PERMUTESimon Pilgrim2016-07-151-0/+56
| | | | | | lowerVectorShuffleAsPermuteAndUnpack could solve this if it worked with 256-bit vectors llvm-svn: 275554
* GPGPU: Do not check for hidden declarationsTobias Grosser2016-07-151-0/+2
| | | | | | | | | | We do not have them in Polly and the code to check for them is directly referring to pet data structures which we do not have available. This commit avoids undefined behavior. As such issues are difficult to reproduce, this commit comes without a test case. llvm-svn: 275553
* [X86][AVX2] Added a memory version of test_mm256_broadcastsi128_si256Simon Pilgrim2016-07-151-4/+24
| | | | | | This should lower to vbroadcasti128 llvm-svn: 275552
* GPGPU: Test scalar/array types i1/i3/i8/i32/i60/i64/i80/i120/i128/i3000Tobias Grosser2016-07-151-0/+490
| | | | | | | | | | | | | | | | | | Arrays with integer base type are similar to arrays with floating point types, with the exception that LLVM's integer types can take some odd values. We add a selection of different values to make sure we correctly round these types when necessary. References to scalar integer types are special, as we currently do not model these types as array accesses as they are considered 'synthesizable' by Polly. As a result, we do not generate explicit data-transfers for them, but instead will need to keep track of all references to 'synthesizable' values separately. At the current stage, this is only visible by missing host-to-device data-transfer calls. In the future, we will also require special code generation strategies. llvm-svn: 275551
* [clang-rename] apply stylistic fixesKirill Bobyrev2016-07-154-20/+16
| | | | llvm-svn: 275550
* [ELF] Overriding reserved symbols in linker scriptEugene Leviant2016-07-152-1/+12
| | | | llvm-svn: 275549
* GPGPU: Test scalar parameters of type half/float/double/fp128/x86_fp80/ppc_fp128Tobias Grosser2016-07-151-1/+251
| | | | | | | | | | | We currently only test that the code structure we generate for these scalar parameters is correct and we add these types to make sure later code generation additions have sufficient test coverage. In case some of these types cannot be mapped due to missing hardware support on the GPU some of these test cases may need to be updated later on. llvm-svn: 275548
* GPGPU: Make sure scops with more than one array workTobias Grosser2016-07-152-0/+56
| | | | | | We use this opportunity to add a test case containing a scalar parameter. llvm-svn: 275547
* GPGPU: Free options to avoid memory leakTobias Grosser2016-07-151-0/+14
| | | | | | | ppcg does not free the option structs for us. To avoid a memory leak we do this ourselves. llvm-svn: 275546
* [clang-rename] add few testsKirill Bobyrev2016-07-155-0/+76
| | | | | | | | Thiis patch introduces few additional tests including one case the tool does not handle yet, which should be fixed in the future. Differential Revision: https://reviews.llvm.org/D22102 llvm-svn: 275545
* [NPL] Simplify process launch codePavel Labath2016-07-152-180/+75
| | | | | | | | | | | | | | Summary: This removes one level of indirection, which was just packing and repacking launch args into different structures. NFC. Reviewers: tberghammer Subscribers: lldb-commits Differential Revision: https://reviews.llvm.org/D22357 llvm-svn: 275544
* [X86][AVX2] Improve lowerShuffleAsRepeatedMaskAndLanePermute permutation of ↵Simon Pilgrim2016-07-1510-363/+369
| | | | | | | | | | | | 64-bit sub-lanes As discussed on PR28136, lowerShuffleAsRepeatedMaskAndLanePermute was attempting to match repeated masks at the 128-bit level and then permute the resultant lanes at the 128-bit (AVX1) or 64-bit (AVX2) sub-lane level. This change allows us to create the repeated masks at the sub-lane level (and then concat them together to create a 128-bit repeated mask) and then select which sub-lane to permute. This has no effect on the AVX1 codegen. Fixes PR28136. llvm-svn: 275543
* [include-fixer] Always add as few as possible qualifiers to the unidentified ↵Haojian Wu2016-07-152-8/+38
| | | | | | | | | | | | symbol. Reviewers: bkramer Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D22367 llvm-svn: 275542
* [ARM] Fix build after r275540James Molloy2016-07-151-6/+6
| | | | | | A rebase seemed so innocent before committing. Turns out someone changed a pointer to a reference in the mean time :( llvm-svn: 275541
* [Thumb-1] Select post-increment load and store where possibleJames Molloy2016-07-154-4/+164
| | | | | | | | | | Thumb-1 doesn't have post-inc or pre-inc load or store instructions. However the LDM/STM instructions with writeback can function as post-inc load/store: ldm r0!, {r1} @ load from r0 into r1 and increment r0 by 4 Obviously, this only works if the post increment is 4. llvm-svn: 275540
* [asan] Reduce flakiness of halt_on_error-torture.cc testcase.Maxim Ostapenko2016-07-151-6/+2
| | | | | | | | | It seems in some situations we have clashes on very first error so test only prints "nested bug in the same thread, aborting" rather than "use-after-poison", so remove corresponding " RUN: FileCheck %s < 10.txt" line. Also, the two last " RUN: FileCheck --check-prefix=CHECK-COLLISION %s < 1.txt || FileCheck --check-prefix=CHECK-NO-COLLISION %s < 1.txt" look wrong, they should check 10.txt. Fix these lines too. Differential Revision: https://reviews.llvm.org/D22309 llvm-svn: 275539
* [ARM] Followup to r275537 addressing review commentsJames Molloy2016-07-151-2/+2
| | | | | | Address Chad's comment in D22216 which I missed due to tunnel vision on the "LGTM" comment. llvm-svn: 275538
* [ARM] Prefer indirect calls in minsize modeJames Molloy2016-07-152-28/+70
| | | | | | | | ... When we emit several calls to the same function in the same basic block. An indirect call uses a "BLX r0" instruction which has a 16-bit encoding. If many calls are made to the same target, this can enable significant code size reductions. llvm-svn: 275537
* GPGPU: Shorten ppcg include paths to avoid conflict with cuda.hTobias Grosser2016-07-152-7/+6
| | | | | | | | | | Instead of directly linking to ppcg's main source directory, we link to the parent director. This allows us to access ppcg's include files with 'ppcg/cuda.h' and avoids a conflict with NVIDIA's cuda.h header. Also drop an include directory that is currently not used. llvm-svn: 275536
* GPGPU: Model array access informationTobias Grosser2016-07-154-18/+176
| | | | | | This allows us to derive host-device and device-host data-transfers. llvm-svn: 275535
* GPGPU: Use CHECK-NEXT to harden test casesTobias Grosser2016-07-151-44/+45
| | | | | | | | A sequence of CHECK lines allows additional statements to appear in the output of the tested program without any test failures appearing. As we do not want this to happen, switch this test case to use CHECK-NEXT. llvm-svn: 275534
* XFAIL two SeparateConstOffsetFromGEP testsDavid Majnemer2016-07-152-0/+2
| | | | | | | | They appear to have relied on bugs hidden in copyIRFlags/andIRFlags. This has been filed as PR28564. llvm-svn: 275533
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