summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Restrict FindBetterChain DAG combines to unindexed nodesHal Finkel2014-01-241-2/+2
| | | | | | | | | | | | These transformations obviously won't work for indexed (pre/post-inc) loads and stores. In practice, I'm not sure there is any benefit to enabling them for indexed nodes because other transformations that these might enable likely also won't handle indexed nodes. I don't have an in-tree test case that hits this problem, but an upcoming bug fix will make it much more likely. llvm-svn: 200023
* Add Constant Hoisting PassJuergen Ributzka2014-01-2420-40/+701
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pass identifies expensive constants to hoist and coalesces them to better prepare it for SelectionDAG-based code generation. This works around the limitations of the basic-block-at-a-time approach. First it scans all instructions for integer constants and calculates its cost. If the constant can be folded into the instruction (the cost is TCC_Free) or the cost is just a simple operation (TCC_BASIC), then we don't consider it expensive and leave it alone. This is the default behavior and the default implementation of getIntImmCost will always return TCC_Free. If the cost is more than TCC_BASIC, then the integer constant can't be folded into the instruction and it might be beneficial to hoist the constant. Similar constants are coalesced to reduce register pressure and materialization code. When a constant is hoisted, it is also hidden behind a bitcast to force it to be live-out of the basic block. Otherwise the constant would be just duplicated and each basic block would have its own copy in the SelectionDAG. The SelectionDAG recognizes such constants as opaque and doesn't perform certain transformations on them, which would create a new expensive constant. This optimization is only applied to integer constants in instructions and simple (this means not nested) constant cast experessions. For example: %0 = load i64* inttoptr (i64 big_constant to i64*) Reviewed by Eric llvm-svn: 200022
* Add final and owerride keywords to TargetTransformInfo's subclasses.Juergen Ributzka2014-01-247-126/+143
| | | | llvm-svn: 200021
* Doxify commentsJuergen Ributzka2014-01-241-23/+21
| | | | llvm-svn: 200020
* [PECOFF] Use constant instead of magic number.Rui Ueyama2014-01-241-2/+2
| | | | llvm-svn: 200019
* Fix known typosAlp Toker2014-01-24111-232/+233
| | | | | | | Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. llvm-svn: 200018
* Report lli remote IO errors consistentlyAlp Toker2014-01-245-41/+30
| | | | | | | | | This enables IO error reports in both the child and server processes. The scheme still isn't entirely satisfactory and output is jumbled but it beats having no output at all. This will hopefully unblock ARM support (PR18057). llvm-svn: 200017
* InstSimplify: Make shift, select and GEP simplifications vector-aware.Benjamin Kramer2014-01-244-19/+114
| | | | llvm-svn: 200016
* tsan: fix test for -O2Dmitry Vyukov2014-01-241-13/+17
| | | | | | otherwise races are suppressed due to "same stack" llvm-svn: 200015
* Unify duplicated functions.Rafael Espindola2014-01-243-21/+5
| | | | llvm-svn: 200014
* Don't use "llc -filetype=obj" now that the codepath is the same.Rafael Espindola2014-01-243-3/+3
| | | | | | | r200011 remove the special codepaths in MC for inline asm, so we can now test all the logic with just llc + llvm-mc. llvm-svn: 200013
* tsan: fix test for -O2Dmitry Vyukov2014-01-241-1/+2
| | | | llvm-svn: 200012
* Move emitInlineAsmEnd to the AsmPrinter interface.Rafael Espindola2014-01-246-41/+34
| | | | | | | | There is no inline asm in a .s file. Therefore, there should be no logic to handle it in the streamer. Inline asm only exists in bitcode files, so the logic can live in the (long misnamed) AsmPrinter class. llvm-svn: 200011
* Rename some internal templates to avoid conflict with complier intrinsics. ↵Marshall Clow2014-01-241-22/+22
| | | | | | __is_constructible --> __libcpp_is_constructible, __is_nothrow_constructible --> __libcpp_is_nothrow_constructible, and __is_nothrow_assignable --> __libcpp_is_nothrow_assignable. No functionality change. llvm-svn: 200010
* [asan] Add an ASan-on-Android installation script.Evgeniy Stepanov2014-01-241-0/+190
| | | | llvm-svn: 200009
* [AArch64] Replace underscores with dashes in -mgeneral_regs_only.Amara Emerson2014-01-243-4/+4
| | | | | | This should now match the equivalent gcc option. llvm-svn: 200008
* Add end-of-function markers.Joerg Sonnenberger2014-01-243-2/+6
| | | | llvm-svn: 200007
* Add end-of-function markers.Joerg Sonnenberger2014-01-2414-12/+29
| | | | llvm-svn: 200006
* Mechanically add end-of-function markers.Joerg Sonnenberger2014-01-2457-30/+78
| | | | llvm-svn: 200005
* Adding a new diagnostics group (-Wattributes) which covers both ↵Aaron Ballman2014-01-241-1/+3
| | | | | | UnknownAttributes and IgnoredAttributes. llvm-svn: 200004
* tsan: fix signal handlingDmitry Vyukov2014-01-241-51/+67
| | | | | | | We left ignore_interceptors>0 when calling signal handlers from blocking interceptors, this leads to missing synchronization in such signal handler. llvm-svn: 200003
* tsan: fix test relying on assertDmitry Vyukov2014-01-241-0/+6
| | | | llvm-svn: 200002
* Provide support for ARMv4, lacking bx and clz. Unroll theJoerg Sonnenberger2014-01-243-198/+412
| | | | | | | | | | test-and-subtract loop and compute the initial block as address, shaving off between 5% and 10% on Cortex A9 and 30%+ a Raspberry Pi. Code written by Matt Thomas and Joerg Sonnenberger. Differential Revision: http://llvm-reviews.chandlerc.com/D2595 llvm-svn: 200001
* DWARFContext: Fix possible memory leak since r198908.NAKAMURA Takumi2014-01-241-0/+1
| | | | llvm-svn: 200000
* [CMake] libclang: Update GENERATED_HEADERS with actually used.NAKAMURA Takumi2014-01-241-0/+2
| | | | | | | + ClangAttrVisitor + ClangCommentCommandList llvm-svn: 199999
* Implement __ARM_ARCH if the compiler lacks it. Add feature tests for bx and clz.Joerg Sonnenberger2014-01-241-0/+38
| | | | llvm-svn: 199998
* Added missing StandardConversionSequence initializationIsmail Pazarbasi2014-01-241-0/+1
| | | | | | | This is the second msan failure where UserDefinedConversion does not initialize its `Before` member as identity conversion. llvm-svn: 199997
* Darwin: add x86_64h slice for Haswell.Tim Northover2014-01-242-25/+43
| | | | llvm-svn: 199996
* llvm/projects/CMakeLists.txt: Add dragonegg.NAKAMURA Takumi2014-01-241-0/+3
| | | | llvm-svn: 199995
* tsan: do not deadlock on forkDmitry Vyukov2014-01-2413-39/+357
| | | | | | | | | | | | | Currently correct programs can deadlock after fork, because atomic operations and async-signal-safe calls are not async-signal-safe under tsan. With this change: - if a single-threaded program forks, the child continues running with verification enabled (the tsan background thread is recreated as well) - if a multi-threaded program forks, then the child runs with verification disabled (memory accesses, atomic operations and interceptors are disabled); it's expected that it will exec soon anyway - if the child tries to create more threads after multi-threaded fork, the program aborts with error message - die_after_fork flag is added that allows to continue running, but all bets are off http://llvm-reviews.chandlerc.com/D2614 llvm-svn: 199993
* Add missing intrinsics, fix a couple of typos in intrinsic names,Eric Christopher2014-01-241-6/+40
| | | | | | and remove duplicate declarations. llvm-svn: 199992
* Revert "Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for a"Eric Christopher2014-01-246-46/+17
| | | | | | | | in order to fix the cygwin/mingw bots. This reverts commit r199990. llvm-svn: 199991
* Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for aEric Christopher2014-01-246-17/+46
| | | | | | | | compile unit. Make these relocations on the platforms that need relocations and add a routine to ensure that we don't put the addresses in an offset table for split dwarf. llvm-svn: 199990
* Combine the checks for returns_nonnull and for operator new returning null, ↵Artyom Skrobov2014-01-244-29/+41
| | | | | | in Sema::CheckReturnValExpr. Add the missing handling of value-dependent expressions for returns_nonnull. llvm-svn: 199989
* Initialize StandardConversionSequence correctlyIsmail Pazarbasi2014-01-241-1/+1
| | | | | | | | MSAN detected a path that leaves DeprecatedStringLiteralToCharPtr uninitialized. UserDefinedConversionSequence::First is a StandardConversionSequence that must be initialized with setAsIdentityConversion. llvm-svn: 199988
* Remove empty directories.Alexander Kornienko2014-01-240-0/+0
| | | | llvm-svn: 199987
* Remove empty directories.Alexander Kornienko2014-01-240-0/+0
| | | | llvm-svn: 199986
* Remove empty directories.Alexander Kornienko2014-01-240-0/+0
| | | | llvm-svn: 199985
* Remove empty directories.Alexander Kornienko2014-01-240-0/+0
| | | | llvm-svn: 199984
* Remove empty directories.Alexander Kornienko2014-01-240-0/+0
| | | | llvm-svn: 199983
* Get rid of special parsing for return statements.Manuel Klimek2014-01-243-41/+7
| | | | | | | | This was done when we were not able to parse lambdas to handle some edge cases for block formatting different in return statements, but is not necessary any more. llvm-svn: 199982
* [msan] add __libc_memalign interceptor; add a regression test for the ↵Kostya Serebryany2014-01-242-0/+63
| | | | | | existing bug with dtls support in msan llvm-svn: 199980
* Don't create check-ubsan and check-dfsan commands if they are not supported ↵Alexey Samsonov2014-01-242-2/+8
| | | | | | on this platform llvm-svn: 199979
* [AArch64 NEON] Fix a bug in implementing register copy bwtween FPR16.Kevin Qin2014-01-242-3/+14
| | | | llvm-svn: 199978
* [SparcV9] Add support for JIT in Sparc64.Venkatraman Govindaraju2014-01-245-45/+189
| | | | | | With this change, all supported tests in test/ExecutionEngine pass in sparcv9. llvm-svn: 199977
* [X86] Prevent the creation of redundant ops for sadd and ssub with overflow.Juergen Ributzka2014-01-242-2/+51
| | | | | | | | | | | | | This commit teaches the X86 backend to create the same X86 instructions when it lowers an sadd/ssub with overflow intrinsic and a conditional branch that uses that overflow result. This allows SelectionDAG to recognize and remove one of the redundant operations. This fixes <rdar://problem/15874016> and <rdar://problem/15661073>. Reviewed by Nadav llvm-svn: 199976
* Implement atomicrmw operations in 32 and 64 bits for SPARCv9.Jakob Stoklund Olesen2014-01-244-13/+262
| | | | | | These all use the compare-and-swap CASA/CASXA instructions. llvm-svn: 199975
* [Sparc] Correct quad register list in the asm parser.Venkatraman Govindaraju2014-01-243-1/+13
| | | | | | Add test cases to check parsing of v9 double registers and their aliased quad registers. llvm-svn: 199974
* [ELF] Customize a relocation table output format (rel / rela).Simon Atanasyan2014-01-248-49/+138
| | | | | | | | | | Add new virtual virtual function `isRelaOutputFormat` to the `ELFLinkingContext` class. Call this function everywhere we need to select a relocation table format. Patch reviewed by Shankar Easwaran and Rui Ueyama. llvm-svn: 199973
* Add constants for optional header magic field.Rui Ueyama2014-01-241-0/+5
| | | | llvm-svn: 199972
OpenPOWER on IntegriCloud