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* APIntify the isHighOnes utility function.Reid Spencer2007-03-191-5/+6
| | | | llvm-svn: 35190
* Fix coding standards violation.Reid Spencer2007-03-191-1/+1
| | | | llvm-svn: 35189
* Implement isMaxValueMinusOne in terms of APInt instead of uint64_t.Reid Spencer2007-03-191-5/+4
| | | | | | Patch by Sheng Zhou. llvm-svn: 35188
* Implement isMinValuePlusOne using facilities of APInt instead of uint64_tReid Spencer2007-03-191-5/+4
| | | | | | Patch by Zhou Sheng. llvm-svn: 35187
* Implement isOneBitSet in terms of APInt::countPopulation.Reid Spencer2007-03-191-2/+1
| | | | llvm-svn: 35186
* 1. Use APInt::getSignBit to reduce clutter (patch by Sheng Zhou)Reid Spencer2007-03-191-8/+4
| | | | | | 2. Replace uses of the "isPositive" utility function with APInt::isPositive llvm-svn: 35185
* Remove a redundant clause in an if statement.Reid Spencer2007-03-191-1/+0
| | | | | | Patch by Sheng Zhou. llvm-svn: 35184
* Regenerate.Reid Spencer2007-03-192-156/+146
| | | | llvm-svn: 35183
* Fix test/Assembler/2007-03-19-NegValue.ll by using the new "isSigned"Reid Spencer2007-03-191-9/+4
| | | | | | | parameter on ConstantInt::get to indicate the signedness of the intended value. llvm-svn: 35182
* Allow ConstantInt::get(Ty, uint64_t) to interpret the 64-bit values as aReid Spencer2007-03-192-3/+3
| | | | | | negative number. This is needed to fix test/Assembler/2007-03-19-NegValue.ll llvm-svn: 35181
* Implement extension of sign bits for negative values in the uint64_tReid Spencer2007-03-191-1/+5
| | | | | | constructor. This helps to fix test/Assembler/2007-03-19-NegValue.ll llvm-svn: 35180
* Add an indication of signedness to the uint64_t constructor so sign bitsReid Spencer2007-03-191-1/+1
| | | | | | can be extended. This helps fix test/Assembler/2007-03-19-NegValue.ll llvm-svn: 35179
* Test case noticed by Sheng that fails because negative values that areReid Spencer2007-03-191-0/+7
| | | | | | | greater than 64-bits don't have the sign bits extended on construction of the APInt. llvm-svn: 35178
* Fix mingw32 buildAnton Korobeynikov2007-03-191-0/+1
| | | | llvm-svn: 35177
* Test handling of ARRAY_REF when the component type is of unknown size.Duncan Sands2007-03-191-0/+11
| | | | llvm-svn: 35176
* For PR1258:Reid Spencer2007-03-191-0/+9
| | | | | | Test that invalid numbered value references get an error message. llvm-svn: 35175
* Regenerate.Reid Spencer2007-03-193-579/+607
| | | | llvm-svn: 35174
* For PR1248:Reid Spencer2007-03-191-155/+169
| | | | | | | | | | | Eliminate support for type planes in numbered values. This simplifies the data structures involved in managing forward definitions, etc. Instead of requiring maps from type to value, we can now just use a vector of values. These changes also required rewrites of some support functions such as InsertValue, getBBVal, and ResolveDefinitions. Some other cosmetic changes were made as well. llvm-svn: 35173
* Add and Operator== method to ValID so equality can be done properly forReid Spencer2007-03-191-0/+20
| | | | | | named or numbered ValIDs. llvm-svn: 35172
* For PR1258:Reid Spencer2007-03-191-39/+20
| | | | | | | | | | Radically simplify the SlotMachine. There is no need to keep Value planes around any more. This change causes slot numbering to number all un-named, non-void values starting at 0 and incrementing monotonically through the function, regardless of type (including BasicBlocks). Getting slot numbers is now a single lookup operation instead of a double lookup. llvm-svn: 35171
* For PR1258:Reid Spencer2007-03-198-101/+99
| | | | | | Revise numeric value references to accommodate collapsed type planes. llvm-svn: 35170
* fix ScalarRepl/2007-03-19-CanonicalizeMemcpy.llChris Lattner2007-03-191-1/+2
| | | | llvm-svn: 35169
* Use opt instead of gccas.Reid Spencer2007-03-191-1/+2
| | | | llvm-svn: 35168
* add a testcase the resent patches fail on.Chris Lattner2007-03-191-0/+45
| | | | llvm-svn: 35167
* Don't upgrade these.Reid Spencer2007-03-193-20/+18
| | | | llvm-svn: 35166
* Remove -reduce-joining-phys-regs options. Make it on by default.Evan Cheng2007-03-191-3/+1
| | | | llvm-svn: 35165
* Fix obvious typo in comment.Duncan Sands2007-03-191-1/+1
| | | | llvm-svn: 35164
* Fix naming inconsistencies.Evan Cheng2007-03-196-30/+30
| | | | llvm-svn: 35163
* Special LDR instructions to load from non-pc-relative constantpools. These areEvan Cheng2007-03-193-2/+12
| | | | | | rematerializable. Only used for constant generation for now. llvm-svn: 35162
* Constant generation instructions are re-materializable.Evan Cheng2007-03-192-5/+11
| | | | llvm-svn: 35161
* Added isReMaterializable.Evan Cheng2007-03-191-0/+1
| | | | llvm-svn: 35160
* Recognize target instruction flag 'isReMaterializable'.Evan Cheng2007-03-193-0/+3
| | | | llvm-svn: 35159
* Add a TargetInstrDescriptor flag to mark an instruction as "re-materializable".Evan Cheng2007-03-191-0/+7
| | | | | | | It means the instruction can be easily re-materialized at any point. e.g. constant generation, load from constantpool. llvm-svn: 35158
* Add isStrictPositive() to APInt to determine if this APInt Value > 0.Zhou Sheng2007-03-191-0/+6
| | | | llvm-svn: 35156
* Minor bug fix.Evan Cheng2007-03-191-1/+1
| | | | llvm-svn: 35153
* fix a warningChris Lattner2007-03-191-1/+1
| | | | llvm-svn: 35152
* add PR#Chris Lattner2007-03-191-0/+1
| | | | llvm-svn: 35151
* implement the next chunk of SROA with memset/memcpy's of aggregates. ThisChris Lattner2007-03-191-36/+107
| | | | | | implements Transforms/ScalarRepl/memset-aggregate-byte-leader.ll llvm-svn: 35150
* add pr#Chris Lattner2007-03-191-0/+1
| | | | llvm-svn: 35149
* new testcaseChris Lattner2007-03-191-0/+20
| | | | llvm-svn: 35148
* testcase for SROA with memset etcChris Lattner2007-03-191-0/+48
| | | | llvm-svn: 35147
* Clean up this code and fix subtract miscompile.Nick Lewycky2007-03-181-18/+22
| | | | llvm-svn: 35146
* Implement InstCombine/and-xor-merge.ll:test[12].Chris Lattner2007-03-181-54/+96
| | | | | | Rearrange some code to simplify it now that shifts are binops llvm-svn: 35145
* new testcaseChris Lattner2007-03-181-0/+19
| | | | llvm-svn: 35144
* minor updatesChris Lattner2007-03-181-8/+6
| | | | llvm-svn: 35143
* This is implemented. We now generate:Nick Lewycky2007-03-181-40/+0
| | | | | | | | | | | | | | | | | | | | | | entry: icmp ugt i32 %x, 4 ; <i1>:0 [#uses=1] br i1 %0, label %cond_true, label %cond_false cond_true: ; preds = %entry %tmp1 = tail call i32 (...)* @bar( i32 12 ) ; <i32> [#uses=0] ret void cond_false: ; preds = %entry switch i32 %x, label %cond_true15 [ i32 4, label %cond_true3 i32 3, label %cond_true7 i32 2, label %cond_true11 i32 0, label %cond_false17 ] ... llvm-svn: 35142
* - Merge UsedBlocks info after two virtual registers are coalesced.Evan Cheng2007-03-181-23/+30
| | | | | | - Use distance to closest use to determine whether to abort coalescing. llvm-svn: 35141
* Keep UsedBlocks info accurate.Evan Cheng2007-03-182-0/+6
| | | | llvm-svn: 35140
* Fix comment.Evan Cheng2007-03-181-1/+1
| | | | llvm-svn: 35139
* Propagate ValueRanges across equality.Nick Lewycky2007-03-182-67/+178
| | | | | | Add some more micro-optimizations: x * 0 = 0, a - x = a --> x = 0. llvm-svn: 35138
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